Skip to content
Browse files

Add option to not compile the code generator.

This is useful when developing on machines where there is no working
backend.  (E.g., currently my old Mac and my netbook.)  To use this
put the following line into your mk/build.mk:

    DisableAsm = Yes
  • Loading branch information...
1 parent e758a8d commit 2b98eb148c7e514302cb87de998dc7f8bc58d7f7 @nominolo nominolo committed Sep 18, 2011
Showing with 49 additions and 3 deletions.
  1. +4 −0 Makefile
  2. +5 −1 includes/Config.h
  3. +8 −0 mk/build.mk.sample
  4. +10 −0 rts/InterpThreaded.c
  5. +4 −0 rts/Record.c
  6. +5 −2 rts/Snapshot.c
  7. +5 −0 rts/codegen/AsmCodeGen.c
  8. +4 −0 rts/codegen/InterpAsm.c
  9. +4 −0 rts/codegen/MCode.c
View
4 Makefile
@@ -23,6 +23,10 @@ ifneq ($(DebugLevel),)
EXTRA_CFLAGS := $(EXTRA_CFLAGS) -DLC_DEBUG_LEVEL=$(DebugLevel)
endif
+ifeq "$(strip $(DisableAsm))" "Yes"
+EXTRA_CFLAGS := $(EXTRA_CFLAGS) -DLC_HAS_ASM_BACKEND=0
+endif
+
HSBUILDDIR = $(DIST)/build
LCC = $(HSBUILDDIR)/lcc
CABAL ?= cabal
View
6 includes/Config.h
@@ -3,7 +3,11 @@
#ifndef LC_HAS_JIT
# define LC_HAS_JIT 1
-#endif
+#endif
+
+#ifndef LC_HAS_ASM_BACKEND
+# define LC_HAS_ASM_BACKEND 1
+#endif
#undef NDEBUG
#define DEBUG
View
8 mk/build.mk.sample
@@ -30,3 +30,11 @@
# output.
#
# DebugLevel = 1
+
+# Lambdachine is currently x86-64 only. You can still develop on 32
+# bit systems (e.g., a netbook, or ARM) if you turn off the code
+# generator. You can test the trace compiler by using the IR
+# interpreter (it will of course be a lot slower). Uncomment this
+# line to do just that.
+#
+# DisableAsm = Yes
View
10 rts/InterpThreaded.c
@@ -15,7 +15,9 @@
#include "StorageManager.h"
#include "Jit.h"
#include "Stats.h"
+#if LC_HAS_ASM_BACKEND
#include "InterpAsm.h"
+#endif
#include <stdio.h>
#include <stdlib.h>
@@ -216,12 +218,16 @@ int engine(Capability *cap)
Closure *cl;
LC_ASSERT(F != NULL);
recordEvent(EV_TRACE, 0);
+#if LC_HAS_ASM_BACKEND
if(J->param[JIT_P_enableasm]) {
asmEngine(cap, F);
}
else {
irEngine(cap, F);
}
+#else
+ irEngine(cap, F);
+#endif
DBG_PR("*** Continuing at: pc = %p, base = %p\n",
T->pc, T->base);
//LC_ASSERT(0);
@@ -475,12 +481,16 @@ int engine(Capability *cap)
LC_ASSERT(F != NULL);
recordEvent(EV_TRACE, 0);
+#if LC_HAS_ASM_BACKEND
if(J->param[JIT_P_enableasm]) {
asmEngine(cap, F);
}
else {
irEngine(cap, F);
}
+#else
+ irEngine(cap, F);
+#endif
DBG_PR("*** Continuing at: pc = %p, base = %p\n", T->pc, T->base);
pc = T->pc;
View
4 rts/Record.c
@@ -14,7 +14,9 @@
#include "Bitset.h"
#include "Stats.h"
#include "Opts.h"
+#if LC_HAS_ASM_BACKEND
#include "AsmCodeGen.h"
+#endif
#include <stdlib.h>
#include <stdio.h>
@@ -961,12 +963,14 @@ finishRecording(JitState *J)
DBG_PR("Overwriting startpc = %p, with: %x\n",
J->startpc, *J->startpc);
+#if LC_HAS_ASM_BACKEND
if(J->param[JIT_P_enableasm]) {
//TODO: compute the actual framsize of a trace
//This number needs to be computed before a call to genAsm
J->cur.framesize = MAX_SLOTS;
genAsm(J, &J->cur);
}
+#endif
return registerCurrentFragment(J);
}
View
7 rts/Snapshot.c
@@ -9,8 +9,10 @@
//
#include "Snapshot.h"
#include "PrintIR.h"
-#include "AsmTarget.h"
#include "Thread.h"
+#if LC_HAS_ASM_BACKEND
+#include "AsmTarget.h"
+#endif
#include <stdlib.h>
#include <stdio.h>
@@ -154,6 +156,7 @@ printSnapshot(JitState *J, SnapShot *snap, SnapEntry *map)
fprintf(stderr, "pc = %p\n", pc);
}
+#if LC_HAS_ASM_BACKEND
/* -- Snapshot restoration ------------------------------------------------ */
/* Initialize a Bloom Filter with all renamed refs.
** There are very few renames (often none), so the filter has
@@ -249,7 +252,7 @@ void restoreSnapshot(SnapNo snapno, void *exptr) {
T->base = base + smap[nent+1];
T->top = base + snap->nslots;
}
-
+#endif /* LC_HAS_ASM_BACKEND */
#undef IR
View
5 rts/codegen/AsmCodeGen.c
@@ -3,6 +3,9 @@
** Copyright (C) 2005-2011 Mike Pall. See Copyright Notice in luajit.h
*/
+#include "Config.h"
+#if LC_HAS_ASM_BACKEND
+
#include "AsmCodeGen.h"
#include "AsmTarget.h" // Target Machine Definitions
#include "Common.h"
@@ -1236,3 +1239,5 @@ void genAsm(JitState *J, Fragment *T) {
}
#undef IR
+
+#endif
View
4 rts/codegen/InterpAsm.c
@@ -1,3 +1,5 @@
+#include "Config.h"
+#if LC_HAS_ASM_BACKEND
#include "Capability.h"
#include "Jit.h"
@@ -222,3 +224,5 @@ asmExitIsImplementedInAssembly() {
: : "i"(SAVE_SIZE + 256/* 256 bytes for int and float regs
* plus the extra space used by SAVE_SIZE */));
}
+
+#endif
View
4 rts/codegen/MCode.c
@@ -3,6 +3,9 @@
** Copyright (C) 2005-2011 Mike Pall. See Copyright Notice in luajit.h
*/
+#include "Config.h"
+#if LC_HAS_ASM_BACKEND
+
#include "Jit.h"
#include "MCode.h"
#include "InterpAsm.h" // for reference to asmExitHandler
@@ -231,3 +234,4 @@ void lj_mcode_limiterr(JitState *J, size_t need)
traceError(J, 1); /* Retry with new area. */
}
+#endif

0 comments on commit 2b98eb1

Please sign in to comment.
Something went wrong with that request. Please try again.