Clean out includes in JitILCommon.

dolphin-emu · Oct 19, 2013 · 3360ec0 · 3360ec0
1 parent 22cdc0f
commit 3360ec0
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Showing 9 changed files with 48 additions and 62 deletions.
diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase.h b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase.h
@@ -5,9 +5,16 @@
 #ifndef _JITILBASE_H
 #define _JITILBASE_H
 
-#include "../PPCAnalyst.h"
 #include "IR.h"
+#include "../PowerPC.h"
+#include "../PPCAnalyst.h"
+#include "../PPCTables.h"
 #include "../JitCommon/JitBase.h"
+#include "../../ConfigManager.h"
+#include "../../Core.h"
+#include "../../CoreTiming.h"
+#include "../../HW/GPFifo.h"
+#include "../../HW/Memmap.h"
 
 #define INSTRUCTION_START
 

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Branch.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Branch.cpp
@@ -3,14 +3,8 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../../ConfigManager.h"
-#include "../PowerPC.h"
-#include "../../CoreTiming.h"
-#include "../PPCTables.h"
 #include "JitILBase.h"
 
-#include "../../HW/Memmap.h"
 
 // The branches are known good, or at least reasonably good.
 // No need for a disable-mechanism.

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp
@@ -3,11 +3,6 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../../Core.h"
-#include "../PowerPC.h"
-#include "../PPCTables.h"
-
 #include "JitILBase.h"
 
 void JitILBase::fp_arith_s(UGeckoInstruction inst)

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Integer.cpp
@@ -6,14 +6,10 @@
 #pragma warning(disable:4146)  // unary minus operator applied to unsigned type, result still unsigned
 #endif
 
-#include "../../Core.h" // include "Common.h", "CoreParameter.h", SCoreStartupParameter
-#include "../PowerPC.h"
-#include "../PPCTables.h"
-
 #include "JitILBase.h"
 
-static void ComputeRC(IREmitter::IRBuilder& ibuild,
-		      IREmitter::InstLoc val) {
+static void ComputeRC(IREmitter::IRBuilder& ibuild, IREmitter::InstLoc val)
+{
 	IREmitter::InstLoc res =
 		ibuild.EmitICmpCRSigned(val, ibuild.EmitIntConst(0));
 	ibuild.EmitStoreCR(res, 0);
@@ -93,20 +89,30 @@ void JitILBase::cmpXX(UGeckoInstruction inst)
 	JITDISABLE(bJITIntegerOff)
 	IREmitter::InstLoc lhs, rhs, res;
 	lhs = ibuild.EmitLoadGReg(inst.RA);
-	if (inst.OPCD == 31) {
+
+	if (inst.OPCD == 31)
+	{
 		rhs = ibuild.EmitLoadGReg(inst.RB);
-		if (inst.SUBOP10 == 32) {
+		if (inst.SUBOP10 == 32)
+		{
 			res = ibuild.EmitICmpCRUnsigned(lhs, rhs);
-		} else {
+		}
+		else
+		{
 			res = ibuild.EmitICmpCRSigned(lhs, rhs);
 		}
-	} else if (inst.OPCD == 10) {
+	}
+	else if (inst.OPCD == 10)
+	{
 		rhs = ibuild.EmitIntConst(inst.UIMM);
 		res = ibuild.EmitICmpCRUnsigned(lhs, rhs);
-	} else { // inst.OPCD == 11
+	}
+	else // inst.OPCD == 11
+	{
 		rhs = ibuild.EmitIntConst(inst.SIMM_16);
 		res = ibuild.EmitICmpCRSigned(lhs, rhs);
 	}
+
 	js.downcountAmount++; //TODO: should this be somewhere else?
 
 	ibuild.EmitStoreCR(res, inst.CRFD);
@@ -194,14 +200,19 @@ void JitILBase::subfic(UGeckoInstruction inst)
 	IREmitter::InstLoc nota, lhs, val, test;
 	nota = ibuild.EmitXor(ibuild.EmitLoadGReg(inst.RA),
 			      ibuild.EmitIntConst(-1));
-	if (inst.SIMM_16 == -1) {
+
+	if (inst.SIMM_16 == -1)
+	{
 		val = nota;
 		test = ibuild.EmitIntConst(1);
-	} else {
+	}
+	else
+	{
 		lhs = ibuild.EmitIntConst(inst.SIMM_16 + 1);
 		val = ibuild.EmitAdd(nota, lhs);
 		test = ibuild.EmitICmpUgt(lhs, val);
 	}
+
 	ibuild.EmitStoreGReg(val, inst.RD);
 	ibuild.EmitStoreCarry(test);
 }
@@ -290,17 +301,23 @@ void JitILBase::mulhwux(UGeckoInstruction inst)
 }
 
 // skipped some of the special handling in here - if we get crashes, let the interpreter handle this op
-void JitILBase::divwux(UGeckoInstruction inst) {
+void JitILBase::divwux(UGeckoInstruction inst)
+{
 	Default(inst); return;
 #if 0
 	int a = inst.RA, b = inst.RB, d = inst.RD;
 	gpr.FlushLockX(EDX);
 	gpr.Lock(a, b, d);
-	if (d != a && d != b) {
+
+	if (d != a && d != b)
+	{
 		gpr.LoadToX64(d, false, true);
-	} else {
+	}
+	else
+	{
 		gpr.LoadToX64(d, true, true);
 	}
+
 	MOV(32, R(EAX), gpr.R(a));
 	XOR(32, R(EDX), R(EDX));
 	gpr.KillImmediate(b);

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStore.cpp
@@ -3,13 +3,6 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../PowerPC.h"
-#include "../../Core.h"
-#include "../../HW/GPFifo.h"
-#include "../../HW/Memmap.h"
-#include "../PPCTables.h"
-
 #include "JitILBase.h"
 
 void JitILBase::lhax(UGeckoInstruction inst)
@@ -46,7 +39,8 @@ void JitILBase::lXz(UGeckoInstruction inst)
 	ibuild.EmitStoreGReg(val, inst.RD);
 }
 
-void JitILBase::lbzu(UGeckoInstruction inst) {
+void JitILBase::lbzu(UGeckoInstruction inst)
+{
 	INSTRUCTION_START
 	JITDISABLE(bJITLoadStoreOff)
 	const IREmitter::InstLoc uAddress = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst((int)inst.SIMM_16));
@@ -75,11 +69,14 @@ void JitILBase::lXzx(UGeckoInstruction inst)
 	JITDISABLE(bJITLoadStoreOff)
 	if (js.memcheck) { Default(inst); return; }
 	IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB);
-	if (inst.RA) {
+
+	if (inst.RA)
+	{
 		addr = ibuild.EmitAdd(addr, ibuild.EmitLoadGReg(inst.RA));
 		if (inst.SUBOP10 & 32)
 			ibuild.EmitStoreGReg(addr, inst.RA);
 	}
+
 	IREmitter::InstLoc val;
 	switch (inst.SUBOP10 & ~32)
 	{

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp
@@ -3,13 +3,6 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../PowerPC.h"
-#include "../../Core.h" // include "Common.h", "CoreParameter.h"
-#include "../../HW/GPFifo.h"
-#include "../../HW/Memmap.h"
-#include "../PPCTables.h"
-
 #include "JitILBase.h"
 
 // TODO: Add peephole optimizations for multiple consecutive lfd/lfs/stfd/stfs since they are so common,

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp
@@ -3,13 +3,6 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../PowerPC.h"
-#include "../../Core.h"
-#include "../../HW/GPFifo.h"
-#include "../../HW/Memmap.h"
-#include "../PPCTables.h"
-
 #include "JitILBase.h"
 
 void JitILBase::psq_st(UGeckoInstruction inst)

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Paired.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_Paired.cpp
@@ -3,12 +3,6 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
-
-#include "../../Core.h"
-#include "../PowerPC.h"
-#include "../PPCTables.h"
-#include "../../HW/GPFifo.h"
-
 #include "JitILBase.h"
 
 void JitILBase::ps_mr(UGeckoInstruction inst)

diff --git a/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp
@@ -3,14 +3,10 @@
 // Refer to the license.txt file included.
 
 #include "Common.h"
+#include "JitILBase.h"
 
-#include "../../Core.h"
-#include "../../CoreTiming.h"
 #include "../../HW/SystemTimers.h"
-#include "../PowerPC.h"
-#include "../PPCTables.h"
 
-#include "JitILBase.h"
 
 void JitILBase::mtspr(UGeckoInstruction inst)
 {