Merge pull request #10199 from Sintendo/jit64divwxnits

Jit64: divwx - One more micro-optimization

Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp

@@ -1494,22 +1494,28 @@ void Jit64::divwx(UGeckoInstruction inst)
     else if (divisor == 2 || divisor == -2)
     {
       X64Reg tmp = RSCRATCH;
+      X64Reg sign = tmp;
+
       if (!Ra.IsSimpleReg())
       {
+        // Load dividend from memory
         MOV(32, R(tmp), Ra);
         MOV(32, Rd, R(tmp));
       }
       else if (d == a)
       {
+        // Make a copy of the dividend
         MOV(32, R(tmp), Ra);
       }
       else
       {
+        // Copy dividend directly into destination
         MOV(32, Rd, Ra);
         tmp = Ra.GetSimpleReg();
+        sign = Rd;
       }
 
-      SHR(32, Rd, Imm8(31));
+      SHR(32, R(sign), Imm8(31));
       ADD(32, Rd, R(tmp));
       SAR(32, Rd, Imm8(1));
 
@@ -1538,11 +1544,11 @@ void Jit64::divwx(UGeckoInstruction inst)
       else if (d == a)
       {
         // Rd holds the dividend, while RSCRATCH holds the sum
-        // This is opposite of the other cases
+        // This is the reverse of the other cases
         dividend = Rd;
         sum = RSCRATCH;
         src = RSCRATCH;
-        // Negate condition to compensate the swapped values
+        // Negate condition to compensate for the swapped values
         cond = CC_S;
       }
       else