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[ARM] IMM support for all integer instructions that call ComputeRC. S… 
…mall FPS gains everywhere.
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@Sonicadvance1
Sonicadvance1 committed Aug 11, 2013
1 parent ef83d03 commit 42aef24
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Showing 2 changed files with 115 additions and 39 deletions.
1 change: 1 addition & 0 deletions Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
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Expand Up @@ -116,6 +116,7 @@ class JitArm : public JitBase, public ArmGen::ARMXCodeBlock

void GenerateRC(int cr = 0);
void ComputeRC(int cr = 0);
void ComputeRC(s32 value, int cr);

// OPCODES
void unknown_instruction(UGeckoInstruction _inst);
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153 changes: 114 additions & 39 deletions Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp
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Expand Up @@ -54,7 +54,19 @@ void JitArm::ComputeRC(int cr) {
STRB(rB, R9, PPCSTATE_OFF(cr_fast) + cr);
gpr.Unlock(rB);
}
void JitArm::ComputeRC(s32 value, int cr) {
ARMReg rB = gpr.GetReg();

if (value < 0)
MOV(rB, 0x8);
else if (value > 0)
MOV(rB, 0x4);
else
MOV(rB, 0x2);

STRB(rB, R9, PPCSTATE_OFF(cr_fast) + cr);
gpr.Unlock(rB);
}
void JitArm::addi(UGeckoInstruction inst)
{
INSTRUCTION_START
Expand Down Expand Up @@ -103,10 +115,17 @@ void JitArm::addx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)

ARMReg RA = gpr.R(inst.RA);
ARMReg RB = gpr.R(inst.RB);
ARMReg RD = gpr.R(inst.RD);
u32 a = inst.RA, b = inst.RB, d = inst.RD;

if (gpr.IsImm(a) && gpr.IsImm(b))
{
gpr.SetImmediate(d, gpr.GetImm(a) + gpr.GetImm(b));
if (inst.Rc) ComputeRC(gpr.GetImm(d), 0);
return;
}
ARMReg RA = gpr.R(a);
ARMReg RB = gpr.R(b);
ARMReg RD = gpr.R(d);
ADDS(RD, RA, RB);
if (inst.Rc) ComputeRC();
}
Expand All @@ -115,11 +134,20 @@ void JitArm::subfx(UGeckoInstruction inst)
INSTRUCTION_START
JITDISABLE(Integer)

ARMReg RA = gpr.R(inst.RA);
ARMReg RB = gpr.R(inst.RB);
ARMReg RD = gpr.R(inst.RD);
SUBS(RD, RB, RA);
u32 a = inst.RA, b = inst.RB, d = inst.RD;

if (inst.OE) PanicAlert("OE: subfx");

if (gpr.IsImm(a) && gpr.IsImm(b))
{
gpr.SetImmediate(d, gpr.GetImm(b) - gpr.GetImm(a));
if (inst.Rc) ComputeRC(gpr.GetImm(d), 0);
return;
}
ARMReg RA = gpr.R(a);
ARMReg RB = gpr.R(b);
ARMReg RD = gpr.R(d);
SUBS(RD, RB, RA);
if (inst.Rc) GenerateRC();
}
void JitArm::mulli(UGeckoInstruction inst)
Expand Down Expand Up @@ -163,9 +191,15 @@ void JitArm::oris(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
u32 a = inst.RA, s = inst.RS;

ARMReg RA = gpr.R(inst.RA);
ARMReg RS = gpr.R(inst.RS);
if (gpr.IsImm(s))
{
gpr.SetImmediate(a, gpr.GetImm(s) | (inst.UIMM << 16));
return;
}
ARMReg RA = gpr.R(a);
ARMReg RS = gpr.R(s);
ARMReg rA = gpr.GetReg();
MOVI2R(rA, inst.UIMM << 16);
ORR(RA, RS, rA);
Expand All @@ -176,10 +210,17 @@ void JitArm::orx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
u32 a = inst.RA, b = inst.RB, s = inst.RS;

ARMReg rA = gpr.R(inst.RA);
ARMReg rS = gpr.R(inst.RS);
ARMReg rB = gpr.R(inst.RB);
if (gpr.IsImm(b) && gpr.IsImm(s))
{
gpr.SetImmediate(a, gpr.GetImm(s) | gpr.GetImm(b));
if (inst.Rc) ComputeRC(gpr.GetImm(a), 0);
return;
}
ARMReg rA = gpr.R(a);
ARMReg rB = gpr.R(b);
ARMReg rS = gpr.R(s);
ORRS(rA, rS, rB);
if (inst.Rc)
ComputeRC();
Expand All @@ -190,9 +231,17 @@ void JitArm::xorx(UGeckoInstruction inst)
INSTRUCTION_START
JITDISABLE(Integer)

ARMReg rA = gpr.R(inst.RA);
ARMReg rS = gpr.R(inst.RS);
ARMReg rB = gpr.R(inst.RB);
u32 a = inst.RA, b = inst.RB, s = inst.RS;

if (gpr.IsImm(b) && gpr.IsImm(s))
{
gpr.SetImmediate(a, gpr.GetImm(s) ^ gpr.GetImm(b));
if (inst.Rc) ComputeRC(gpr.GetImm(a), 0);
return;
}
ARMReg rA = gpr.R(a);
ARMReg rB = gpr.R(b);
ARMReg rS = gpr.R(s);
EORS(rA, rS, rB);
if (inst.Rc)
ComputeRC();
Expand All @@ -201,25 +250,39 @@ void JitArm::extshx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
ARMReg RA, RS;
RA = gpr.R(inst.RA);
RS = gpr.R(inst.RS);
SXTH(RA, RS);
u32 a = inst.RA, s = inst.RS;

if (gpr.IsImm(s))
{
gpr.SetImmediate(a, (u32)(s32)(s16)gpr.GetImm(s));
if (inst.Rc) ComputeRC(gpr.GetImm(a), 0);
return;
}
ARMReg rA = gpr.R(a);
ARMReg rS = gpr.R(s);
SXTH(rA, rS);
if (inst.Rc){
CMP(RA, 0);
CMP(rA, 0);
ComputeRC();
}
}
void JitArm::extsbx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)
ARMReg RA, RS;
RA = gpr.R(inst.RA);
RS = gpr.R(inst.RS);
SXTB(RA, RS);
u32 a = inst.RA, s = inst.RS;

if (gpr.IsImm(s))
{
gpr.SetImmediate(a, (u32)(s32)(s8)gpr.GetImm(s));
if (inst.Rc) ComputeRC(gpr.GetImm(a), 0);
return;
}
ARMReg rA = gpr.R(a);
ARMReg rS = gpr.R(s);
SXTB(rA, rS);
if (inst.Rc){
CMP(RA, 0);
CMP(rA, 0);
ComputeRC();
}
}
Expand All @@ -228,31 +291,43 @@ void JitArm::cmp (UGeckoInstruction inst)
INSTRUCTION_START
JITDISABLE(Integer)

ARMReg RA = gpr.R(inst.RA);
ARMReg RB = gpr.R(inst.RB);
int crf = inst.CRFD;
u32 a = inst.RA, b = inst.RB;

if (gpr.IsImm(a) && gpr.IsImm(b))
{
ComputeRC((s32)gpr.GetImm(a) - (s32)gpr.GetImm(b), crf);
return;
}

ARMReg RA = gpr.R(a);
ARMReg RB = gpr.R(b);
CMP(RA, RB);

ComputeRC(crf);
}
void JitArm::cmpi(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(Integer)

ARMReg RA = gpr.R(inst.RA);
u32 a = inst.RA;
int crf = inst.CRFD;
if (inst.SIMM_16 >= 0 && inst.SIMM_16 < 256)
{
CMP(RA, inst.SIMM_16);
}
if (gpr.IsImm(a))
ComputeRC((s32)gpr.GetImm(a) - inst.SIMM_16, crf);
else
{
ARMReg rA = gpr.GetReg();
MOVI2R(rA, inst.SIMM_16);
CMP(RA, rA);
gpr.Unlock(rA);
ARMReg RA = gpr.R(a);
if (inst.SIMM_16 >= 0 && inst.SIMM_16 < 256)
CMP(RA, inst.SIMM_16);
else
{
ARMReg rA = gpr.GetReg();
MOVI2R(rA, inst.SIMM_16);
CMP(RA, rA);
gpr.Unlock(rA);
}
ComputeRC(crf);
}
ComputeRC(crf);
}
void JitArm::cmpl(UGeckoInstruction inst)
{
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