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Merge pull request #8027 from MerryMage/MOVAPS

Jit64: Prefer MOVAPS where possible
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stenzek committed May 22, 2019
2 parents 57fbf1c + e06111e commit 68877c52d11268ffe9161677959f82c7ba15f382
Showing with 18 additions and 8 deletions.
  1. +13 −3 Source/Core/Common/x64Emitter.cpp
  2. +5 −5 Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
@@ -2180,15 +2180,19 @@ void XEmitter::MOVAPS(X64Reg regOp, const OpArg& arg)
}
void XEmitter::MOVAPD(X64Reg regOp, const OpArg& arg)
{
WriteSSEOp(0x66, sseMOVAPfromRM, regOp, arg);
// Prefer MOVAPS to MOVAPD as there is no reason to use MOVAPD over MOVAPS:
// - They have equivalent functionality.
// - There has never been a microarchitecture with separate single and double domains.
// - MOVAPD is one byte longer than MOVAPS.
MOVAPS(regOp, arg);
}
void XEmitter::MOVAPS(const OpArg& arg, X64Reg regOp)
{
WriteSSEOp(0x00, sseMOVAPtoRM, regOp, arg);
}
void XEmitter::MOVAPD(const OpArg& arg, X64Reg regOp)
{
WriteSSEOp(0x66, sseMOVAPtoRM, regOp, arg);
MOVAPS(arg, regOp);
}

void XEmitter::MOVUPS(X64Reg regOp, const OpArg& arg)
@@ -2425,8 +2429,14 @@ void XEmitter::MOVDDUP(X64Reg regOp, const OpArg& arg)
}
else
{
if (!arg.IsSimpleReg(regOp))
if (!arg.IsSimpleReg())
{
MOVSD(regOp, arg);
}
else if (regOp != arg.GetSimpleReg())
{
MOVAPD(regOp, arg);
}
UNPCKLPD(regOp, R(regOp));
}
}
@@ -894,7 +894,7 @@ alignas(16) static const __m128i double_qnan_bit = _mm_set_epi64x(0xffffffffffff
// unless the exponent is in the range of 874 to 896.
void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
{
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));

// Grab Exponent
PAND(XMM1, MConst(double_exponent));
@@ -914,15 +914,15 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
PSUBQ(XMM0, R(XMM1));

// xmm1 = fraction | 0x0010000000000000
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));
PAND(XMM1, MConst(double_fraction));
POR(XMM1, MConst(double_explicit_top_bit));

// fraction >> shift
PSRLQ(XMM1, R(XMM0));

// OR the sign bit in.
MOVSD(XMM0, R(src));
MOVAPD(XMM0, R(src));
PAND(XMM0, MConst(double_sign_bit));
PSRLQ(XMM0, 32);
POR(XMM1, R(XMM0));
@@ -934,12 +934,12 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
// Don't Denormalize

// We want bits 0, 1
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));
PAND(XMM1, MConst(double_top_two_bits));
PSRLQ(XMM1, 32);

// And 5 through to 34
MOVSD(XMM0, R(src));
MOVAPD(XMM0, R(src));
PAND(XMM0, MConst(double_bottom_bits));
PSRLQ(XMM0, 29);

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