[ARM] Reenable flush per instruction with FPR cache. Something is sti…

…ll very wrong.
dolphin-emu · Sep 19, 2013 · 85f0677 · 85f0677
1 parent 930f997
commit 85f0677
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.cpp
@@ -483,6 +483,7 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
 					BKPT(0x7777);
 				}
 				JitArmTables::CompileInstruction(ops[i]);
+				fpr.Flush();
 				if (js.memcheck && (opinfo->flags & FL_LOADSTORE))
 				{
 					// Don't do this yet