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x64EmitterTest: Fix linting issues

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Sintendo committed Sep 14, 2018
1 parent 58a0d0f commit 8a93dd01054f78be15d177e3578f7db0203a3241
Showing with 26 additions and 14 deletions.
  1. +26 −14 Source/UnitTests/Common/x64EmitterTest.cpp
@@ -35,7 +35,10 @@ const std::vector<NamedReg> reg8names{
};
const std::vector<NamedReg> reg8hnames{
{AH, "ah"}, {BH, "bh"}, {CH, "ch"}, {DH, "dh"},
{AH, "ah"},
{BH, "bh"},
{CH, "ch"},
{DH, "dh"},
};
const std::vector<NamedReg> reg16names{
@@ -306,10 +309,12 @@ TEST_F(x64EmitterTest, CMOVcc_Register)
emitter->CMOVcc(32, RAX, R(R12), cc.cc);
emitter->CMOVcc(16, RAX, R(R12), cc.cc);
ExpectDisassembly("cmov" + cc.name + " rax, r12 "
"cmov" +
cc.name + " eax, r12d "
"cmov" +
ExpectDisassembly("cmov" + cc.name +
" rax, r12 "
"cmov" +
cc.name +
" eax, r12d "
"cmov" +
cc.name + " ax, r12w");
}
}
@@ -379,10 +384,12 @@ TEST_F(x64EmitterTest, MOVNT_DQ_PS_PD)
emitter->MOVNTDQ(MatR(RAX), r.reg);
emitter->MOVNTPS(MatR(RAX), r.reg);
emitter->MOVNTPD(MatR(RAX), r.reg);
ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name + " "
"movntps dqword ptr ds:[rax], " +
r.name + " "
"movntpd dqword ptr ds:[rax], " +
ExpectDisassembly("movntdq dqword ptr ds:[rax], " + r.name +
" "
"movntps dqword ptr ds:[rax], " +
r.name +
" "
"movntpd dqword ptr ds:[rax], " +
r.name);
}
}
@@ -576,7 +583,8 @@ TEST_F(x64EmitterTest, BSWAP)
int bits;
std::vector<NamedReg> regs;
} regsets[] = {
{32, reg32names}, {64, reg64names},
{32, reg32names},
{64, reg64names},
};
for (const auto& regset : regsets)
for (const auto& r : regset.regs)
@@ -889,7 +897,8 @@ TWO_OP_SSE_TEST(PMOVZXDQ, "qword")
std::string out_name; \
std::string size; \
} regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
{32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \
for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \
@@ -921,7 +930,8 @@ VEX_RMR_TEST(BZHI)
std::string out_name; \
std::string size; \
} regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
{32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \
for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \
@@ -952,7 +962,8 @@ VEX_RRM_TEST(ANDN)
std::string out_name; \
std::string size; \
} regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
{32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \
for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \
@@ -981,7 +992,8 @@ VEX_RM_TEST(BLSI)
std::string out_name; \
std::string size; \
} regsets[] = { \
{32, reg32names, "eax", "dword"}, {64, reg64names, "rax", "qword"}, \
{32, reg32names, "eax", "dword"}, \
{64, reg64names, "rax", "qword"}, \
}; \
for (const auto& regset : regsets) \
for (const auto& r : regset.regs) \

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