[ARM] rlwnmx implementation.

dolphin-emu · Sep 16, 2013 · b7f47bc · b7f47bc
1 parent 43f2313
commit b7f47bc
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Showing 3 changed files with 31 additions and 1 deletion.
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
@@ -167,6 +167,7 @@ class JitArm : public JitBase, public ArmGen::ARMXCodeBlock
 	void mulhwux(UGeckoInstruction _inst);
 	void rlwimix(UGeckoInstruction _inst);
 	void rlwinmx(UGeckoInstruction _inst);
+	void rlwnmx(UGeckoInstruction _inst);
 	void srawix(UGeckoInstruction _inst);
 	void extshx(UGeckoInstruction inst);
 	void extsbx(UGeckoInstruction inst);

diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Integer.cpp
@@ -775,6 +775,7 @@ void JitArm::rlwimix(UGeckoInstruction inst)
 	}
 	gpr.Unlock(rA, rB);
 }
+
 void JitArm::rlwinmx(UGeckoInstruction inst)
 {
 	INSTRUCTION_START
@@ -798,6 +799,34 @@ void JitArm::rlwinmx(UGeckoInstruction inst)
 
 	//m_GPR[inst.RA] = _rotl(m_GPR[inst.RS],inst.SH) & mask;
 }
+void JitArm::rlwnmx(UGeckoInstruction inst)
+{
+	INSTRUCTION_START
+	JITDISABLE(bJITIntegerOff)
+
+	u32 mask = Helper_Mask(inst.MB,inst.ME);
+	ARMReg RA = gpr.R(inst.RA);
+	ARMReg RS = gpr.R(inst.RS);
+	ARMReg RB = gpr.R(inst.RB);
+	ARMReg rA = gpr.GetReg();
+	ARMReg rB = gpr.GetReg();
+	MOVI2R(rA, mask);
+
+	// PPC rotates left, ARM rotates right. Swap it
+	MOV(rB, 32);
+	SUB(rB, rB, RB);
+
+	Operand2 Shift(RS, ST_ROR, rB); // Register shifted register	
+	if (inst.Rc)
+	{
+		ANDS(RA, rA, Shift);
+		GenerateRC();	
+	}
+	else
+		AND (RA, rA, Shift);
+	gpr.Unlock(rA, rB);
+}
+
 void JitArm::srawix(UGeckoInstruction inst)
 {
 	INSTRUCTION_START

diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp
@@ -69,7 +69,7 @@ static GekkoOPTemplate primarytable[] =
 
 	{20, &JitArm::rlwimix}, //"rlwimix",  OPTYPE_INTEGER, FL_OUT_A | FL_IN_A | FL_IN_S | FL_RC_BIT}},
 	{21, &JitArm::rlwinmx}, //"rlwinmx",  OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}},
-	{23, &JitArm::Default}, //"rlwnmx",   OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_IN_B | FL_RC_BIT}},
+	{23, &JitArm::rlwnmx}, //"rlwnmx",   OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_IN_B | FL_RC_BIT}},
 
 	{24, &JitArm::arith}, //"ori",      OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},
 	{25, &JitArm::arith}, //"oris",     OPTYPE_INTEGER, FL_OUT_A | FL_IN_S}},