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Merge pull request #6889 from lioncash/mmu

PowerPC: Move MMU-specifics from PowerPC.h to MMU.h
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Tilka committed May 18, 2018
2 parents cbc85d9 + b9aad33 commit bdce441bb9105aabc5c698ec7ab28c8509249d78
Showing with 175 additions and 126 deletions.
  1. +1 −1 Source/Core/Core/ActionReplay.cpp
  2. +1 −0 Source/Core/Core/Boot/Boot_BS2Emu.cpp
  3. +1 −0 Source/Core/Core/Core.vcxproj
  4. +3 −0 Source/Core/Core/Core.vcxproj.filters
  5. +1 −1 Source/Core/Core/Debugger/Debugger_SymbolMap.cpp
  6. +1 −0 Source/Core/Core/Debugger/PPCDebugInterface.cpp
  7. +1 −1 Source/Core/Core/Debugger/RSO.cpp
  8. +1 −0 Source/Core/Core/FifoPlayer/FifoPlayer.cpp
  9. +2 −1 Source/Core/Core/GeckoCode.cpp
  10. +2 −1 Source/Core/Core/HLE/HLE_Misc.cpp
  11. +1 −0 Source/Core/Core/HLE/HLE_OS.cpp
  12. +1 −1 Source/Core/Core/HLE/HLE_VarArgs.h
  13. +1 −1 Source/Core/Core/HW/Memmap.h
  14. +1 −0 Source/Core/Core/PatchEngine.cpp
  15. +1 −1 Source/Core/Core/PowerPC/BreakPoints.cpp
  16. +1 −0 Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
  17. +1 −0 Source/Core/Core/PowerPC/Interpreter/Interpreter_Branch.cpp
  18. +1 −0 Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStore.cpp
  19. +1 −0 Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStorePaired.cpp
  20. +1 −0 Source/Core/Core/PowerPC/Interpreter/Interpreter_SystemRegisters.cpp
  21. +1 −0 Source/Core/Core/PowerPC/Jit64/Jit.cpp
  22. +2 −0 Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
  23. +1 −0 Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
  24. +1 −0 Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStore.cpp
  25. +1 −0 Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
  26. +1 −0 Source/Core/Core/PowerPC/JitArm64/JitAsm.cpp
  27. +1 −0 Source/Core/Core/PowerPC/JitCommon/JitCache.cpp
  28. +1 −0 Source/Core/Core/PowerPC/JitInterface.cpp
  29. +2 −1 Source/Core/Core/PowerPC/MMU.cpp
  30. +121 −0 Source/Core/Core/PowerPC/MMU.h
  31. +1 −0 Source/Core/Core/PowerPC/PPCAnalyst.cpp
  32. +1 −1 Source/Core/Core/PowerPC/PPCSymbolDB.cpp
  33. +1 −1 Source/Core/Core/PowerPC/PowerPC.cpp
  34. +0 −106 Source/Core/Core/PowerPC/PowerPC.h
  35. +1 −1 Source/Core/Core/PowerPC/SignatureDB/MEGASignatureDB.cpp
  36. +1 −1 Source/Core/Core/PowerPC/SignatureDB/SignatureDB.cpp
  37. +1 −0 Source/Core/DolphinQt2/CheatsManager.cpp
  38. +1 −0 Source/Core/DolphinQt2/Debugger/CodeViewWidget.cpp
  39. +1 −0 Source/Core/DolphinQt2/Debugger/CodeWidget.cpp
  40. +3 −0 Source/Core/DolphinQt2/Debugger/MemoryViewWidget.cpp
  41. +1 −0 Source/Core/DolphinQt2/Debugger/WatchWidget.cpp
  42. +1 −1 Source/Core/DolphinQt2/MenuBar.cpp
  43. +1 −1 Source/Core/DolphinWX/Debugger/CodeView.cpp
  44. +1 −0 Source/Core/DolphinWX/Debugger/CodeWindow.cpp
  45. +1 −1 Source/Core/DolphinWX/Debugger/MemoryView.cpp
  46. +3 −4 Source/Core/DolphinWX/Debugger/WatchView.cpp
@@ -39,7 +39,7 @@
#include "Core/ARDecrypt.h"
#include "Core/ConfigManager.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/MMU.h"
namespace ActionReplay
{
@@ -26,6 +26,7 @@
#include "Core/IOS/FS/FileSystem.h"
#include "Core/IOS/IOS.h"
#include "Core/IOS/Uids.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
#include "DiscIO/Enums.h"
@@ -524,6 +524,7 @@
<ClInclude Include="PowerPC\SignatureDB\MEGASignatureDB.h" />
<ClInclude Include="PowerPC\SignatureDB\SignatureDB.h" />
<ClInclude Include="PowerPC\JitInterface.h" />
<ClInclude Include="PowerPC\MMU.h" />
<ClInclude Include="PowerPC\PowerPC.h" />
<ClInclude Include="PowerPC\PPCAnalyst.h" />
<ClInclude Include="PowerPC\PPCCache.h" />
@@ -1305,6 +1305,9 @@
<ClInclude Include="PowerPC\JitInterface.h">
<Filter>PowerPC</Filter>
</ClInclude>
<ClInclude Include="PowerPC\MMU.h">
<Filter>PowerPC</Filter>
</ClInclude>
<ClInclude Include="PowerPC\PowerPC.h">
<Filter>PowerPC</Filter>
</ClInclude>
@@ -12,7 +12,7 @@
#include "Common/StringUtil.h"
#include "Core/Core.h"
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCAnalyst.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PowerPC.h"
@@ -12,6 +12,7 @@
#include "Core/Core.h"
#include "Core/HW/DSP.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PowerPC.h"
@@ -12,8 +12,8 @@
#include "Common/CommonFuncs.h"
#include "Common/Logging/Log.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PowerPC.h"
void RSOHeaderView::Load(u32 address)
{
@@ -22,6 +22,7 @@
#include "Core/HW/SystemTimers.h"
#include "Core/HW/VideoInterface.h"
#include "Core/Host.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
#include "VideoCommon/BPMemory.h"
#include "VideoCommon/CommandProcessor.h"
@@ -12,10 +12,11 @@
#include "Common/ChunkFile.h"
#include "Common/CommonPaths.h"
#include "Common/CommonTypes.h"
#include "Common/FileUtil.h"
#include "Core/ConfigManager.h"
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
namespace Gecko
@@ -4,11 +4,12 @@
#include "Core/HLE/HLE_Misc.h"
#include "Common/Common.h"
#include "Common/CommonTypes.h"
#include "Common/Logging/Log.h"
#include "Core/GeckoCode.h"
#include "Core/HW/CPU.h"
#include "Core/Host.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
namespace HLE_Misc
@@ -12,6 +12,7 @@
#include "Common/MsgHandler.h"
#include "Common/StringUtil.h"
#include "Core/HLE/HLE_VarArgs.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
namespace HLE_OS
@@ -7,7 +7,7 @@
#include "Common/Align.h"
#include "Common/CommonTypes.h"
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
#include <type_traits>
@@ -10,7 +10,7 @@
#include "Common/CommonTypes.h"
#include "Common/MathUtil.h"
#include "Common/Swap.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/MMU.h"
// Global declarations
class PointerWrap;
@@ -24,6 +24,7 @@
#include "Core/ConfigManager.h"
#include "Core/GeckoCode.h"
#include "Core/GeckoCodeConfig.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
namespace PatchEngine
@@ -15,7 +15,7 @@
#include "Common/Logging/Log.h"
#include "Core/Core.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/MMU.h"
bool BreakPoints::IsAddressBreakPoint(u32 address) const
{
@@ -20,6 +20,7 @@
#include "Core/HLE/HLE.h"
#include "Core/HW/CPU.h"
#include "Core/Host.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCTables.h"
#include "Core/PowerPC/PowerPC.h"
@@ -8,6 +8,7 @@
#include "Core/CoreTiming.h"
#include "Core/HLE/HLE.h"
#include "Core/PowerPC/Interpreter/Interpreter.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
void Interpreter::bx(UGeckoInstruction inst)
@@ -12,6 +12,7 @@
#include "Core/PowerPC/Interpreter/Interpreter.h"
#include "Core/PowerPC/Interpreter/Interpreter_FPUtils.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
bool Interpreter::m_reserve;
@@ -12,6 +12,7 @@
#include "Common/MathUtil.h"
#include "Core/PowerPC/Interpreter/Interpreter.h"
#include "Core/PowerPC/Interpreter/Interpreter_FPUtils.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
// dequantize table
@@ -13,6 +13,7 @@
#include "Core/HW/GPFifo.h"
#include "Core/HW/SystemTimers.h"
#include "Core/PowerPC/Interpreter/Interpreter_FPUtils.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
/*
@@ -32,6 +32,7 @@
#include "Core/PowerPC/Jit64Common/Jit64PowerPCState.h"
#include "Core/PowerPC/Jit64Common/TrampolineCache.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/Profiler.h"
#if defined(_DEBUG) || defined(DEBUGFAST)
@@ -11,11 +11,13 @@
#include "Common/CPUDetect.h"
#include "Common/FloatUtils.h"
#include "Common/Intrinsics.h"
#include "Common/Swap.h"
#include "Core/HW/MMIO.h"
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/Gekko.h"
#include "Core/PowerPC/Jit64Common/Jit64Base.h"
#include "Core/PowerPC/Jit64Common/Jit64PowerPCState.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Gen;
@@ -15,6 +15,7 @@
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/JitArm64/Jit.h"
#include "Core/PowerPC/JitArmCommon/BackPatch.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Arm64Gen;
@@ -16,6 +16,7 @@
#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
#include "Core/PowerPC/JitArm64/Jit_Util.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCTables.h"
#include "Core/PowerPC/PowerPC.h"
@@ -12,6 +12,7 @@
#include "Core/CoreTiming.h"
#include "Core/PowerPC/JitArm64/Jit.h"
#include "Core/PowerPC/JitArm64/JitArm64_RegCache.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCTables.h"
#include "Core/PowerPC/PowerPC.h"
@@ -12,6 +12,7 @@
#include "Core/PowerPC/JitArm64/Jit.h"
#include "Core/PowerPC/JitCommon/JitAsmCommon.h"
#include "Core/PowerPC/JitCommon/JitCache.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Arm64Gen;
@@ -22,6 +22,7 @@
#include "Core/ConfigManager.h"
#include "Core/Core.h"
#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PowerPC.h"
@@ -25,6 +25,7 @@
#include "Core/PowerPC/CPUCoreBase.h"
#include "Core/PowerPC/CachedInterpreter/CachedInterpreter.h"
#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/Profiler.h"
@@ -2,11 +2,12 @@
// Licensed under GPLv2+
// Refer to the license.txt file included.
#include "Core/PowerPC/MMU.h"
#include <cstddef>
#include <cstring>
#include <string>
#include "Common/Atomic.h"
#include "Common/BitUtils.h"
#include "Common/CommonTypes.h"
@@ -0,0 +1,121 @@
// Copyright 2018 Dolphin Emulator Project
// Licensed under GPLv2+
// Refer to the license.txt file included.
#pragma once
#include <array>
#include <cstddef>
#include <string>
#include "Common/CommonTypes.h"
namespace PowerPC
{
// Routines for debugger UI, cheats, etc. to access emulated memory from the
// perspective of the CPU. Not for use by core emulation routines.
// Use "Host_" prefix.
u8 HostRead_U8(u32 address);
u16 HostRead_U16(u32 address);
u32 HostRead_U32(u32 address);
u64 HostRead_U64(u32 address);
float HostRead_F32(u32 address);
double HostRead_F64(u32 address);
u32 HostRead_Instruction(u32 address);
void HostWrite_U8(u8 var, u32 address);
void HostWrite_U16(u16 var, u32 address);
void HostWrite_U32(u32 var, u32 address);
void HostWrite_U64(u64 var, u32 address);
void HostWrite_F32(float var, u32 address);
void HostWrite_F64(double var, u32 address);
std::string HostGetString(u32 address, size_t size = 0);
// Returns whether a read or write to the given address will resolve to a RAM
// access given the current CPU state.
bool HostIsRAMAddress(u32 address);
// Same as HostIsRAMAddress, but uses IBAT instead of DBAT.
bool HostIsInstructionRAMAddress(u32 address);
// Routines for the CPU core to access memory.
// Used by interpreter to read instructions, uses iCache
u32 Read_Opcode(u32 address);
struct TryReadInstResult
{
bool valid;
bool from_bat;
u32 hex;
u32 physical_address;
};
TryReadInstResult TryReadInstruction(u32 address);
u8 Read_U8(u32 address);
u16 Read_U16(u32 address);
u32 Read_U32(u32 address);
u64 Read_U64(u32 address);
// Useful helper functions, used by ARM JIT
float Read_F32(u32 address);
double Read_F64(u32 address);
// used by JIT. Return zero-extended 32bit values
u32 Read_U8_ZX(u32 address);
u32 Read_U16_ZX(u32 address);
void Write_U8(u8 var, u32 address);
void Write_U16(u16 var, u32 address);
void Write_U32(u32 var, u32 address);
void Write_U64(u64 var, u32 address);
void Write_U16_Swap(u16 var, u32 address);
void Write_U32_Swap(u32 var, u32 address);
void Write_U64_Swap(u64 var, u32 address);
// Useful helper functions, used by ARM JIT
void Write_F64(double var, u32 address);
void DMA_LCToMemory(u32 mem_address, u32 cache_address, u32 num_blocks);
void DMA_MemoryToLC(u32 cache_address, u32 mem_address, u32 num_blocks);
void ClearCacheLine(u32 address); // Zeroes 32 bytes; address should be 32-byte-aligned
// TLB functions
void SDRUpdated();
void InvalidateTLBEntry(u32 address);
void DBATUpdated();
void IBATUpdated();
// Result changes based on the BAT registers and MSR.DR. Returns whether
// it's safe to optimize a read or write to this address to an unguarded
// memory access. Does not consider page tables.
bool IsOptimizableRAMAddress(u32 address);
u32 IsOptimizableMMIOAccess(u32 address, u32 access_size);
bool IsOptimizableGatherPipeWrite(u32 address);
struct TranslateResult
{
bool valid;
bool from_bat;
u32 address;
};
TranslateResult JitCache_TranslateAddress(u32 address);
constexpr int BAT_INDEX_SHIFT = 17;
constexpr u32 BAT_PAGE_SIZE = 1 << BAT_INDEX_SHIFT;
constexpr u32 BAT_MAPPED_BIT = 0x1;
constexpr u32 BAT_PHYSICAL_BIT = 0x2;
constexpr u32 BAT_RESULT_MASK = UINT32_C(~0x3);
using BatTable = std::array<u32, 1 << (32 - BAT_INDEX_SHIFT)>; // 128 KB
extern BatTable ibat_table;
extern BatTable dbat_table;
inline bool TranslateBatAddess(const BatTable& bat_table, u32* address)
{
u32 bat_result = bat_table[*address >> BAT_INDEX_SHIFT];
if ((bat_result & BAT_MAPPED_BIT) == 0)
return false;
*address = (bat_result & BAT_RESULT_MASK) | (*address & (BAT_PAGE_SIZE - 1));
return true;
}
} // namespace PowerPC
@@ -15,6 +15,7 @@
#include "Common/Logging/Log.h"
#include "Common/StringUtil.h"
#include "Core/ConfigManager.h"
#include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PPCSymbolDB.h"
#include "Core/PowerPC/PPCTables.h"
#include "Core/PowerPC/PowerPC.h"
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