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Merge pull request #1542 from Sonicadvance1/armv7-fixes

Reenables the ARMv7 FPR cache + minor ARMv7 things.
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Sonicadvance1 committed Nov 14, 2014
2 parents 00f4217 + eb7543d commit be44fdf0ec020dff2d12b0b81bf9be54fad1dfbf
@@ -153,9 +153,7 @@ if(NOT ENABLE_GENERIC)
set(_M_ARM 1)
set(_M_ARM_32 1)
add_definitions(-D_M_ARM=1 -D_M_ARM_32=1)
if(${ANDROID_NDK_ABI_NAME} MATCHES "armeabi-v7a")
add_definitions(-marm -march=armv7-a)
endif()
add_definitions(-marm -march=armv7-a)
elseif(${CMAKE_SYSTEM_PROCESSOR} MATCHES "aarch64")
# This option only applies to 64bit ARM
set(_M_ARM 1)
@@ -444,7 +444,6 @@ const u8* JitArm::DoJit(u32 em_address, PPCAnalyst::CodeBuffer *code_buf, JitBlo
BKPT(0x7777);
}
JitArmTables::CompileInstruction(ops[i]);
fpr.Flush();
if (js.memcheck && (opinfo->flags & FL_LOADSTORE))
{
// Don't do this yet
@@ -27,6 +27,7 @@ void JitArm::fctiwx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff);
FALLBACK_IF(true);
u32 b = inst.FB;
u32 d = inst.FD;

@@ -134,6 +135,8 @@ void JitArm::fctiwzx(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITFloatingPointOff);
FALLBACK_IF(true);

u32 b = inst.FB;
u32 d = inst.FD;

@@ -493,6 +496,8 @@ void JitArm::frsqrtex(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff);
FALLBACK_IF(true);

FALLBACK_IF(inst.Rc);

u32 b = inst.FB, d = inst.FD;
@@ -134,7 +134,7 @@ void JitArm::lfXX(UGeckoInstruction inst)
if (update)
MOV(RA, rB);

if (SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem)
if (false)
{
Operand2 mask(2, 1); // ~(Memory::MEMVIEW32_MASK)
BIC(rB, rB, mask); // 1
@@ -301,7 +301,8 @@ void JitArm::stfXX(UGeckoInstruction inst)
MOV(RA, rB);
SetCC();
}
if (SConfig::GetInstance().m_LocalCoreStartupParameter.bFastmem)

if (false)
{
Operand2 mask(2, 1); // ~(Memory::MEMVIEW32_MASK)
BIC(rB, rB, mask); // 1
@@ -21,6 +21,8 @@ void JitArm::ps_rsqrte(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff);
FALLBACK_IF(true);

FALLBACK_IF(inst.Rc);

u32 b = inst.FB, d = inst.FD;

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