Merge pull request #10454 from Pokechu22/pi-fifo-reset

ProcessorInterface: Implement PI_FIFO_RESET
dolphin-emu · May 14, 2022 · be75273 · be75273
2 parents fcb3f9e + b8cca8f
commit be75273
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Showing 2 changed files with 6 additions and 2 deletions.
diff --git a/Source/Core/Core/HW/ProcessorInterface.cpp b/Source/Core/Core/HW/ProcessorInterface.cpp
@@ -18,6 +18,7 @@
 #include "Core/IOS/IOS.h"
 #include "Core/IOS/STM/STM.h"
 #include "Core/PowerPC/PowerPC.h"
+#include "VideoCommon/Fifo.h"
 
 namespace ProcessorInterface
 {
@@ -111,7 +112,10 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
 
   mmio->Register(base | PI_FIFO_RESET, MMIO::InvalidRead<u32>(),
                  MMIO::ComplexWrite<u32>([](u32, u32 val) {
-                   WARN_LOG_FMT(PROCESSORINTERFACE, "Fifo reset ({:08x})", val);
+                   // Used by GXAbortFrame
+                   INFO_LOG_FMT(PROCESSORINTERFACE, "Wrote PI_FIFO_RESET: {:08x}", val);
+                   if ((val & 1) != 0)
+                     Fifo::ResetVideoBuffer();
                  }));
 
   mmio->Register(base | PI_RESET_CODE, MMIO::ComplexRead<u32>([](u32) {

diff --git a/Source/Core/Core/HW/ProcessorInterface.h b/Source/Core/Core/HW/ProcessorInterface.h
@@ -46,7 +46,7 @@ enum
   PI_FIFO_BASE = 0x0C,
   PI_FIFO_END = 0x10,
   PI_FIFO_WPTR = 0x14,
-  PI_FIFO_RESET = 0x18,  // ??? - GXAbortFrame writes to it
+  PI_FIFO_RESET = 0x18,  // Used by GXAbortFrame
   PI_RESET_CODE = 0x24,
   PI_FLIPPER_REV = 0x2C,
   PI_FLIPPER_UNK = 0x30  // BS1 writes 0x0245248A to it - prolly some bootstrap thing