[ARM] Add NEON VORR and fix encoding on NEON VEOR. Remove VMRS_APSR b…

…ecause it is the same as VMRS(PC)
dolphin-emu · Sep 16, 2013 · beb41a8 · beb41a8
1 parent f0fc611
commit beb41a8
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Showing 2 changed files with 14 additions and 4 deletions.
diff --git a/Source/Core/Common/Src/ArmEmitter.cpp b/Source/Core/Common/Src/ArmEmitter.cpp
@@ -1069,9 +1069,6 @@ void ARMXEmitter::VSTR(ARMReg Src, ARMReg Base, s16 offset)
 	}
 }
 
-void ARMXEmitter::VMRS_APSR() {
-	Write32(condition | 0xEF10A10 | (15 << 12));
-}
 void ARMXEmitter::VMRS(ARMReg Rt) {
 	Write32(condition | (0xEF << 20) | (1 << 16) | (Rt << 12) | 0xA10);
 }
@@ -1339,12 +1336,25 @@ void NEONXEmitter::VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
 {
 	bool register_quad = Vd >= Q0;
 	Vd = SubBase(Vd);
+	Vn = SubBase(Vn);
 	Vm = SubBase(Vm);
 
 	Write32((0xF3 << 24) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
 			| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3) 
 			| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
 }
+void NEONXEmitter::VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm)
+{
+	bool register_quad = Vd >= Q0;
+	Vd = SubBase(Vd);
+	Vn = SubBase(Vn);
+	Vm = SubBase(Vm);
+
+	Write32((0xF2 << 24) | (0x1 << 21) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16)
+			| ((Vd & 0xF) << 12) | (1 << 8) | ((Vn & 0x10) << 3) 
+			| (register_quad << 6) | ((Vm & 0x10) << 1) | (1 << 4) | (Vm & 0xF));
+}
+
 
 }
 
diff --git a/Source/Core/Common/Src/ArmEmitter.h b/Source/Core/Common/Src/ArmEmitter.h
@@ -561,7 +561,6 @@ class ARMXEmitter
 	void VMOV(ARMReg Dest, ARMReg Src);
 	void VCVT(ARMReg Dest, ARMReg Src, int flags);
 
-	void VMRS_APSR();
 	void VMRS(ARMReg Rt);
 	void VMSR(ARMReg Rt);
 
@@ -636,6 +635,7 @@ class NEONXEmitter
 	void VREV16(NEONElementType Size, ARMReg Vd, ARMReg Vm);
 
 	void VEOR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
+	void VORR(ARMReg Vd, ARMReg Vn, ARMReg Vm);
 
 	void VLD1(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);
 	void VLD2(NEONElementType Size, ARMReg Vd, ARMReg Rn, NEONAlignment align = ALIGN_NONE, ARMReg Rm = _PC);