Merge branch 'arm-storemerge'

Source/Core/Core/Src/PowerPC/JitArm32/Jit.h

@@ -124,9 +124,11 @@ class JitArm : public JitBase, public ArmGen::ARMXCodeBlock
 	void FinalizeCarry(ARMReg reg);
 
 	// TODO: This shouldn't be here
-	void StoreFromReg(ARMReg dest, ARMReg value, int accessSize, s32 offset);
+	void UnsafeStoreFromReg(ARMReg dest, ARMReg value, int accessSize, s32 offset);
+	void SafeStoreFromReg(bool fastmem, s32 dest, u32 value, s32 offsetReg, int accessSize, s32 offset);
 	void LoadToReg(ARMReg dest, ARMReg addr, int accessSize, s32 offset);
 
+
 	// OPCODES
 	void unknown_instruction(UGeckoInstruction _inst);
 	void Default(UGeckoInstruction _inst);
@@ -173,20 +175,15 @@ class JitArm : public JitBase, public ArmGen::ARMXCodeBlock
 	void mftb(UGeckoInstruction _inst);
 
 	// LoadStore
+	void stX(UGeckoInstruction _inst);
+
 	void icbi(UGeckoInstruction _inst);
 	void dcbst(UGeckoInstruction _inst);
 	void lbz(UGeckoInstruction _inst);
 	void lhz(UGeckoInstruction _inst);
 	void lha(UGeckoInstruction _inst);
 	void lwz(UGeckoInstruction _inst);
 	void lwzx(UGeckoInstruction _inst);
-	void stb(UGeckoInstruction _inst);
-	void stbu(UGeckoInstruction _inst);
-	void sth(UGeckoInstruction _inst);
-	void sthu(UGeckoInstruction _inst);
-	void stw(UGeckoInstruction _inst);
-	void stwu(UGeckoInstruction _inst);
-	void stwx(UGeckoInstruction _inst);
 
 	// Floating point
 	void fabsx(UGeckoInstruction _inst);

Source/Core/Core/Src/PowerPC/JitArm32/JitArm_BackPatch.cpp

@@ -24,25 +24,6 @@
 #include "../JitCommon/JitBackpatch.h"
 #include "StringUtil.h"
 
-#ifdef _M_X64
-static void BackPatchError(const std::string &text, u8 *codePtr, u32 emAddress) {
-	u64 code_addr = (u64)codePtr;
-	disassembler disasm;
-	char disbuf[256];
-	memset(disbuf, 0, 256);
-#ifdef _M_IX86
-	disasm.disasm32(0, code_addr, codePtr, disbuf);
-#else
-	disasm.disasm64(0, code_addr, codePtr, disbuf);
-#endif
-	PanicAlert("%s\n\n"
-       "Error encountered accessing emulated address %08x.\n"
-	   "Culprit instruction: \n%s\nat %#llx",
-	   text.c_str(), emAddress, disbuf, code_addr);
-	return;
-}
-#endif
-
 // This generates some fairly heavy trampolines, but:
 // 1) It's really necessary. We don't know anything about the context.
 // 2) It doesn't really hurt. Only instructions that access I/O will get these, and there won't be 
@@ -96,7 +77,7 @@ bool DisamLoadStore(const u32 inst, ARMReg &rD, u8 &accessSize, bool &Store)
 	}
 	return true;
 }
-const u8 *JitArm::BackPatch(u8 *codePtr, u32 emAddress, void *ctx_void)
+const u8 *JitArm::BackPatch(u8 *codePtr, u32, void *ctx_void)
 {
 	// TODO: This ctx needs to be filled with our information
 	CONTEXT *ctx = (CONTEXT *)ctx_void;