Merge pull request #7896 from CrystalGamma/pr-reserve

PowerPC: Move lwarx/stwcxd. reservation into PowerPCState
dolphin-emu · Jul 21, 2021 · d1beb9e · d1beb9e
2 parents 462af20 + c991904
commit d1beb9e
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Showing 6 changed files with 17 additions and 15 deletions.
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
@@ -104,7 +104,6 @@ void Interpreter::RunTable63(UGeckoInstruction inst)
 void Interpreter::Init()
 {
   InitializeInstructionTables();
-  m_reserve = false;
   m_end_block = false;
 }
 

diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter.h b/Source/Core/Core/PowerPC/Interpreter/Interpreter.h
@@ -298,9 +298,4 @@ class Interpreter : public CPUCoreBase
   UGeckoInstruction m_prev_inst{};
 
   static bool m_end_block;
-
-  // TODO: These should really be in the save state, although it's unlikely to matter much.
-  // They are for lwarx and its friend stwcxd.
-  static bool m_reserve;
-  static u32 m_reserve_address;
 };
diff --git a/Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStore.cpp b/Source/Core/Core/PowerPC/Interpreter/Interpreter_LoadStore.cpp
@@ -15,9 +15,6 @@
 #include "Core/PowerPC/MMU.h"
 #include "Core/PowerPC/PowerPC.h"
 
-bool Interpreter::m_reserve;
-u32 Interpreter::m_reserve_address;
-
 static u32 Helper_Get_EA(const PowerPC::PowerPCState& ppcs, const UGeckoInstruction inst)
 {
   return inst.RA ? (ppcs.gpr[inst.RA] + inst.SIMM_16) : (u32)inst.SIMM_16;
@@ -992,8 +989,8 @@ void Interpreter::lwarx(UGeckoInstruction inst)
   if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
   {
     rGPR[inst.RD] = temp;
-    m_reserve = true;
-    m_reserve_address = address;
+    PowerPC::ppcState.reserve = true;
+    PowerPC::ppcState.reserve_address = address;
   }
 }
 
@@ -1008,14 +1005,14 @@ void Interpreter::stwcxd(UGeckoInstruction inst)
     return;
   }
 
-  if (m_reserve)
+  if (PowerPC::ppcState.reserve)
   {
-    if (address == m_reserve_address)
+    if (address == PowerPC::ppcState.reserve_address)
     {
       PowerPC::Write_U32(rGPR[inst.RS], address);
       if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
       {
-        m_reserve = false;
+        PowerPC::ppcState.reserve = false;
         PowerPC::ppcState.cr.SetField(0, 2 | PowerPC::GetXER_SO());
         return;
       }

diff --git a/Source/Core/Core/PowerPC/PowerPC.cpp b/Source/Core/Core/PowerPC/PowerPC.cpp
@@ -125,6 +125,9 @@ void DoState(PointerWrap& p)
   p.Do(ppcState.pagetable_base);
   p.Do(ppcState.pagetable_hashmask);
 
+  p.Do(ppcState.reserve);
+  p.Do(ppcState.reserve_address);
+
   ppcState.iCache.DoState(p);
 
   if (p.GetMode() == PointerWrap::MODE_READ)
@@ -175,6 +178,10 @@ static void ResetRegisters()
   ppcState.pc = 0;
   ppcState.npc = 0;
   ppcState.Exceptions = 0;
+
+  ppcState.reserve = false;
+  ppcState.reserve_address = 0;
+
   for (auto& v : ppcState.cr.fields)
   {
     v = 0x8000000000000001;

diff --git a/Source/Core/Core/PowerPC/PowerPC.h b/Source/Core/Core/PowerPC/PowerPC.h
@@ -167,6 +167,10 @@ struct PowerPCState
 
   InstructionCache iCache;
 
+  // Reservation monitor for lwarx and its friend stwcxd.
+  bool reserve;
+  u32 reserve_address;
+
   void UpdateCR1()
   {
     cr.SetField(1, (fpscr.FX << 3) | (fpscr.FEX << 2) | (fpscr.VX << 1) | fpscr.OX);

diff --git a/Source/Core/Core/State.cpp b/Source/Core/Core/State.cpp
@@ -73,7 +73,7 @@ static Common::Event g_compressAndDumpStateSyncEvent;
 static std::thread g_save_thread;
 
 // Don't forget to increase this after doing changes on the savestate system
-constexpr u32 STATE_VERSION = 133;  // Last changed in PR 9600
+constexpr u32 STATE_VERSION = 134;  // Last changed in PR 7896
 
 // Maps savestate versions to Dolphin versions.
 // Versions after 42 don't need to be added to this list,