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Jit_LoadStore: Ra needs to be ReadWrite when writeback is required

This was an erronous change in 534db3b, Ra was previously loaded but was changed to not being loaded.
Why is loading necessary? Loading is necessary because when a memory exception occurs, the current
register values are flushed. This occurs before a new value is loaded into Ra, so the previous value
is required in Ra.
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MerryMage committed Nov 10, 2018
1 parent 0e1cca5 commit df08a778120185680e3393f23a508f92b6297018
Showing with 1 addition and 1 deletion.
  1. +1 −1 Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
@@ -244,7 +244,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
RCX64Reg Ra = (update && storeAddress) ? gpr.Bind(a, RCMode::Write) : RCX64Reg{};
RCX64Reg Ra = (update && storeAddress) ? gpr.Bind(a, RCMode::ReadWrite) : RCX64Reg{};
RegCache::Realize(opAddress, Ra, Rd);
BitSet32 registersInUse = CallerSavedRegistersInUse();

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