Skip to content
Permalink
Browse files

EmuCodeBlock: Prefer MOVAPS to MOVSD in ConvertDoubleToSingle

* The high half of the register is immediately masked so the value in it is irrelevant.
* MOVSD produces an unnecessary dependency on the high half of regOp.
* MOVAPS is implemented as a register rename on modern microarchitectures.
  • Loading branch information...
MerryMage committed Apr 23, 2019
1 parent 1baa8ee commit e06111e86fe1ea145044e7acc848b1253babe6d4
Showing with 5 additions and 5 deletions.
  1. +5 −5 Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
@@ -894,7 +894,7 @@ alignas(16) static const __m128i double_qnan_bit = _mm_set_epi64x(0xffffffffffff
// unless the exponent is in the range of 874 to 896.
void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
{
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));

// Grab Exponent
PAND(XMM1, MConst(double_exponent));
@@ -914,15 +914,15 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
PSUBQ(XMM0, R(XMM1));

// xmm1 = fraction | 0x0010000000000000
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));
PAND(XMM1, MConst(double_fraction));
POR(XMM1, MConst(double_explicit_top_bit));

// fraction >> shift
PSRLQ(XMM1, R(XMM0));

// OR the sign bit in.
MOVSD(XMM0, R(src));
MOVAPD(XMM0, R(src));
PAND(XMM0, MConst(double_sign_bit));
PSRLQ(XMM0, 32);
POR(XMM1, R(XMM0));
@@ -934,12 +934,12 @@ void EmuCodeBlock::ConvertDoubleToSingle(X64Reg dst, X64Reg src)
// Don't Denormalize

// We want bits 0, 1
MOVSD(XMM1, R(src));
MOVAPD(XMM1, R(src));
PAND(XMM1, MConst(double_top_two_bits));
PSRLQ(XMM1, 32);

// And 5 through to 34
MOVSD(XMM0, R(src));
MOVAPD(XMM0, R(src));
PAND(XMM0, MConst(double_bottom_bits));
PSRLQ(XMM0, 29);

0 comments on commit e06111e

Please sign in to comment.
You can’t perform that action at this time.