[ARM] Disable lmw when fastmem is disabled.

dolphin-emu · Sep 12, 2013 · fa5499e · fa5499e
1 parent d9dd0a7
commit fa5499e
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Showing 2 changed files with 10 additions and 1 deletion.
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
@@ -134,6 +134,9 @@ void JitArm::SafeStoreFromReg(bool fastmem, s32 dest, u32 value, s32 regOffset,
 
 void JitArm::stX(UGeckoInstruction inst)
 {
+	INSTRUCTION_START
+	JITDISABLE(bJITLoadStoreOff)
+
 	u32 a = inst.RA, b = inst.RB, s = inst.RS;
 	s32 offset = inst.SIMM_16;
 	u32 accessSize = 0;
@@ -455,6 +458,12 @@ void JitArm::lXX(UGeckoInstruction inst)
 // We make the assumption that this pulls from main RAM at /all/ times
 void JitArm::lmw(UGeckoInstruction inst)
 {
+	INSTRUCTION_START
+	JITDISABLE(bJITLoadStoreOff)
+	if (!Core::g_CoreStartupParameter.bFastmem){
+		Default(inst); return;
+	}
+
 	u32 a = inst.RA;
 	ARMReg rA = gpr.GetReg();
 	ARMReg rB = gpr.GetReg();

diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
@@ -71,7 +71,6 @@ void JitArm::mfspr(UGeckoInstruction inst)
 	JITDISABLE(bJITSystemRegistersOff)
 
 	u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
-	ARMReg RD = gpr.R(inst.RD);
 	switch (iIndex)
 	{
 	case SPR_WPAR:
@@ -81,6 +80,7 @@ void JitArm::mfspr(UGeckoInstruction inst)
 		Default(inst);
 		return;
 	default:
+		ARMReg RD = gpr.R(inst.RD);
 		LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4);
 		break;
 	}