From fc16a78f6ae313385ba1d2ac14e2b22462950103 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Thu, 22 Mar 2018 15:41:34 -0400 Subject: [PATCH] Jit_Integer: Handle NOP case for xori and xoris Like ori and oris, xori and xoris can also be used to introduce a NOP. In that case, just don't do anything. --- Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp | 14 +++++++++++--- .../Core/PowerPC/JitArm64/JitArm64_Integer.cpp | 13 ++++++++++--- 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index cf7df035fa5c..241a5fe52bd0 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -326,11 +326,19 @@ void Jit64::reg_imm(UGeckoInstruction inst) regimmop(a, s, true, inst.UIMM << 16, And, &XEmitter::AND, true); break; case 26: // xori - regimmop(a, s, true, inst.UIMM, Xor, &XEmitter::XOR, false); - break; case 27: // xoris - regimmop(a, s, true, inst.UIMM << 16, Xor, &XEmitter::XOR, false); + { + if (s == a && inst.UIMM == 0) + { + // Make the nop visible in the generated code. + NOP(); + return; + } + + const u32 immediate = inst.OPCD == 26 ? inst.UIMM : inst.UIMM << 16; + regimmop(a, s, true, immediate, Xor, &XEmitter::XOR, false); break; + } case 12: // addic regimmop(d, a, false, (u32)(s32)inst.SIMM_16, Add, &XEmitter::ADD, false, true); break; diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp index 487f976a3dc1..82c9e1180046 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp @@ -142,12 +142,19 @@ void JitArm64::arith_imm(UGeckoInstruction inst) reg_imm(a, s, inst.UIMM << 16, BitAND, &ARM64XEmitter::ANDI2R, true); break; case 26: // xori - reg_imm(a, s, inst.UIMM, BitXOR, &ARM64XEmitter::EORI2R); - break; case 27: // xoris - reg_imm(a, s, inst.UIMM << 16, BitXOR, &ARM64XEmitter::EORI2R); + { + if (a == s && inst.UIMM == 0) + { + // NOP + return; + } + + const u32 immediate = inst.OPCD == 26 ? inst.UIMM : inst.UIMM << 16; + reg_imm(a, s, immediate, BitXOR, &ARM64XEmitter::EORI2R); break; } + } } void JitArm64::addix(UGeckoInstruction inst)