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Jit_FloatingPoint: fselx

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MerryMage committed Oct 15, 2018
1 parent d62ca40 commit fecbf091e5d4ef21d18c1c4bf4f94461d5a82d64
Showing with 14 additions and 11 deletions.
  1. +14 −11 Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp
@@ -417,35 +417,38 @@ void Jit64::fselx(UGeckoInstruction inst)
bool packed = inst.OPCD == 4; // ps_sel
fpr.Lock(a, b, c, d);
RCOpArg Ra = fpr.Use(a, RCMode::Read);
RCOpArg Rb = fpr.Use(b, RCMode::Read);
RCOpArg Rc = fpr.Use(c, RCMode::Read);
RCX64Reg Rd = fpr.Bind(d, packed ? RCMode::Write : RCMode::ReadWrite);
RegCache::Realize(Ra, Rb, Rc, Rd);
XORPD(XMM0, R(XMM0));
// This condition is very tricky; there's only one right way to handle both the case of
// negative/positive zero and NaN properly.
// (a >= -0.0 ? c : b) transforms into (0 > a ? b : c), hence the NLE.
if (packed)
CMPPD(XMM0, fpr.R(a), CMP_NLE);
CMPPD(XMM0, Ra, CMP_NLE);
else
CMPSD(XMM0, fpr.R(a), CMP_NLE);
CMPSD(XMM0, Ra, CMP_NLE);
if (cpu_info.bSSE4_1)
{
MOVAPD(XMM1, fpr.R(c));
BLENDVPD(XMM1, fpr.R(b));
MOVAPD(XMM1, Rc);
BLENDVPD(XMM1, Rb);
}
else
{
MOVAPD(XMM1, R(XMM0));
ANDPD(XMM0, fpr.R(b));
ANDNPD(XMM1, fpr.R(c));
ANDPD(XMM0, Rb);
ANDNPD(XMM1, Rc);
ORPD(XMM1, R(XMM0));
}
fpr.BindToRegister(d, !packed);
if (packed)
MOVAPD(fpr.RX(d), R(XMM1));
MOVAPD(Rd, R(XMM1));
else
MOVSD(fpr.RX(d), R(XMM1));
fpr.UnlockAll();
MOVSD(Rd, R(XMM1));
}
void Jit64::fmrx(UGeckoInstruction inst)

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