diff --git a/Source/Core/Core/HW/ProcessorInterface.h b/Source/Core/Core/HW/ProcessorInterface.h
@@ -7,6 +7,14 @@
 
 class PointerWrap;
 
+namespace Core
+{
+class System;
+}
+namespace CoreTiming
+{
+struct EventType;
+}
 namespace MMIO
 {
 class Mapping;
@@ -52,30 +60,46 @@ enum
   PI_FLIPPER_UNK = 0x30  // BS1 writes 0x0245248A to it - prolly some bootstrap thing
 };
 
-extern u32 m_InterruptCause;
-extern u32 m_InterruptMask;
-extern u32 Fifo_CPUBase;
-extern u32 Fifo_CPUEnd;
-extern u32 Fifo_CPUWritePointer;
+class ProcessorInterfaceManager
+{
+public:
+  void Init();
+  void DoState(PointerWrap& p);
 
-void Init();
-void DoState(PointerWrap& p);
+  void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
 
-void RegisterMMIO(MMIO::Mapping* mmio, u32 base);
+  u32 GetMask() const { return m_interrupt_mask; }
+  u32 GetCause() const { return m_interrupt_cause; }
 
-inline u32 GetMask()
-{
-  return m_InterruptMask;
-}
-inline u32 GetCause()
-{
-  return m_InterruptCause;
-}
+  void SetInterrupt(u32 cause_mask, bool set = true);
+
+  // Thread-safe func which sets and clears reset button state automagically
+  void ResetButton_Tap();
+  void PowerButton_Tap();
+
+  u32 m_interrupt_cause = 0;
+  u32 m_interrupt_mask = 0;
+
+  // addresses for CPU fifo accesses
+  u32 m_fifo_cpu_base = 0;
+  u32 m_fifo_cpu_end = 0;
+  u32 m_fifo_cpu_write_pointer = 0;
 
-void SetInterrupt(u32 cause_mask, bool set = true);
+private:
+  // Let the PPC know that an external exception is set/cleared
+  void UpdateException();
 
-// Thread-safe func which sets and clears reset button state automagically
-void ResetButton_Tap();
-void PowerButton_Tap();
+  void SetResetButton(bool set);
 
+  // ID and callback for scheduling reset button presses/releases
+  static void ToggleResetButtonCallback(Core::System& system, u64 userdata, s64 cyclesLate);
+  static void IOSNotifyResetButtonCallback(Core::System& system, u64 userdata, s64 cyclesLate);
+  static void IOSNotifyPowerButtonCallback(Core::System& system, u64 userdata, s64 cyclesLate);
+
+  CoreTiming::EventType* m_event_type_toggle_reset_button = nullptr;
+  CoreTiming::EventType* m_event_type_ios_notify_reset_button = nullptr;
+  CoreTiming::EventType* m_event_type_ios_notify_power_button = nullptr;
+
+  u32 m_reset_code = 0;
+};
 }  // namespace ProcessorInterface
diff --git a/Source/Core/Core/HW/SI/SI.cpp b/Source/Core/Core/HW/SI/SI.cpp
@@ -253,7 +253,8 @@ static void ChangeDeviceCallback(Core::System& system, u64 user_data, s64 cycles
 static void UpdateInterrupts()
 {
   // check if we have to update the RDSTINT flag
-  auto& state = Core::System::GetInstance().GetSerialInterfaceState().GetData();
+  auto& system = Core::System::GetInstance();
+  auto& state = system.GetSerialInterfaceState().GetData();
   if (state.status_reg.RDST0 || state.status_reg.RDST1 || state.status_reg.RDST2 ||
       state.status_reg.RDST3)
   {
@@ -268,7 +269,7 @@ static void UpdateInterrupts()
   const bool generate_interrupt = (state.com_csr.RDSTINT & state.com_csr.RDSTINTMSK) != 0 ||
                                   (state.com_csr.TCINT & state.com_csr.TCINTMSK) != 0;
 
-  ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_SI, generate_interrupt);
+  system.GetProcessorInterface().SetInterrupt(ProcessorInterface::INT_CAUSE_SI, generate_interrupt);
 }
 
 static void GenerateSIInterrupt(SIInterruptType type)

diff --git a/Source/Core/Core/HW/SI/SI_DeviceGCController.cpp b/Source/Core/Core/HW/SI/SI_DeviceGCController.cpp
@@ -269,13 +269,14 @@ CSIDevice_GCController::HandleButtonCombos(const GCPadStatus& pad_status)
 
   if (m_last_button_combo != COMBO_NONE)
   {
-    const u64 current_time = Core::System::GetInstance().GetCoreTiming().GetTicks();
+    auto& system = Core::System::GetInstance();
+    const u64 current_time = system.GetCoreTiming().GetTicks();
     if (u32(current_time - m_timer_button_combo_start) > SystemTimers::GetTicksPerSecond() * 3)
     {
       if (m_last_button_combo == COMBO_RESET)
       {
         INFO_LOG_FMT(SERIALINTERFACE, "PAD - COMBO_RESET");
-        ProcessorInterface::ResetButton_Tap();
+        system.GetProcessorInterface().ResetButton_Tap();
       }
       else if (m_last_button_combo == COMBO_ORIGIN)
       {

diff --git a/Source/Core/Core/HW/VideoInterface.cpp b/Source/Core/Core/HW/VideoInterface.cpp
@@ -424,17 +424,18 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
 
 void UpdateInterrupts()
 {
-  auto& state = Core::System::GetInstance().GetVideoInterfaceState().GetData();
+  auto& system = Core::System::GetInstance();
+  auto& state = system.GetVideoInterfaceState().GetData();
   if ((state.interrupt_register[0].IR_INT && state.interrupt_register[0].IR_MASK) ||
       (state.interrupt_register[1].IR_INT && state.interrupt_register[1].IR_MASK) ||
       (state.interrupt_register[2].IR_INT && state.interrupt_register[2].IR_MASK) ||
       (state.interrupt_register[3].IR_INT && state.interrupt_register[3].IR_MASK))
   {
-    ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_VI, true);
+    system.GetProcessorInterface().SetInterrupt(ProcessorInterface::INT_CAUSE_VI, true);
   }
   else
   {
-    ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_VI, false);
+    system.GetProcessorInterface().SetInterrupt(ProcessorInterface::INT_CAUSE_VI, false);
   }
 }
 

diff --git a/Source/Core/Core/HW/WII_IPC.cpp b/Source/Core/Core/HW/WII_IPC.cpp
@@ -298,8 +298,8 @@ static void UpdateInterrupts(Core::System& system, u64 userdata, s64 cyclesLate)
   }
 
   // Generate interrupt on PI if any of the devices behind starlet have an interrupt and mask is set
-  ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_WII_IPC,
-                                   !!(ppc_irq_flags & ppc_irq_masks));
+  system.GetProcessorInterface().SetInterrupt(ProcessorInterface::INT_CAUSE_WII_IPC,
+                                              !!(ppc_irq_flags & ppc_irq_masks));
 }
 
 void ClearX1()

diff --git a/Source/Core/Core/Movie.cpp b/Source/Core/Core/Movie.cpp
@@ -1273,7 +1273,10 @@ void PlayController(GCPadStatus* PadStatus, int controllerID)
   }
 
   if (s_padState.reset)
-    ProcessorInterface::ResetButton_Tap();
+  {
+    auto& system = Core::System::GetInstance();
+    system.GetProcessorInterface().ResetButton_Tap();
+  }
 
   SetInputDisplayString(s_padState, controllerID);
   CheckInputEnd();

diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp
@@ -1044,7 +1044,8 @@ bool Jit64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       SetJumpTarget(extException);
       TEST(32, PPCSTATE(msr), Imm32(0x0008000));
       FixupBranch noExtIntEnable = J_CC(CC_Z, true);
-      MOV(64, R(RSCRATCH), ImmPtr(&ProcessorInterface::m_InterruptCause));
+      auto& system = Core::System::GetInstance();
+      MOV(64, R(RSCRATCH), ImmPtr(&system.GetProcessorInterface().m_interrupt_cause));
       TEST(32, MatR(RSCRATCH),
            Imm32(ProcessorInterface::INT_CAUSE_CP | ProcessorInterface::INT_CAUSE_PE_TOKEN |
                  ProcessorInterface::INT_CAUSE_PE_FINISH));

diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
@@ -452,7 +452,8 @@ void Jit64::mtmsr(UGeckoInstruction inst)
   FixupBranch noExceptionsPending = J_CC(CC_Z, true);
 
   // Check if a CP interrupt is waiting and keep the GPU emulation in sync (issue 4336)
-  MOV(64, R(RSCRATCH), ImmPtr(&ProcessorInterface::m_InterruptCause));
+  auto& system = Core::System::GetInstance();
+  MOV(64, R(RSCRATCH), ImmPtr(&system.GetProcessorInterface().m_interrupt_cause));
   TEST(32, MatR(RSCRATCH), Imm32(ProcessorInterface::INT_CAUSE_CP));
   FixupBranch cpInt = J_CC(CC_NZ);
 

diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp
@@ -979,8 +979,9 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       SetJumpTarget(exception);
       LDR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(msr));
       TBZ(ARM64Reg::W30, 15, done_here);  // MSR.EE
+      auto& system = Core::System::GetInstance();
       LDR(IndexType::Unsigned, ARM64Reg::W30, ARM64Reg::X30,
-          MOVPage2R(ARM64Reg::X30, &ProcessorInterface::m_InterruptCause));
+          MOVPage2R(ARM64Reg::X30, &system.GetProcessorInterface().m_interrupt_cause));
       constexpr u32 cause_mask = ProcessorInterface::INT_CAUSE_CP |
                                  ProcessorInterface::INT_CAUSE_PE_TOKEN |
                                  ProcessorInterface::INT_CAUSE_PE_FINISH;
@@ -1015,7 +1016,9 @@ bool JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC)
       SetJumpTarget(exception);
       LDR(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(msr));
       TBZ(WA, 15, done_here);  // MSR.EE
-      LDR(IndexType::Unsigned, WA, XA, MOVPage2R(XA, &ProcessorInterface::m_InterruptCause));
+      auto& system = Core::System::GetInstance();
+      LDR(IndexType::Unsigned, WA, XA,
+          MOVPage2R(XA, &system.GetProcessorInterface().m_interrupt_cause));
       constexpr u32 cause_mask = ProcessorInterface::INT_CAUSE_CP |
                                  ProcessorInterface::INT_CAUSE_PE_TOKEN |
                                  ProcessorInterface::INT_CAUSE_PE_FINISH;

diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
@@ -255,8 +255,8 @@ static T ReadFromHardware(Memory::MemoryManager& memory, u32 em_address)
 }
 
 template <XCheckTLBFlag flag, bool never_translate = false>
-static void WriteToHardware(Memory::MemoryManager& memory, u32 em_address, const u32 data,
-                            const u32 size)
+static void WriteToHardware(Core::System& system, Memory::MemoryManager& memory, u32 em_address,
+                            const u32 data, const u32 size)
 {
   DEBUG_ASSERT(size <= 4);
 
@@ -269,9 +269,10 @@ static void WriteToHardware(Memory::MemoryManager& memory, u32 em_address, const
     // Note that "word" means 32-bit, so paired singles or doubles might still be 32-bit aligned!
     const u32 first_half_size = em_address_end_page - em_address;
     const u32 second_half_size = size - first_half_size;
-    WriteToHardware<flag, never_translate>(memory, em_address,
+    WriteToHardware<flag, never_translate>(system, memory, em_address,
                                            std::rotr(data, second_half_size * 8), first_half_size);
-    WriteToHardware<flag, never_translate>(memory, em_address_end_page, data, second_half_size);
+    WriteToHardware<flag, never_translate>(system, memory, em_address_end_page, data,
+                                           second_half_size);
     return;
   }
 
@@ -376,16 +377,16 @@ static void WriteToHardware(Memory::MemoryManager& memory, u32 em_address, const
     // TODO: This interrupt is supposed to have associated cause and address registers
     // TODO: This should trigger the hwtest's interrupt handling, but it does not seem to
     //       (https://github.com/dolphin-emu/hwtests/pull/42)
-    ProcessorInterface::SetInterrupt(ProcessorInterface::INT_CAUSE_PI);
+    system.GetProcessorInterface().SetInterrupt(ProcessorInterface::INT_CAUSE_PI);
 
     const u32 rotated_data = std::rotr(data, ((em_address & 0x3) + size) * 8);
 
     const u32 start_addr = Common::AlignDown(em_address, 8);
     const u32 end_addr = Common::AlignUp(em_address + size, 8);
     for (u32 addr = start_addr; addr != end_addr; addr += 8)
     {
-      WriteToHardware<flag, true>(memory, addr, rotated_data, 4);
-      WriteToHardware<flag, true>(memory, addr + 4, rotated_data, 4);
+      WriteToHardware<flag, true>(system, memory, addr, rotated_data, 4);
+      WriteToHardware<flag, true>(system, memory, addr + 4, rotated_data, 4);
     }
 
     return;
@@ -688,15 +689,15 @@ void Write_U8(const u32 var, const u32 address)
   Memcheck(address, var, true, 1);
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::Write>(memory, address, var, 1);
+  WriteToHardware<XCheckTLBFlag::Write>(system, memory, address, var, 1);
 }
 
 void Write_U16(const u32 var, const u32 address)
 {
   Memcheck(address, var, true, 2);
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::Write>(memory, address, var, 2);
+  WriteToHardware<XCheckTLBFlag::Write>(system, memory, address, var, 2);
 }
 void Write_U16_Swap(const u32 var, const u32 address)
 {
@@ -708,7 +709,7 @@ void Write_U32(const u32 var, const u32 address)
   Memcheck(address, var, true, 4);
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::Write>(memory, address, var, 4);
+  WriteToHardware<XCheckTLBFlag::Write>(system, memory, address, var, 4);
 }
 void Write_U32_Swap(const u32 var, const u32 address)
 {
@@ -720,8 +721,9 @@ void Write_U64(const u64 var, const u32 address)
   Memcheck(address, var, true, 8);
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::Write>(memory, address, static_cast<u32>(var >> 32), 4);
-  WriteToHardware<XCheckTLBFlag::Write>(memory, address + sizeof(u32), static_cast<u32>(var), 4);
+  WriteToHardware<XCheckTLBFlag::Write>(system, memory, address, static_cast<u32>(var >> 32), 4);
+  WriteToHardware<XCheckTLBFlag::Write>(system, memory, address + sizeof(u32),
+                                        static_cast<u32>(var), 4);
 }
 void Write_U64_Swap(const u64 var, const u32 address)
 {
@@ -781,30 +783,31 @@ void HostWrite_U8(const u32 var, const u32 address)
 {
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::NoException>(memory, address, var, 1);
+  WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, var, 1);
 }
 
 void HostWrite_U16(const u32 var, const u32 address)
 {
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::NoException>(memory, address, var, 2);
+  WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, var, 2);
 }
 
 void HostWrite_U32(const u32 var, const u32 address)
 {
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::NoException>(memory, address, var, 4);
+  WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, var, 4);
 }
 
 void HostWrite_U64(const u64 var, const u32 address)
 {
   auto& system = Core::System::GetInstance();
   auto& memory = system.GetMemory();
-  WriteToHardware<XCheckTLBFlag::NoException>(memory, address, static_cast<u32>(var >> 32), 4);
-  WriteToHardware<XCheckTLBFlag::NoException>(memory, address + sizeof(u32), static_cast<u32>(var),
+  WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, static_cast<u32>(var >> 32),
                                               4);
+  WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address + sizeof(u32),
+                                              static_cast<u32>(var), 4);
 }
 
 void HostWrite_F32(const float var, const u32 address)
@@ -833,15 +836,15 @@ static std::optional<WriteResult> HostTryWriteUX(const u32 var, const u32 addres
   switch (space)
   {
   case RequestedAddressSpace::Effective:
-    WriteToHardware<XCheckTLBFlag::NoException>(memory, address, var, size);
+    WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, var, size);
     return WriteResult(!!MSR.DR);
   case RequestedAddressSpace::Physical:
-    WriteToHardware<XCheckTLBFlag::NoException, true>(memory, address, var, size);
+    WriteToHardware<XCheckTLBFlag::NoException, true>(system, memory, address, var, size);
     return WriteResult(false);
   case RequestedAddressSpace::Virtual:
     if (!MSR.DR)
       return std::nullopt;
-    WriteToHardware<XCheckTLBFlag::NoException>(memory, address, var, size);
+    WriteToHardware<XCheckTLBFlag::NoException>(system, memory, address, var, size);
     return WriteResult(true);
   }
 
@@ -1130,7 +1133,7 @@ void ClearCacheLine(u32 address)
   // TODO: This isn't precisely correct for non-RAM regions, but the difference
   // is unlikely to matter.
   for (u32 i = 0; i < 32; i += 4)
-    WriteToHardware<XCheckTLBFlag::Write, true>(memory, address + i, 0, 4);
+    WriteToHardware<XCheckTLBFlag::Write, true>(system, memory, address + i, 0, 4);
 }
 
 u32 IsOptimizableMMIOAccess(u32 address, u32 access_size)

diff --git a/Source/Core/Core/System.cpp b/Source/Core/Core/System.cpp
@@ -15,6 +15,7 @@
 #include "Core/HW/EXI/EXI.h"
 #include "Core/HW/Memmap.h"
 #include "Core/HW/MemoryInterface.h"
+#include "Core/HW/ProcessorInterface.h"
 #include "Core/HW/SI/SI.h"
 #include "Core/HW/Sram.h"
 #include "Core/HW/VideoInterface.h"
@@ -46,6 +47,7 @@ struct System::Impl
   MemoryInterface::MemoryInterfaceState m_memory_interface_state;
   PixelEngine::PixelEngineManager m_pixel_engine;
   PixelShaderManager m_pixel_shader_manager;
+  ProcessorInterface::ProcessorInterfaceManager m_processor_interface;
   SerialInterface::SerialInterfaceState m_serial_interface_state;
   Sram m_sram;
   VertexShaderManager m_vertex_shader_manager;
@@ -160,6 +162,11 @@ PixelShaderManager& System::GetPixelShaderManager() const
   return m_impl->m_pixel_shader_manager;
 }
 
+ProcessorInterface::ProcessorInterfaceManager& System::GetProcessorInterface() const
+{
+  return m_impl->m_processor_interface;
+}
+
 SerialInterface::SerialInterfaceState& System::GetSerialInterfaceState() const
 {
   return m_impl->m_serial_interface_state;

diff --git a/Source/Core/Core/System.h b/Source/Core/Core/System.h
@@ -55,6 +55,10 @@ namespace PixelEngine
 {
 class PixelEngineManager;
 };
+namespace ProcessorInterface
+{
+class ProcessorInterfaceManager;
+}
 namespace SerialInterface
 {
 class SerialInterfaceState;
@@ -111,6 +115,7 @@ class System
   MemoryInterface::MemoryInterfaceState& GetMemoryInterfaceState() const;
   PixelEngine::PixelEngineManager& GetPixelEngine() const;
   PixelShaderManager& GetPixelShaderManager() const;
+  ProcessorInterface::ProcessorInterfaceManager& GetProcessorInterface() const;
   SerialInterface::SerialInterfaceState& GetSerialInterfaceState() const;
   Sram& GetSRAM() const;
   VertexShaderManager& GetVertexShaderManager() const;

diff --git a/Source/Core/DolphinNoGUI/Platform.cpp b/Source/Core/DolphinNoGUI/Platform.cpp
@@ -2,14 +2,11 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
 #include "DolphinNoGUI/Platform.h"
+#include "Core/HW/ProcessorInterface.h"
 #include "Core/IOS/IOS.h"
 #include "Core/IOS/STM/STM.h"
 #include "Core/State.h"
-
-namespace ProcessorInterface
-{
-void PowerButton_Tap();
-}
+#include "Core/System.h"
 
 Platform::~Platform() = default;
 
@@ -31,7 +28,8 @@ void Platform::UpdateRunningFlag()
     if (!m_tried_graceful_shutdown.IsSet() && stm &&
         std::static_pointer_cast<IOS::HLE::STMEventHookDevice>(stm)->HasHookInstalled())
     {
-      ProcessorInterface::PowerButton_Tap();
+      auto& system = Core::System::GetInstance();
+      system.GetProcessorInterface().PowerButton_Tap();
       m_tried_graceful_shutdown.Set();
     }
     else

diff --git a/Source/Core/DolphinQt/Debugger/RegisterWidget.cpp b/Source/Core/DolphinQt/Debugger/RegisterWidget.cpp
@@ -16,6 +16,7 @@
 #include "Core/Core.h"
 #include "Core/HW/ProcessorInterface.h"
 #include "Core/PowerPC/PowerPC.h"
+#include "Core/System.h"
 #include "DolphinQt/Host.h"
 #include "DolphinQt/Settings.h"
 
@@ -448,12 +449,20 @@ void RegisterWidget::PopulateTable()
 
   // Int Mask
   AddRegister(
-      27, 5, RegisterType::int_mask, "Int Mask", [] { return ProcessorInterface::GetMask(); },
+      27, 5, RegisterType::int_mask, "Int Mask",
+      [] {
+        auto& system = Core::System::GetInstance();
+        return system.GetProcessorInterface().GetMask();
+      },
       nullptr);
 
   // Int Cause
   AddRegister(
-      28, 5, RegisterType::int_cause, "Int Cause", [] { return ProcessorInterface::GetCause(); },
+      28, 5, RegisterType::int_cause, "Int Cause",
+      [] {
+        auto& system = Core::System::GetInstance();
+        return system.GetProcessorInterface().GetCause();
+      },
       nullptr);
 
   // DSISR

diff --git a/Source/Core/DolphinQt/MainWindow.cpp b/Source/Core/DolphinQt/MainWindow.cpp
@@ -61,6 +61,7 @@
 #include "Core/NetPlayProto.h"
 #include "Core/NetPlayServer.h"
 #include "Core/State.h"
+#include "Core/System.h"
 #include "Core/WiiUtils.h"
 
 #include "DiscIO/DirectoryBlob.h"
@@ -942,7 +943,8 @@ void MainWindow::Reset()
 {
   if (Movie::IsRecordingInput())
     Movie::SetReset(true);
-  ProcessorInterface::ResetButton_Tap();
+  auto& system = Core::System::GetInstance();
+  system.GetProcessorInterface().ResetButton_Tap();
 }
 
 void MainWindow::FrameAdvance()

diff --git a/Source/Core/UICommon/UICommon.cpp b/Source/Core/UICommon/UICommon.cpp
@@ -37,6 +37,7 @@
 #include "Core/HotkeyManager.h"
 #include "Core/IOS/IOS.h"
 #include "Core/IOS/STM/STM.h"
+#include "Core/System.h"
 #include "Core/WiiRoot.h"
 
 #include "InputCommon/ControllerInterface/ControllerInterface.h"
@@ -433,7 +434,8 @@ bool TriggerSTMPowerEvent()
     return false;
 
   Core::DisplayMessage("Shutting down", 30000);
-  ProcessorInterface::PowerButton_Tap();
+  auto& system = Core::System::GetInstance();
+  system.GetProcessorInterface().PowerButton_Tap();
 
   return true;
 }

diff --git a/Source/Core/VideoCommon/CommandProcessor.cpp b/Source/Core/VideoCommon/CommandProcessor.cpp
@@ -363,15 +363,17 @@ void CommandProcessorManager::GatherPipeBursted(Core::System& system)
 
   SetCPStatusFromCPU(system);
 
+  auto& processor_interface = system.GetProcessorInterface();
+
   // if we aren't linked, we don't care about gather pipe data
   if (!m_cp_ctrl_reg.GPLinkEnable)
   {
     if (IsOnThread(system) && !system.GetFifo().UseDeterministicGPUThread())
     {
       // In multibuffer mode is not allowed write in the same FIFO attached to the GPU.
       // Fix Pokemon XD in DC mode.
-      if ((ProcessorInterface::Fifo_CPUEnd == fifo.CPEnd.load(std::memory_order_relaxed)) &&
-          (ProcessorInterface::Fifo_CPUBase == fifo.CPBase.load(std::memory_order_relaxed)) &&
+      if ((processor_interface.m_fifo_cpu_end == fifo.CPEnd.load(std::memory_order_relaxed)) &&
+          (processor_interface.m_fifo_cpu_base == fifo.CPBase.load(std::memory_order_relaxed)) &&
           fifo.CPReadWriteDistance.load(std::memory_order_relaxed) > 0)
       {
         system.GetFifo().FlushGpu(system);
@@ -394,9 +396,10 @@ void CommandProcessorManager::GatherPipeBursted(Core::System& system)
 
   if (m_cp_ctrl_reg.GPReadEnable && m_cp_ctrl_reg.GPLinkEnable)
   {
-    ProcessorInterface::Fifo_CPUWritePointer = fifo.CPWritePointer.load(std::memory_order_relaxed);
-    ProcessorInterface::Fifo_CPUBase = fifo.CPBase.load(std::memory_order_relaxed);
-    ProcessorInterface::Fifo_CPUEnd = fifo.CPEnd.load(std::memory_order_relaxed);
+    processor_interface.m_fifo_cpu_write_pointer =
+        fifo.CPWritePointer.load(std::memory_order_relaxed);
+    processor_interface.m_fifo_cpu_base = fifo.CPBase.load(std::memory_order_relaxed);
+    processor_interface.m_fifo_cpu_end = fifo.CPEnd.load(std::memory_order_relaxed);
   }
 
   // If the game is running close to overflowing, make the exception checking more frequent.
@@ -416,13 +419,13 @@ void CommandProcessorManager::GatherPipeBursted(Core::System& system)
   // check if we are in sync
   ASSERT_MSG(COMMANDPROCESSOR,
              fifo.CPWritePointer.load(std::memory_order_relaxed) ==
-                 ProcessorInterface::Fifo_CPUWritePointer,
+                 processor_interface.m_fifo_cpu_write_pointer,
              "FIFOs linked but out of sync");
   ASSERT_MSG(COMMANDPROCESSOR,
-             fifo.CPBase.load(std::memory_order_relaxed) == ProcessorInterface::Fifo_CPUBase,
+             fifo.CPBase.load(std::memory_order_relaxed) == processor_interface.m_fifo_cpu_base,
              "FIFOs linked but out of sync");
   ASSERT_MSG(COMMANDPROCESSOR,
-             fifo.CPEnd.load(std::memory_order_relaxed) == ProcessorInterface::Fifo_CPUEnd,
+             fifo.CPEnd.load(std::memory_order_relaxed) == processor_interface.m_fifo_cpu_end,
              "FIFOs linked but out of sync");
 }
 
@@ -432,13 +435,13 @@ void CommandProcessorManager::UpdateInterrupts(Core::System& system, u64 userdat
   {
     m_interrupt_set.Set();
     DEBUG_LOG_FMT(COMMANDPROCESSOR, "Interrupt set");
-    ProcessorInterface::SetInterrupt(INT_CAUSE_CP, true);
+    system.GetProcessorInterface().SetInterrupt(INT_CAUSE_CP, true);
   }
   else
   {
     m_interrupt_set.Clear();
     DEBUG_LOG_FMT(COMMANDPROCESSOR, "Interrupt cleared");
-    ProcessorInterface::SetInterrupt(INT_CAUSE_CP, false);
+    system.GetProcessorInterface().SetInterrupt(INT_CAUSE_CP, false);
   }
   system.GetCoreTiming().ForceExceptionCheck(0);
   m_interrupt_waiting.Clear();
@@ -563,7 +566,7 @@ void CommandProcessorManager::SetCPStatusFromCPU(Core::System& system)
       {
         m_interrupt_set.Set(interrupt);
         DEBUG_LOG_FMT(COMMANDPROCESSOR, "Interrupt set");
-        ProcessorInterface::SetInterrupt(INT_CAUSE_CP, interrupt);
+        system.GetProcessorInterface().SetInterrupt(INT_CAUSE_CP, interrupt);
       }
     }
     else

diff --git a/Source/Core/VideoCommon/PixelEngine.cpp b/Source/Core/VideoCommon/PixelEngine.cpp
@@ -157,12 +157,15 @@ void PixelEngineManager::RegisterMMIO(MMIO::Mapping* mmio, u32 base)
 
 void PixelEngineManager::UpdateInterrupts()
 {
+  auto& system = Core::System::GetInstance();
+  auto& processor_interface = system.GetProcessorInterface();
+
   // check if there is a token-interrupt
-  ProcessorInterface::SetInterrupt(INT_CAUSE_PE_TOKEN,
+  processor_interface.SetInterrupt(INT_CAUSE_PE_TOKEN,
                                    m_signal_token_interrupt && m_control.pe_token_enable);
 
   // check if there is a finish-interrupt
-  ProcessorInterface::SetInterrupt(INT_CAUSE_PE_FINISH,
+  processor_interface.SetInterrupt(INT_CAUSE_PE_FINISH,
                                    m_signal_finish_interrupt && m_control.pe_finish_enable);
 }