JitArm64: dcbx loop detection for improved performance when invalidating large memory regions #10035
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…gion JitArm64 port of 8b2f5d5.
If W30 is in use and we don't lock it, it will be pushed to the stack before the BLR, so there isn't really any reason to lock W30.
JosJuice
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In the commit message of the last commit you say x64 changes look reasonable to me, can't say much about the ARM code... |
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I meant 5 inclusive, 10 exclusive. I'm not sure if that's really clear from how I wrote it, though. |
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Yeah that's not clear, maybe write |
We were using a "value" register to avoid clobbering physical_addr, but this isn't actually needed anymore. The only bits we need from physical_addr after we start clobbering it are bits 5-9, and those bits are identical in effective_addr and physical_addr, so we can read them from effective_addr instead.
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Changed it to 5-9. |
leoetlino
approved these changes
Aug 30, 2021
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Follow-up to PR #10007.