JitArm64: Indexed paired loadstores workaround, attempt 2 #10052
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This PR does not have the issue, according to both JMC and a forum user. I don't know why calling |
| @@ -47,11 +48,11 @@ void JitArm64::psq_lXX(UGeckoInstruction inst) | |||
| if (inst.RA || update) // Always uses the register on update | |||
| { | |||
| if (indexed) | |||
| ADD(addr_reg, gpr.R(inst.RA), gpr.R(inst.RB)); | |||
| ADD(addr_reg, arm_addr, gpr.R(inst.RB)); | |||
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Both gcc and MSVC called R(RB) before R(RA). So the order of register has changed. I doubt this is an issue here, but it can affect other (regcache) issues.
Edit: nvm, clang seems to prefer R(RA) before R(RB).
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The instruction variants that used RB were disabled by PR 10050, without affecting the issue.
PR #10050 did not make the issue go away.