arm64: fixes around icache flushing #4204

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merged 2 commits into from Sep 10, 2016

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@lewurm
Contributor
lewurm commented Sep 9, 2016 edited

The first hit on Google about "Exynos 8890 SIGILL" is a thread pointing out a dolphin crash on Samsung Galaxy S7. We had a similar issue in mono, see mono/mono#3549

Untested though: Anyone cares about testing it please?


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@hrydgard
Contributor
hrydgard commented Sep 9, 2016

So THAT's what it is, thank you! Same issue in PPSSPP, we "solved" it with terrifying amounts of padding.

@hrydgard hrydgard referenced this pull request in hrydgard/ppsspp Sep 9, 2016
Merged

Add ugly invalidation workaround for SGS7s #8769

@ZephyrSurfer ZephyrSurfer and 1 other commented on an outdated diff Sep 9, 2016
Source/Core/Common/Arm64Emitter.cpp
@@ -329,11 +329,33 @@ void ARM64XEmitter::FlushIcacheSection(u8* start, u8* end)
// Header file says this is equivalent to: sys_icache_invalidate(start, end - start);
sys_cache_control(kCacheFunctionPrepareForExecution, start, end - start);
#else
-#ifdef __clang__
- __clear_cache(start, end);
-#else
- __builtin___clear_cache(start, end);
-#endif
+ /* Don't rely on GCC's __clear_cache implementation, as it caches
+ * icache/dcache cache line sizes, that can vary between cores on
+ * big.LITTLE architectures. */
@ZephyrSurfer
ZephyrSurfer Sep 9, 2016 Contributor

Can you change the comments to use single line comments instead (//) to match dolphin's style guide.

@lewurm
lewurm Sep 9, 2016 Contributor

sure! :)

@lewurm
Contributor
lewurm commented Sep 9, 2016

Thanks @skidau, fixed it up.

@lewurm
Contributor
lewurm commented Sep 10, 2016

fixed lint issues. Great CI setup btw!

@skidau
Contributor
skidau commented Sep 10, 2016

Tested this out and it works for me on a S7 Exynos.

@lewurm lewurm arm64: fixes around icache flushing
fff8221
@lewurm
Contributor
lewurm commented Sep 10, 2016

okay, one more try on the linter :)

@degasus degasus and 1 other commented on an outdated diff Sep 10, 2016
Source/Core/Common/Arm64Emitter.cpp
+ // big.LITTLE architectures.
+ u64 addr, ctr_el0;
+ static size_t icache_line_size = 0xffff, dcache_line_size = 0xffff;
+ size_t isize, dsize;
+
+ __asm__ volatile("mrs %0, ctr_el0" : "=r"(ctr_el0));
+ isize = 4 << ((ctr_el0 >> 0) & 0xf);
+ dsize = 4 << ((ctr_el0 >> 16) & 0xf);
+
+ // use the global minimum cache line size
+ icache_line_size = isize = icache_line_size < isize ? icache_line_size : isize;
+ dcache_line_size = dsize = dcache_line_size < dsize ? dcache_line_size : dsize;
+
+ addr = (u64)start & ~(u64)(dsize - 1);
+ for (; addr < (u64)end; addr += dsize)
+ __asm__ volatile("dc civac, %0" : : "r"(addr) : "memory");
@degasus
degasus Sep 10, 2016 edited Member

The manual suggests CVAU instead of CIVAC. I don't think we'll read this memory again, but I neither see a reason to invalidate the dcache. Was this done on purpose?

https://people.mozilla.org/~sstangl/arm/AArch64-Reference-Manual.pdf page 73

@lewurm
lewurm Sep 10, 2016 edited Contributor

hum, I should have documented that better here as well. Reason for CIVAC is a suggested workaround by a couple of Cortex A-53 erratas, see here: v8/v8@fec99c6

@degasus
Member
degasus commented Sep 10, 2016 edited

IminLine: Log2 of the number of words in the smallest cache line of all the instruction caches that are
controlled by the processor.

Not sure about processor != core, but this might still be a Exynos bug.

Also no clue which one is better, CVAU or CIVAC. Both LGTM.

@lewurm lewurm arm64: add comment about data cache flushing
976da37
@degasus
Member
degasus commented Sep 10, 2016

Reviewed 1 of 1 files at r3.
Review status: all files reviewed at latest revision, 1 unresolved discussion.


Comments from Reviewable

@degasus degasus merged commit 077fa09 into dolphin-emu:master Sep 10, 2016

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@degasus
Member
degasus commented Sep 10, 2016

Thanks for sharing the outcome :D

@hrydgard hrydgard added a commit to hrydgard/ppsspp that referenced this pull request Sep 10, 2016
@hrydgard hrydgard Port over the Exynos cacheline size fix from Dolphin. Thanks to lewur…
…m of the mono project for the discovery and original fix.

See dolphin-emu/dolphin#4204 and mono/mono#3549
03279e1
@dolphin-emu-bot
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FifoCI detected that this change impacts graphical rendering. Here are the behavior differences detected by the system:

  • rs3-bumpmapping on dx-win-nv: diff

automated-fifoci-reporter

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