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x64: Handle Intel JCC Erratum #8475
Also see relevant white paper.
This implementation adds NOP padding before all affected JCC/JMP/CALL/RET instructions.
The Intel CPU microcode migitations for SKX102 cause jump instructions and macrofused jump instructions across a 32-byte boundary to not be cached in the decoded icache. Information about which CPUs are affected can be found in an Intel white paper, document number 341810-001.