DSPJit: Various minor improvements #9008
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- LEA is a bit silly when the source and the destination are the same. A simple ADD or SHL will do in those cases. 66 8D 04 45 00 00 00 00 lea ax,[rax*2] 66 03 C0 add ax,ax 48 8D 04 00 lea rax,[rax+rax] 48 03 C0 add rax,rax 66 8D 14 D5 00 00 00 00 lea dx,[rdx*8] 66 C1 E2 03 shl dx,3 - When scaling by 2, consider summing the register with itself instead. The former always needs a 32-bit displacement, so the sum is more compact. 66 8D 14 45 00 00 00 00 lea dx,[rax*2] 66 8D 14 00 lea dx,[rax+rax]
There's no need to load the 64-bit immediate into a temporary register. x64 will sign-extend 32-bit immediates to 64 bits, giving us the exact value we need in this case. 48 C7 C0 00 00 FF FF mov rax,0FFFFFFFFFFFF0000h 48 21 C2 and rdx,rax 48 81 E2 00 00 FF FF and rdx,0FFFFFFFFFFFF0000h
The intent here is to generate a more compact instruction if a 32-bit immediate can be zero-extended to the desired 64-bit immediate. Nowadays the emitter is smart enough to do this for us, so this logic is redundant.
BhaaLseN
approved these changes
Aug 5, 2020
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