Arm64Gen: Convert ARM64Reg to enum class #9494
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Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStoreFloating.cpp
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| INVALID_REG = 0xFFFFFFFF | ||
| INVALID_REG = -1, |
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This doesn't actually change the value of INVALID_REG; 0xFFFFFFFF was overflowing the int underlying type and wrapping around to -1.
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| @@ -1223,44 +1177,44 @@ void ARM64XEmitter::_MSR(PStateField field, ARM64Reg Rt) | |||
| int o0 = 0, op1 = 0, CRn = 0, CRm = 0, op2 = 0; | |||
| ASSERT_MSG(DYNA_REC, Is64Bit(Rt), "MSR: Rt must be 64-bit"); | |||
| GetSystemReg(field, o0, op1, CRn, CRm, op2); | |||
| EncodeSystemInst(o0, op1, CRn, CRm, op2, DecodeReg(Rt)); | |||
| EncodeSystemInst(o0, op1, CRn, CRm, op2, Rt); | |||
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Rt is decoded inside EncodeSystemInst, so there's no need to do it here.
| } | ||
| constexpr ARM64Reg EncodeRegTo64(ARM64Reg reg) | ||
| { | ||
| return static_cast<ARM64Reg>(reg | 0x20); | ||
| } | ||
| constexpr ARM64Reg EncodeRegToSingle(ARM64Reg reg) | ||
| { | ||
| return static_cast<ARM64Reg>(DecodeReg(reg) + S0); | ||
| return static_cast<ARM64Reg>(ARM64Reg::S0 | DecodeReg(reg)); |
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S0 = 64 and DecodeReg return value is in range [0, 31] so these are equivalent.
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As per previous discussion: Made DecodeReg return int, and added EncodeRegTo32 which returns ARM64Reg |
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One last thing before I remove draft status: this builds properly and isn't supposed to change any functionality, but since I don't have an ARM device to test it myself it would be helpful for someone who does to run a few games as a sanity check. |
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I did some quick tests of a few games. Things seem to be working fine. |
Most changes are just adding ARM64Reg:: in front of the constants.
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Done, and draft status removed. |
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Gonna take the opportunity to merge this before someone merges one of my open JitArm64 PRs and causes a merge conflict. degasus was the one who suggested making this into an enum class so I'm going to assume he doesn't mind this being merged |
Most changes are just adding ARM64Reg:: in front of the constants.
Add operator functions to reduce type casting spam
Make DecodeReg return int instead of ARM64Reg
Add EncodeRegTo32 with previous behavior of DecodeReg
Despite appearances, this does not change the value of
ARM64Reg::INVALID_REG. The previous value 0xFFFFFFFF was being cast to
an int and wrapping around to -1, this just makes that value explicit.