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Core/MMU: Fix inverted condition in HostIsInstructionRAMAddress(). #9879

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AdmiralCurtiss
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@AdmiralCurtiss AdmiralCurtiss commented Jul 9, 2021

My bad. Untested, but this should fix https://bugs.dolphin-emu.org/issues/12571

Compare with previous code: b59fcae#diff-4e481906f161c6ca9062f7b02499e2eca16f00bab97f94bb44ab8bb292c47385L699-R832

// Instructions are always 32bit aligned.
return !(address & 3) && IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, MSR.IR);

// Instructions are always 32bit aligned.
if (!(address & 3))
return false;

@dolphin-emu-bot
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FifoCI detected that this change impacts graphical rendering. Here are the behavior differences detected by the system:

automated-fifoci-reporter

@leoetlino
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oh, whoops

@leoetlino leoetlino merged commit 838434a into dolphin-emu:master Jul 9, 2021
@AdmiralCurtiss AdmiralCurtiss deleted the host-is-instruction-ram-address-fix branch July 9, 2021 14:16
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