Pinned

1. AUCOHL/Fault Public

   A complete Open Source Design for Testing (DFT) Solution

   Swift 64 13

2. AUCOHL/DFFRAM Public

   Standard Cell Library based Memory Compiler using FF/Latch cells

   Verilog 52 21

3. Oak.js Public

   Online RISC-V/MIPS Assembler & Simulator

   JavaScript 9 2

4. The-OpenROAD-Project/OpenLane Public

   OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

   Verilog 624 227