From 399df33c3050f5636795007216f8bff0ee502a1c Mon Sep 17 00:00:00 2001 From: Debayan Ghosh Date: Tue, 27 Mar 2018 11:30:19 +0530 Subject: [PATCH] [ARM64] Fix UnspillReg instruction generation Fixes the runtime issues (#16359,#15389) seen with COMPlus_JitStressRegs=0x2* on ARM64. --- src/jit/codegenlinear.cpp | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/jit/codegenlinear.cpp b/src/jit/codegenlinear.cpp index eddec19c1f60..6faaf612bec2 100644 --- a/src/jit/codegenlinear.cpp +++ b/src/jit/codegenlinear.cpp @@ -896,10 +896,15 @@ void CodeGen::genUnspillRegIfNeeded(GenTree* tree) inst_RV_TT(ins_Load(treeType, compiler->isSIMDTypeLocalAligned(lcl->gtLclNum)), dstReg, unspillTree); } #elif defined(_TARGET_ARM64_) - var_types targetType = unspillTree->gtType; - instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->gtLclNum)); - emitAttr attr = emitTypeSize(targetType); - emitter* emit = getEmitter(); + var_types targetType = unspillTree->gtType; + if (targetType != genActualType(varDsc->lvType) && !varTypeIsGC(targetType) && !varDsc->lvNormalizeOnLoad()) + { + assert(!varTypeIsGC(varDsc)); + targetType = genActualType(varDsc->lvType); + } + instruction ins = ins_Load(targetType, compiler->isSIMDTypeLocalAligned(lcl->gtLclNum)); + emitAttr attr = emitTypeSize(targetType); + emitter* emit = getEmitter(); // Fixes Issue #3326 attr = varTypeIsFloating(targetType) ? attr : emit->emitInsAdjustLoadStoreAttr(ins, attr);