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Handle more than 64 registers - Part 3 (#102592)
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* Add `high` in regMaskTP

* Introduce SingleTypeRegSet

* Use SingleTypeRegSet in few places

* Delete some methods in regMaskTP

* Delete some more methods of regMaskTP

* Fix actualRegistersMask

* Use SingleTypeRegSet in consecutive register code

* Use SingleTypeRegSet in consecutive registers codebase

* Change genRegMask*() method to return SingleTypeRegSet

* wip

* another wip

* Everything except newRefPosition/killMask

* refactor code around buildkill

* fix build errors

* some more errors

* jit format

* fixed build error for arm64

* REVERT: temporary add #ifdef TARGET_ARM64 for accessing regMaskTP methods

* forgot to add the new file

* make addRegsForKill only on low

* jit format

* Revert "REVERT: temporary add #ifdef TARGET_ARM64 for accessing regMaskTP methods"

This reverts commit 325bc6e.

* Various fixes after merge

* passing arm64 build

* clrjit build works

* clrjit_universal_arm_x64 build works

* clrjit_unix_x64_x64 build works

* clrjit_win_x86_x64 build works

* fix a bug in size

* delete unwanted method

* jit format

* Remove high

* Continue using regMaskTP for NodeInternalRegisters

* Pass regType to getConstrainedRegMask()

* jit format

* fix a wrong parameter for consecutive register

* fix riscv64 build errors

* jit format
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kunalspathak committed May 24, 2024
1 parent 80374cc commit ce1477b
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Showing 21 changed files with 589 additions and 578 deletions.
1 change: 1 addition & 0 deletions src/coreclr/jit/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -167,6 +167,7 @@ set( JIT_SOURCES
redundantbranchopts.cpp
regalloc.cpp
registerargconvention.cpp
regMaskTPOps.cpp
regset.cpp
scev.cpp
scopeinfo.cpp
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32 changes: 15 additions & 17 deletions src/coreclr/jit/codegencommon.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6252,26 +6252,26 @@ regMaskTP CodeGen::genPushRegs(regMaskTP regs, regMaskTP* byrefRegs, regMaskTP*

regMaskTP pushedRegs = regs;

for (regNumber reg = REG_INT_FIRST; regs != RBM_NONE; reg = REG_NEXT(reg))
for (regNumber reg = REG_INT_FIRST; reg <= REG_INT_LAST; reg = REG_NEXT(reg))
{
regMaskTP regBit = regMaskTP(1) << reg;
regMaskTP regMask = genRegMask(reg);

if ((regBit & regs) == RBM_NONE)
if ((regMask & pushedRegs) == RBM_NONE)
continue;

var_types type;
if (regBit & gcInfo.gcRegGCrefSetCur)
if (regMask & gcInfo.gcRegGCrefSetCur)
{
type = TYP_REF;
}
else if (regBit & gcInfo.gcRegByrefSetCur)
else if (regMask & gcInfo.gcRegByrefSetCur)
{
*byrefRegs |= regBit;
*byrefRegs |= regMask;
type = TYP_BYREF;
}
else if (noRefRegs != NULL)
{
*noRefRegs |= regBit;
*noRefRegs |= regMask;
type = TYP_I_IMPL;
}
else
Expand All @@ -6282,9 +6282,7 @@ regMaskTP CodeGen::genPushRegs(regMaskTP regs, regMaskTP* byrefRegs, regMaskTP*
inst_RV(INS_push, reg, type);

genSinglePush();
gcInfo.gcMarkRegSetNpt(regBit);

regs &= ~regBit;
gcInfo.gcMarkRegSetNpt(regMask);
}

return pushedRegs;
Expand Down Expand Up @@ -6323,20 +6321,22 @@ void CodeGen::genPopRegs(regMaskTP regs, regMaskTP byrefRegs, regMaskTP noRefReg
noway_assert(genTypeStSz(TYP_REF) == genTypeStSz(TYP_INT));
noway_assert(genTypeStSz(TYP_BYREF) == genTypeStSz(TYP_INT));

regMaskTP popedRegs = regs;

// Walk the registers in the reverse order as genPushRegs()
for (regNumber reg = REG_INT_LAST; regs != RBM_NONE; reg = REG_PREV(reg))
for (regNumber reg = REG_INT_LAST; reg >= REG_INT_LAST; reg = REG_PREV(reg))
{
regMaskTP regBit = regMaskTP(1) << reg;
regMaskTP regMask = genRegMask(reg);

if ((regBit & regs) == RBM_NONE)
if ((regMask & popedRegs) == RBM_NONE)
continue;

var_types type;
if (regBit & byrefRegs)
if (regMask & byrefRegs)
{
type = TYP_BYREF;
}
else if (regBit & noRefRegs)
else if (regMask & noRefRegs)
{
type = TYP_INT;
}
Expand All @@ -6350,8 +6350,6 @@ void CodeGen::genPopRegs(regMaskTP regs, regMaskTP byrefRegs, regMaskTP noRefReg

if (type != TYP_INT)
gcInfo.gcMarkRegPtrVal(reg, type);

regs &= ~regBit;
}

#endif // FEATURE_FIXED_OUT_ARGS
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16 changes: 8 additions & 8 deletions src/coreclr/jit/codegeninterface.h
Original file line number Diff line number Diff line change
Expand Up @@ -75,31 +75,31 @@ class CodeGenInterface
}

#if defined(TARGET_AMD64)
regMaskTP rbmAllFloat;
regMaskTP rbmFltCalleeTrash;
SingleTypeRegSet rbmAllFloat;
SingleTypeRegSet rbmFltCalleeTrash;

FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
FORCEINLINE SingleTypeRegSet get_RBM_ALLFLOAT() const
{
return this->rbmAllFloat;
}
FORCEINLINE regMaskTP get_RBM_FLT_CALLEE_TRASH() const
FORCEINLINE SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH() const
{
return this->rbmFltCalleeTrash;
}
#endif // TARGET_AMD64

#if defined(TARGET_XARCH)
regMaskTP rbmAllMask;
regMaskTP rbmMskCalleeTrash;
SingleTypeRegSet rbmAllMask;
SingleTypeRegSet rbmMskCalleeTrash;

// Call this function after the equivalent fields in Compiler have been initialized.
void CopyRegisterInfo();

FORCEINLINE regMaskTP get_RBM_ALLMASK() const
FORCEINLINE SingleTypeRegSet get_RBM_ALLMASK() const
{
return this->rbmAllMask;
}
FORCEINLINE regMaskTP get_RBM_MSK_CALLEE_TRASH() const
FORCEINLINE SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH() const
{
return this->rbmMskCalleeTrash;
}
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4 changes: 2 additions & 2 deletions src/coreclr/jit/compiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3485,12 +3485,12 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
// Make sure we copy the register info and initialize the
// trash regs after the underlying fields are initialized

const regMaskTP vtCalleeTrashRegs[TYP_COUNT]{
const SingleTypeRegSet vtCalleeTrashRegs[TYP_COUNT]{
#define DEF_TP(tn, nm, jitType, sz, sze, asze, st, al, regTyp, regFld, csr, ctr, tf) ctr,
#include "typelist.h"
#undef DEF_TP
};
memcpy(varTypeCalleeTrashRegs, vtCalleeTrashRegs, sizeof(regMaskTP) * TYP_COUNT);
memcpy(varTypeCalleeTrashRegs, vtCalleeTrashRegs, sizeof(SingleTypeRegSet) * TYP_COUNT);

codeGen->CopyRegisterInfo();
#endif // TARGET_XARCH
Expand Down
30 changes: 15 additions & 15 deletions src/coreclr/jit/compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -11246,8 +11246,8 @@ class Compiler
//
// Users of these values need to define four accessor functions:
//
// regMaskTP get_RBM_ALLFLOAT();
// regMaskTP get_RBM_FLT_CALLEE_TRASH();
// SingleTypeRegSet get_RBM_ALLFLOAT();
// SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH();
// unsigned get_CNT_CALLEE_TRASH_FLOAT();
// unsigned get_AVAILABLE_REG_COUNT();
//
Expand All @@ -11256,16 +11256,16 @@ class Compiler
// This was done to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
// TARGET_AMD64 requires one.
//
regMaskTP rbmAllFloat;
regMaskTP rbmFltCalleeTrash;
unsigned cntCalleeTrashFloat;
SingleTypeRegSet rbmAllFloat;
SingleTypeRegSet rbmFltCalleeTrash;
unsigned cntCalleeTrashFloat;

public:
FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
FORCEINLINE SingleTypeRegSet get_RBM_ALLFLOAT() const
{
return this->rbmAllFloat;
}
FORCEINLINE regMaskTP get_RBM_FLT_CALLEE_TRASH() const
FORCEINLINE SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH() const
{
return this->rbmFltCalleeTrash;
}
Expand All @@ -11284,8 +11284,8 @@ class Compiler
//
// Users of these values need to define four accessor functions:
//
// regMaskTP get_RBM_ALLMASK();
// regMaskTP get_RBM_MSK_CALLEE_TRASH();
// SingleTypeRegSet get_RBM_ALLMASK();
// SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH();
// unsigned get_CNT_CALLEE_TRASH_MASK();
// unsigned get_AVAILABLE_REG_COUNT();
//
Expand All @@ -11294,17 +11294,17 @@ class Compiler
// This was done to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
// TARGET_XARCH requires one.
//
regMaskTP rbmAllMask;
regMaskTP rbmMskCalleeTrash;
unsigned cntCalleeTrashMask;
regMaskTP varTypeCalleeTrashRegs[TYP_COUNT];
SingleTypeRegSet rbmAllMask;
SingleTypeRegSet rbmMskCalleeTrash;
unsigned cntCalleeTrashMask;
SingleTypeRegSet varTypeCalleeTrashRegs[TYP_COUNT];

public:
FORCEINLINE regMaskTP get_RBM_ALLMASK() const
FORCEINLINE SingleTypeRegSet get_RBM_ALLMASK() const
{
return this->rbmAllMask;
}
FORCEINLINE regMaskTP get_RBM_MSK_CALLEE_TRASH() const
FORCEINLINE SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH() const
{
return this->rbmMskCalleeTrash;
}
Expand Down
39 changes: 3 additions & 36 deletions src/coreclr/jit/compiler.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -935,7 +935,7 @@ inline unsigned Compiler::funGetFuncIdx(BasicBlock* block)

inline regNumber genRegNumFromMask(regMaskTP mask)
{
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero

/* Convert the mask to a register number */

Expand All @@ -960,7 +960,7 @@ inline regNumber genRegNumFromMask(regMaskTP mask)

inline regNumber genFirstRegNumFromMaskAndToggle(regMaskTP& mask)
{
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero

/* Convert the mask to a register number */

Expand All @@ -983,7 +983,7 @@ inline regNumber genFirstRegNumFromMaskAndToggle(regMaskTP& mask)

inline regNumber genFirstRegNumFromMask(regMaskTP mask)
{
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero

/* Convert the mask to a register number */

Expand Down Expand Up @@ -3496,39 +3496,6 @@ inline unsigned genMapRegNumToRegArgNum(regNumber regNum, var_types type, CorInf
}
}

/*****************************************************************************/
/* Return a register mask with the first 'numRegs' argument registers set.
*/

inline regMaskTP genIntAllRegArgMask(unsigned numRegs)
{
assert(numRegs <= MAX_REG_ARG);

regMaskTP result = RBM_NONE;
for (unsigned i = 0; i < numRegs; i++)
{
result |= intArgMasks[i];
}
return result;
}

inline regMaskTP genFltAllRegArgMask(unsigned numRegs)
{
#ifndef TARGET_X86
assert(numRegs <= MAX_FLOAT_REG_ARG);

regMaskTP result = RBM_NONE;
for (unsigned i = 0; i < numRegs; i++)
{
result |= fltArgMasks[i];
}
return result;
#else
assert(!"no x86 float arg regs\n");
return RBM_NONE;
#endif
}

/*
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Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/emit.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10062,7 +10062,7 @@ void emitter::emitStackPopLargeStk(BYTE* addr, bool isCall, unsigned char callIn
// of callee-saved registers only).
for (unsigned calleeSavedRegIdx = 0; calleeSavedRegIdx < CNT_CALL_GC_REGS; calleeSavedRegIdx++)
{
regMaskTP calleeSavedRbm = raRbmCalleeSaveOrder[calleeSavedRegIdx];
regMaskSmall calleeSavedRbm = raRbmCalleeSaveOrder[calleeSavedRegIdx];
if (emitThisGCrefRegs & calleeSavedRbm)
{
gcrefRegs |= (1 << calleeSavedRegIdx);
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/gcencode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4620,7 +4620,7 @@ void GCInfo::gcInfoRecordGCRegStateChange(GcInfoEncoder* gcInfoEncoder,
while (regMask)
{
// Get hold of the next register bit.
regMaskTP tmpMask = genFindLowestBit(regMask);
regMaskSmall tmpMask = genFindLowestBit(regMask);
assert(tmpMask);

// Remember the new state of this register.
Expand Down

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