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[RISC-V] others except coreclr (#82382)
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* [RISCV-V] others except coreclr

- Successfully cross-build for RISC-V.
- Run A simple application "helloworld"
- Fail a test in clr.paltest

* Add risc-v

* Put riscv64 to the last
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clamp03 committed Feb 21, 2023
1 parent 1a321fd commit ff10999
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Showing 28 changed files with 92 additions and 24 deletions.
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Expand Up @@ -5697,6 +5697,14 @@
"any",
"base"
],
"linux-riscv64": [
"linux-riscv64",
"linux",
"unix-riscv64",
"unix",
"any",
"base"
],
"linux-musl": [
"linux-musl",
"linux",
Expand Down Expand Up @@ -10529,6 +10537,12 @@
"any",
"base"
],
"unix-riscv64": [
"unix-riscv64",
"unix",
"any",
"base"
],
"win": [
"win",
"any",
Expand Down Expand Up @@ -11159,4 +11173,4 @@
"any",
"base"
]
}
}
13 changes: 12 additions & 1 deletion src/libraries/Microsoft.NETCore.Platforms/src/runtime.json
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Expand Up @@ -1994,6 +1994,12 @@
"unix-mips64"
]
},
"linux-riscv64": {
"#import": [
"linux",
"unix-riscv64"
]
},
"linux-musl": {
"#import": [
"linux"
Expand Down Expand Up @@ -4082,6 +4088,11 @@
"unix"
]
},
"unix-riscv64": {
"#import": [
"unix"
]
},
"win": {
"#import": [
"any"
Expand Down Expand Up @@ -4406,4 +4417,4 @@
]
}
}
}
}
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Expand Up @@ -3,11 +3,11 @@
<ItemGroup>
<RuntimeGroup Include="unix">
<Parent>any</Parent>
<Architectures>x64;x86;arm;armv6;armel;arm64;loongarch64;mips64;s390x;ppc64le</Architectures>
<Architectures>x64;x86;arm;armv6;armel;arm64;loongarch64;mips64;s390x;ppc64le;riscv64</Architectures>
</RuntimeGroup>
<RuntimeGroup Include="linux">
<Parent>unix</Parent>
<Architectures>x64;x86;arm;armv6;armel;arm64;loongarch64;mips64;s390x;ppc64le</Architectures>
<Architectures>x64;x86;arm;armv6;armel;arm64;loongarch64;mips64;s390x;ppc64le;riscv64</Architectures>
</RuntimeGroup>
<RuntimeGroup Include="linux-musl">
<Parent>linux</Parent>
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Expand Up @@ -19,7 +19,7 @@
<SupportsX86Intrinsics Condition="'$(Platform)' == 'x86' and '$(TargetsWindows)' == 'true' and '$(FeatureMono)' == 'true'">false</SupportsX86Intrinsics>
<ILLinkSharedDirectory>$(MSBuildThisFileDirectory)ILLink\</ILLinkSharedDirectory>
<IsBigEndian Condition="'$(Platform)' == 's390x'">true</IsBigEndian>
<Is64Bit Condition="'$(Platform)' == 'arm64' or '$(Platform)' == 'x64' or '$(Platform)' == 's390x' or '$(Platform)' == 'loongarch64' or '$(Platform)' == 'ppc64le'">true</Is64Bit>
<Is64Bit Condition="'$(Platform)' == 'arm64' or '$(Platform)' == 'x64' or '$(Platform)' == 's390x' or '$(Platform)' == 'loongarch64' or '$(Platform)' == 'ppc64le' or '$(Platform)' == 'riscv64'">true</Is64Bit>
<UseMinimalGlobalizationData Condition="'$(TargetsiOS)' == 'true' or '$(TargetstvOS)' == 'true' or '$(TargetsBrowser)' == 'true' or '$(TargetsWasi)' == 'true'">true</UseMinimalGlobalizationData>
</PropertyGroup>
<PropertyGroup>
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1 change: 1 addition & 0 deletions src/native/external/libunwind.cmake
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Expand Up @@ -198,6 +198,7 @@ set(libunwind_la_SOURCES_riscv
riscv/Lget_proc_info.c riscv/Linit.c riscv/Lis_signal_frame.c
riscv/Lstep.c
riscv/getcontext.S
riscv/setcontext.S
riscv/Lget_save_loc.c
riscv/Linit_local.c riscv/Lregs.c
riscv/Lcreate_addr_space.c riscv/Lglobal.c riscv/Linit_remote.c riscv/Lresume.c
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37 changes: 37 additions & 0 deletions src/native/external/libunwind/src/CMakeLists.txt
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Expand Up @@ -326,6 +326,38 @@ SET(libunwind_loongarch64_la_SOURCES_loongarch
loongarch64/Gis_signal_frame.c loongarch64/Gregs.c loongarch64/Gresume.c loongarch64/Gstep.c
)

# The list of files that go into libunwind and libunwind-riscv:
SET(libunwind_la_SOURCES_riscv_common
${libunwind_la_SOURCES_common}
riscv/is_fpreg.c
riscv/regname.c
)

# The list of files that go into libunwind:
SET(libunwind_la_SOURCES_riscv
${libunwind_la_SOURCES_riscv_common}
${libunwind_la_SOURCES_local}
riscv/setcontext.S
riscv/Lapply_reg_state.c riscv/Lreg_states_iterate.c
riscv/Lcreate_addr_space.c riscv/Lget_proc_info.c
riscv/Lget_save_loc.c riscv/Lglobal.c riscv/Linit.c
riscv/Linit_local.c riscv/Linit_remote.c
riscv/Lis_signal_frame.c riscv/Lregs.c riscv/Lresume.c
riscv/Lstep.c riscv/getcontext.S
)

SET(libunwind_riscv_la_SOURCES_riscv
${libunwind_la_SOURCES_riscv_common}
${libunwind_la_SOURCES_generic}
riscv/Gapply_reg_state.c riscv/Greg_states_iterate.c
riscv/Gcreate_addr_space.c riscv/Gget_proc_info.c
riscv/Gget_save_loc.c riscv/Gglobal.c riscv/Ginit.c
riscv/Ginit_local.c riscv/Ginit_remote.c
riscv/Gis_signal_frame.c riscv/Gregs.c riscv/Gresume.c
riscv/Gstash_frame.c riscv/Gstep.c
)


if(TARGET_AARCH64)
SET(libunwind_la_SOURCES ${libunwind_la_SOURCES_aarch64})
SET(libunwind_remote_la_SOURCES ${libunwind_aarch64_la_SOURCES_aarch64})
Expand All @@ -349,6 +381,11 @@ elseif(TARGET_LOONGARCH64)
SET(libunwind_la_SOURCES ${libunwind_la_SOURCES_loongarch64})
SET(libunwind_remote_la_SOURCES ${libunwind_loongarch64_la_SOURCES_loongarch})
SET(libunwind_elf_la_SOURCES ${libunwind_elf64_la_SOURCES})
elseif(TARGET_RISCV)
SET(libunwind_la_SOURCES ${libunwind_la_SOURCES_riscv})
SET(libunwind_remote_la_SOURCES ${libunwind_riscv_la_SOURCES_riscv})
SET(libunwind_elf_la_SOURCES ${libunwind_elf64_la_SOURCES})
list(APPEND libunwind_setjmp_la_SOURCES riscv/siglongjmp.S)
endif()

add_library(libunwind
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1 change: 1 addition & 0 deletions src/tests/Directory.Build.props
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Expand Up @@ -141,6 +141,7 @@
<TargetBits Condition="'$(TargetArchitecture)'=='x64'">64</TargetBits>
<TargetBits Condition="'$(TargetArchitecture)'=='arm64'">64</TargetBits>
<TargetBits Condition="'$(TargetArchitecture)'=='loongarch64'">64</TargetBits>
<TargetBits Condition="'$(TargetArchitecture)'=='riscv64'">64</TargetBits>
</PropertyGroup>

<PropertyGroup>
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Expand Up @@ -10,7 +10,7 @@
#include <emmintrin.h>

typedef __m128i Vector128B;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <emmintrin.h>

typedef __m128i Vector128C;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <emmintrin.h>

typedef __m128d Vector128D;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <xmmintrin.h>

typedef __m128 Vector128F;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <emmintrin.h>

typedef __m128i Vector128L;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <emmintrin.h>

typedef __m128i Vector128U;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -8,7 +8,7 @@

#if defined(TARGET_XARCH)
#include <immintrin.h>
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
// Intentionally empty
#else
#error Unsupported target architecture
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64B;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64C;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64D;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64F;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64L;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -10,7 +10,7 @@
#include <mmintrin.h>

typedef __m64 Vector64U;
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64)
#elif defined(TARGET_ARMARCH) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64)
#if defined(_MSC_VER)
#if defined(TARGET_ARM64)
#include <arm64_neon.h>
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Expand Up @@ -197,7 +197,7 @@ struct OUTER3
static_assert_no_msg(sizeof(OUTER3) == 28);
#endif
#else // WINDOWS
#if defined(__x86_64__) || defined(__aarch64__) || defined(__loongarch64)
#if defined(__x86_64__) || defined(__aarch64__) || defined(__loongarch64) || defined(__riscv)
union OUTER3
{
struct InnerSequential arr[2];
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Expand Up @@ -5,6 +5,7 @@
<CLRTestTargetUnsupported Condition="'$(TargetArchitecture)' == 'x64'">true</CLRTestTargetUnsupported>
<CLRTestTargetUnsupported Condition="'$(TargetArchitecture)' == 'arm64'">true</CLRTestTargetUnsupported>
<CLRTestTargetUnsupported Condition="'$(TargetArchitecture)' == 'loongarch64'">true</CLRTestTargetUnsupported>
<CLRTestTargetUnsupported Condition="'$(TargetArchitecture)' == 'riscv64'">true</CLRTestTargetUnsupported>
</PropertyGroup>
<PropertyGroup>
<DebugType>PdbOnly</DebugType>
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3 changes: 3 additions & 0 deletions src/tests/run.sh
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Expand Up @@ -95,6 +95,9 @@ do
loongarch64)
buildArch="loongarch64"
;;
riscv64)
buildArch="riscv64"
;;
wasm)
buildArch="wasm"
;;
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