****** START compiling Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]] (MethodHash=c105d6e7)
Generating code for Windows x64
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC  = false
OPTIONS: compProcedureSplitting   = false
OPTIONS: compProcedureSplittingEH = false
OPTIONS: discarded IBC profile data due to mismatch in ILSize
IL to import:
IL_0000  02                ldarg.0     
IL_0001  0a                stloc.0     
IL_0002  03                ldarg.1     
IL_0003  0b                stloc.1     
IL_0004  04                ldarg.2     
IL_0005  0c                stloc.2     
IL_0006  02                ldarg.0     
IL_0007  03                ldarg.1     
IL_0008  04                ldarg.2     
IL_0009  0e 04             ldarg.s      0x4
IL_000b  05                ldarg.3     
IL_000c  28 e9 02 00 2b    call         0x2B0002E9
IL_0011  2a                ret         
'GenCtxt'   passed in register rcx

lvaSetClass: setting class for V01 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon] 
Arg #1    passed in register(s) rdx

lvaSetClass: setting class for V02 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon] 
Arg #2    passed in register(s) r8

lvaSetClass: setting class for V03 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean] 
Arg #3    passed in register(s) r9
set user arg V04 offset to 0
set user arg V05 offset to 8

lvaSetClass: setting class for V06 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon] 

lvaSetClass: setting class for V07 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon] 

lvaSetClass: setting class for V08 to (00000000D1FFAB1E) Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean] 

lvaGrabTemp returning 9 (V09 loc3) (a long lifetime temp) called for OutgoingArgSpace.
; Initial local variable assignments
;
;  V00 TypeCtx          long 
;  V01 arg0              ref  class-hnd
;  V02 arg1              ref  class-hnd
;  V03 arg2              ref  class-hnd
;  V04 arg3           struct <System.Nullable`1[Int32], 8>
;  V05 arg4              int 
;  V06 loc0              ref  class-hnd
;  V07 loc1              ref  class-hnd
;  V08 loc2              ref  class-hnd
;  V09 OutArgs        lclBlk <na>  "OutgoingArgSpace"
*************** In compInitDebuggingInfo() for Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
getVars() returned cVars = 0, extendOthers = true
info.compVarScopesCount = 9
    	VarNum 	LVNum 	      Name 	Beg 	End
 0: 	00h 	00h 	V00 TypeCtx 	000h   	012h
 1: 	01h 	01h 	  V01 arg0 	000h   	012h
 2: 	02h 	02h 	  V02 arg1 	000h   	012h
 3: 	03h 	03h 	  V03 arg2 	000h   	012h
 4: 	04h 	04h 	  V04 arg3 	000h   	012h
 5: 	05h 	05h 	  V05 arg4 	000h   	012h
 6: 	06h 	06h 	  V06 loc0 	000h   	012h
 7: 	07h 	07h 	  V07 loc1 	000h   	012h
 8: 	08h 	08h 	  V08 loc2 	000h   	012h
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
Marked V06 as a single def local
Marked V07 as a single def local
Marked V08 as a single def local
Jump targets:
  none
New Basic Block BB01 [0000] created.
BB01 [000..012)
IL Code Size,Instr   18,  13, Basic Block count   1, Local Variable Num,Ref count  10, 11 for method Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
OPTIONS: opts.MinOpts() == false
Basic block list for 'Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Pre-import

*************** Finishing PHASE Pre-import

*************** Starting PHASE Profile incorporation
BBOPT set, but no profile data available (hr=80004001)

*************** Finishing PHASE Profile incorporation [no changes]

*************** Starting PHASE Importation
*************** In impImport() for Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]

impImportBlockPending for BB01

Importing BB01 (PC=000) of 'Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]'
    [ 0]   0 (0x000) ldarg.0
    [ 1]   1 (0x001) stloc.0

STMT00000 (IL 0x000...  ???)
               [000002] -A----------              *  ASG       ref   
               [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         

    [ 0]   2 (0x002) ldarg.1
    [ 1]   3 (0x003) stloc.1

STMT00001 (IL 0x002...  ???)
               [000005] -A----------              *  ASG       ref   
               [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         

    [ 0]   4 (0x004) ldarg.2
    [ 1]   5 (0x005) stloc.2

STMT00002 (IL 0x004...  ???)
               [000008] -A----------              *  ASG       ref   
               [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         

    [ 0]   6 (0x006) ldarg.0
    [ 1]   7 (0x007) ldarg.1
    [ 2]   8 (0x008) ldarg.2
    [ 3]   9 (0x009) ldarg.s 4
    [ 4]  11 (0x00b) ldarg.3
    [ 5]  12 (0x00c) call 2B0002E9 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT)
In Compiler::impImportCall: opcode is call, kind=0, callRetType is ref, structSize is 0
Calling impNormStructVal on:
               [000013] ------------              *  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         
resulting tree:
               [000018] n-----------              *  OBJ       struct<System.Nullable`1[Int32], 8>
               [000017] ------------              \--*  ADDR      byref 
               [000013] -------N----                 \--*  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         

GTF_CALL_M_IMPLICIT_TAILCALL set for call [000014]
INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'too many il bytes' for 'Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]' calling 'Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307()'

INLINER: Marking Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307() as NOINLINE because of too many il bytes
INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'too many il bytes'

    [ 1]  17 (0x011) ret

STMT00003 (IL 0x006...  ???)
               [000019] --C-G-------              *  RETURN    ref   
               [000014] --C-G-------              \--*  CALL      ref    Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000016] ------------ arg0            +--*  RUNTIMELOOKUP long   0xd1ffab1e method
               [000015] !-----------                 |  \--*  LCL_VAR   long   V00 TypeCtx      
               [000009] ------------ arg1            +--*  LCL_VAR   ref    V01 arg0         
               [000010] ------------ arg2            +--*  LCL_VAR   ref    V02 arg1         
               [000011] ------------ arg3            +--*  LCL_VAR   ref    V03 arg2         
               [000012] ------------ arg4            +--*  LCL_VAR   int    V05 arg4         
               [000018] n----------- arg5            \--*  OBJ       struct<System.Nullable`1[Int32], 8>
               [000017] ------------                    \--*  ADDR      byref 
               [000013] -------N----                       \--*  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         

*************** Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
               [000002] -A----------              *  ASG       ref   
               [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
               [000005] -A----------              *  ASG       ref   
               [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
               [000008] -A----------              *  ASG       ref   
               [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
               [000019] --C-G-------              *  RETURN    ref   
               [000014] --C-G-------              \--*  CALL      ref    Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000016] ------------ arg0            +--*  RUNTIMELOOKUP long   0xd1ffab1e method
               [000015] !-----------                 |  \--*  LCL_VAR   long   V00 TypeCtx      
               [000009] ------------ arg1            +--*  LCL_VAR   ref    V01 arg0         
               [000010] ------------ arg2            +--*  LCL_VAR   ref    V02 arg1         
               [000011] ------------ arg3            +--*  LCL_VAR   ref    V03 arg2         
               [000012] ------------ arg4            +--*  LCL_VAR   int    V05 arg4         
               [000018] n----------- arg5            \--*  OBJ       struct<System.Nullable`1[Int32], 8>
               [000017] ------------                    \--*  ADDR      byref 
               [000013] -------N----                       \--*  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Finishing PHASE Indirect call transform [no changes]

*************** Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Finishing PHASE Expand patchpoints [no changes]

*************** Starting PHASE Post-import

*************** Finishing PHASE Post-import

*************** Starting PHASE Morph - Init

New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short)

*************** In fgRemoveEmptyBlocks

*************** Finishing PHASE Morph - Init
*************** In fgDebugCheckBBlist

*************** Starting PHASE Morph - Inlining
**************** Inline Tree
Inlines into 06000000 [via DefaultPolicy] Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
  [0 IL=0012 TR=000014 06000000] [FAILED: too many il bytes] Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307()
Budget: initialTime=114, finalTime=114, initialBudget=1140, currentBudget=1140
Budget: initialSize=541, finalSize=541

*************** Finishing PHASE Morph - Inlining [no changes]

*************** Starting PHASE Allocate Objects
no newobjs in this method; punting

*************** Finishing PHASE Allocate Objects [no changes]

*************** Starting PHASE Morph - Add internal blocks

*************** After fgAddInternal()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** Finishing PHASE Morph - Add internal blocks

*************** Starting PHASE Remove empty try

*************** In fgRemoveEmptyTry()
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty try [no changes]

*************** Starting PHASE Remove empty finally
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty finally [no changes]

*************** Starting PHASE Merge callfinally chains
No EH in this method, nothing to merge.

*************** Finishing PHASE Merge callfinally chains [no changes]

*************** Starting PHASE Clone finally
No EH in this method, no cloning.

*************** Finishing PHASE Clone finally [no changes]

*************** Starting PHASE Compute preds

Renumbering the basic blocks for fgComputePred

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** After renumbering the basic blocks
=============== No blocks renumbered!

*************** In fgComputePreds()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------


*************** After fgComputePreds()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target 
-----------------------------------------------------------------------------------------------------------------------------------------


*************** Finishing PHASE Compute preds

*************** Starting PHASE Merge throw blocks

*************** In fgTailMergeThrows
Method does not have multiple noreturn calls.

*************** Finishing PHASE Merge throw blocks [no changes]

*************** Starting PHASE Update flow graph early pass

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Update flow graph early pass

*************** Starting PHASE Morph - Promote Structs

*************** In fgResetImplicitByRefRefCount()
*************** In fgPromoteStructs()

lvaTable before fgPromoteStructs
; Initial local variable assignments
;
;  V00 TypeCtx          long 
;  V01 arg0              ref  class-hnd
;  V02 arg1              ref  class-hnd
;  V03 arg2              ref  class-hnd
;  V04 arg3           struct <System.Nullable`1[Int32], 8>
;  V05 arg4              int 
;  V06 loc0              ref  class-hnd
;  V07 loc1              ref  class-hnd
;  V08 loc2              ref  class-hnd
;  V09 OutArgs        lclBlk <na>  "OutgoingArgSpace"
Not promoting promotable struct local V04, because lvIsParam is true and #fields = 2.

lvaTable after fgPromoteStructs
; Initial local variable assignments
;
;  V00 TypeCtx          long 
;  V01 arg0              ref  class-hnd
;  V02 arg1              ref  class-hnd
;  V03 arg2              ref  class-hnd
;  V04 arg3           struct <System.Nullable`1[Int32], 8>
;  V05 arg4              int 
;  V06 loc0              ref  class-hnd
;  V07 loc1              ref  class-hnd
;  V08 loc2              ref  class-hnd
;  V09 OutArgs        lclBlk <na>  "OutgoingArgSpace"

*************** Finishing PHASE Morph - Promote Structs

*************** Starting PHASE Morph - Structs/AddrExp

*************** In fgMarkAddressExposedLocals()
LocalAddressVisitor visiting statement:
STMT00000 (IL 0x000...0x001)
               [000002] -A----------              *  ASG       ref   
               [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         

LocalAddressVisitor visiting statement:
STMT00001 (IL 0x002...0x003)
               [000005] -A----------              *  ASG       ref   
               [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         

LocalAddressVisitor visiting statement:
STMT00002 (IL 0x004...0x005)
               [000008] -A----------              *  ASG       ref   
               [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         

LocalAddressVisitor visiting statement:
STMT00003 (IL 0x006...0x011)
               [000019] --C-G-------              *  RETURN    ref   
               [000014] --C-G-------              \--*  CALL      ref    Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000016] ------------ arg0            +--*  RUNTIMELOOKUP long   0xd1ffab1e method
               [000015] !-----------                 |  \--*  LCL_VAR   long   V00 TypeCtx      
               [000009] ------------ arg1            +--*  LCL_VAR   ref    V01 arg0         
               [000010] ------------ arg2            +--*  LCL_VAR   ref    V02 arg1         
               [000011] ------------ arg3            +--*  LCL_VAR   ref    V03 arg2         
               [000012] ------------ arg4            +--*  LCL_VAR   int    V05 arg4         
               [000018] n----------- arg5            \--*  OBJ       struct<System.Nullable`1[Int32], 8>
               [000017] ------------                    \--*  ADDR      byref 
               [000013] -------N----                       \--*  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         


*************** Finishing PHASE Morph - Structs/AddrExp

*************** Starting PHASE Morph - ByRefs

*************** In fgRetypeImplicitByRefArgs()

*************** Finishing PHASE Morph - ByRefs

*************** Starting PHASE Morph - Global

*************** In fgMorphBlocks()

Morphing BB01 of 'Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]'

fgMorphTree BB01, STMT00000 (before)
               [000002] -A----------              *  ASG       ref   
               [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         
GenTreeNode creates assertion:
               [000002] -A----------              *  ASG       ref   
In BB01 New Local Copy     Assertion: V06 == V01 index=#01, mask=0000000000000001

fgMorphTree BB01, STMT00001 (before)
               [000005] -A----------              *  ASG       ref   
               [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         
GenTreeNode creates assertion:
               [000005] -A----------              *  ASG       ref   
In BB01 New Local Copy     Assertion: V07 == V02 index=#02, mask=0000000000000002

fgMorphTree BB01, STMT00002 (before)
               [000008] -A----------              *  ASG       ref   
               [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         
GenTreeNode creates assertion:
               [000008] -A----------              *  ASG       ref   
In BB01 New Local Copy     Assertion: V08 == V03 index=#03, mask=0000000000000004

fgMorphTree BB01, STMT00003 (before)
               [000019] --C-G-------              *  RETURN    ref   
               [000014] --C-G-------              \--*  CALL      ref    Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000016] ------------ arg0            +--*  RUNTIMELOOKUP long   0xd1ffab1e method
               [000015] !-----------                 |  \--*  LCL_VAR   long   V00 TypeCtx      
               [000009] ------------ arg1            +--*  LCL_VAR   ref    V01 arg0         
               [000010] ------------ arg2            +--*  LCL_VAR   ref    V02 arg1         
               [000011] ------------ arg3            +--*  LCL_VAR   ref    V03 arg2         
               [000012] ------------ arg4            +--*  LCL_VAR   int    V05 arg4         
               [000018] n----------- arg5            \--*  OBJ       struct<System.Nullable`1[Int32], 8>
               [000017] ------------                    \--*  ADDR      byref 
               [000013] -------N----                       \--*  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         
Initializing arg info for 14.CALL:
ArgTable for 14.CALL after fgInitArgInfo:
fgArgTabEntry[arg 0 16.RUNTIMELOOKUP long (By ref), 1 reg: rcx, byteAlignment=8]
fgArgTabEntry[arg 1 9.LCL_VAR ref (By ref), 1 reg: rdx, byteAlignment=8]
fgArgTabEntry[arg 2 10.LCL_VAR ref (By ref), 1 reg: r8, byteAlignment=8]
fgArgTabEntry[arg 3 11.LCL_VAR ref (By ref), 1 reg: r9, byteAlignment=8]
fgArgTabEntry[arg 4 12.LCL_VAR int (By ref), numSlots=1, slotNum=4, byteSize=8, byteOffset=32, byteAlignment=8]
fgArgTabEntry[arg 5 18.OBJ long (By value), numSlots=1, slotNum=5, byteSize=8, byteOffset=40, byteAlignment=8, isStruct]

[Fast tailcall decision]: Will fast tailcall

GTF_CALL_M_TAILCALL bit set for call [000014]
Remove all stmts after the call.
Replace root node [000019] with [000014] tail call node.
Morphing args for 14.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000015] !----+------              *  LCL_VAR   long   V00 TypeCtx      
Replaced with placeholder node:
               [000020] ----------L-              *  ARGPLACE  long  
Deferred argument ('rdx'):
               [000009] -----+------              *  LCL_VAR   ref    V01 arg0         
Replaced with placeholder node:
               [000021] ----------L-              *  ARGPLACE  ref   
Deferred argument ('r8'):
               [000010] -----+------              *  LCL_VAR   ref    V02 arg1         
Replaced with placeholder node:
               [000022] ----------L-              *  ARGPLACE  ref   
Deferred argument ('r9'):
               [000011] -----+------              *  LCL_VAR   ref    V03 arg2         
Replaced with placeholder node:
               [000023] ----------L-              *  ARGPLACE  ref   

Shuffled argument table:    rcx rdx r8 r9 
ArgTable for 14.CALL after fgMorphArgs:
fgArgTabEntry[arg 0 15.LCL_VAR long (By ref), 1 reg: rcx, byteAlignment=8, lateArgInx=0, processed]
fgArgTabEntry[arg 1 9.LCL_VAR ref (By ref), 1 reg: rdx, byteAlignment=8, lateArgInx=1, processed]
fgArgTabEntry[arg 2 10.LCL_VAR ref (By ref), 1 reg: r8, byteAlignment=8, lateArgInx=2, processed]
fgArgTabEntry[arg 3 11.LCL_VAR ref (By ref), 1 reg: r9, byteAlignment=8, lateArgInx=3, processed]
fgArgTabEntry[arg 4 12.LCL_VAR int (By ref), numSlots=1, slotNum=4, byteSize=8, byteOffset=32, byteAlignment=8, processed]
fgArgTabEntry[arg 5 13.LCL_FLD long (By value), numSlots=1, slotNum=5, byteSize=8, byteOffset=40, byteAlignment=8, processed, isStruct]


fgMorphTree BB01, STMT00003 (after)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

*************** Finishing PHASE Morph - Global
Trees after Morph - Global

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
               [000002] -A---+------              *  ASG       ref   
               [000001] D----+-N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] -----+------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
               [000005] -A---+------              *  ASG       ref   
               [000004] D----+-N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] -----+------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
               [000008] -A---+------              *  ASG       ref   
               [000007] D----+-N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] -----+------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE GS Cookie
No GS security needed

*************** Finishing PHASE GS Cookie

*************** Starting PHASE Compute edge weights (1, false)
*************** In fgComputeBlockAndEdgeWeights()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

 -- no profile data, so using default called count
 -- not optimizing or no profile data, so not computing edge weights

*************** Finishing PHASE Compute edge weights (1, false)

*************** Starting PHASE Create EH funclets
*************** In fgCreateFunclets()

After fgCreateFunclets()
-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Create EH funclets

*************** Starting PHASE Invert loops

*************** Finishing PHASE Invert loops
Trees after Invert loops

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
               [000002] -A---+------              *  ASG       ref   
               [000001] D----+-N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] -----+------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
               [000005] -A---+------              *  ASG       ref   
               [000004] D----+-N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] -----+------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
               [000008] -A---+------              *  ASG       ref   
               [000007] D----+-N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] -----+------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Optimize layout

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize layout
Trees after Optimize layout

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
               [000002] -A---+------              *  ASG       ref   
               [000001] D----+-N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] -----+------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
               [000005] -A---+------              *  ASG       ref   
               [000004] D----+-N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] -----+------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
               [000008] -A---+------              *  ASG       ref   
               [000007] D----+-N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] -----+------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Compute blocks reachability
*************** In fgComputeReachability
*************** In fgDebugCheckBBlist

Renumbering the basic blocks for fgComputeReachability pass #1

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** After renumbering the basic blocks
=============== No blocks renumbered!
Enter blocks: BB01 

After computing reachability sets:
------------------------------------------------
BBnum  Reachable by 
------------------------------------------------
BB01 : BB01 

After computing reachability:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist
*************** In fgComputeDoms
*************** In fgDebugCheckBBlist

Dominator computation start blocks (those blocks with no incoming edges):
BB01 
------------------------------------------------
BBnum  Dominated by
------------------------------------------------
BB01:  BB01 

Inside fgBuildDomTree

After computing the Dominance Tree:


After numbering the dominator tree:
BB01: pre=01, post=01

*************** Finishing PHASE Compute blocks reachability

*************** Starting PHASE Find loops
*************** In optFindLoops()
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Find loops
Trees after Find loops

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
               [000002] -A---+------              *  ASG       ref   
               [000001] D----+-N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] -----+------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
               [000005] -A---+------              *  ASG       ref   
               [000004] D----+-N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] -----+------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
               [000008] -A---+------              *  ASG       ref   
               [000007] D----+-N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] -----+------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Clone loops

*************** In optCloneLoops()

*************** Finishing PHASE Clone loops

*************** Starting PHASE Unroll loops

*************** Finishing PHASE Unroll loops

*************** Starting PHASE Mark local vars

*************** In lvaMarkLocalVars()
*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***

*** marking local variables in block BB01 (weight=1   )
STMT00000 (IL 0x000...0x001)
               [000002] -A---+------              *  ASG       ref   
               [000001] D----+-N----              +--*  LCL_VAR   ref    V06 loc0         
               [000000] -----+------              \--*  LCL_VAR   ref    V01 arg0         
New refCnts for V06: refCnt =  1, refCntWtd = 1   
New refCnts for V01: refCnt =  1, refCntWtd = 1   
STMT00001 (IL 0x002...0x003)
               [000005] -A---+------              *  ASG       ref   
               [000004] D----+-N----              +--*  LCL_VAR   ref    V07 loc1         
               [000003] -----+------              \--*  LCL_VAR   ref    V02 arg1         
New refCnts for V07: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  1, refCntWtd = 1   
STMT00002 (IL 0x004...0x005)
               [000008] -A---+------              *  ASG       ref   
               [000007] D----+-N----              +--*  LCL_VAR   ref    V08 loc2         
               [000006] -----+------              \--*  LCL_VAR   ref    V03 arg2         
New refCnts for V08: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  1, refCntWtd = 1   
STMT00003 (IL 0x006...0x011)
               [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
               [000012] -----+------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
               [000013] -----+------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
               [000015] !----+------ arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
               [000009] -----+------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
               [000010] -----+------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
               [000011] -----+------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         
New refCnts for V05: refCnt =  1, refCntWtd = 1   
New refCnts for V04: refCnt =  1, refCntWtd = 1   
-- generic context in use at [000015]
New refCnts for V00: refCnt =  1, refCntWtd = 1   
New refCnts for V01: refCnt =  2, refCntWtd = 2   
New refCnts for V02: refCnt =  2, refCntWtd = 2   
New refCnts for V03: refCnt =  2, refCntWtd = 2   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V00: refCnt =  3, refCntWtd = 3   
New refCnts for V01: refCnt =  3, refCntWtd = 3   
New refCnts for V01: refCnt =  4, refCntWtd = 4   
New refCnts for V02: refCnt =  3, refCntWtd = 3   
New refCnts for V02: refCnt =  4, refCntWtd = 4   
New refCnts for V03: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  4, refCntWtd = 4   

*************** In optAddCopies()


*************** Finishing PHASE Mark local vars

*************** Starting PHASE Optimize bools
*************** In optOptimizeBools()
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize bools

*************** Starting PHASE Find oper order
*************** In fgFindOperOrder()

*************** Finishing PHASE Find oper order

*************** Starting PHASE Set block order
*************** In fgSetBlockOrder()
The biggest BB has   11 tree nodes

*************** Finishing PHASE Set block order
Trees before Build SSA representation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00000 (IL 0x000...0x001)
N003 (  5,  4) [000002] -A------R---              *  ASG       ref   
N002 (  3,  2) [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
N001 (  1,  1) [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         

***** BB01
STMT00001 (IL 0x002...0x003)
N003 (  5,  4) [000005] -A------R---              *  ASG       ref   
N002 (  3,  2) [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
N001 (  1,  1) [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         

***** BB01
STMT00002 (IL 0x004...0x005)
N003 (  5,  4) [000008] -A------R---              *  ASG       ref   
N002 (  3,  2) [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
N001 (  1,  1) [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         [+0]
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Build SSA representation
*************** In SsaBuilder::Build()
[SsaBuilder] Max block count is 2.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
[SsaBuilder] Topologically sorted the graph.
[SsaBuilder::ComputeImmediateDom]

Inside fgBuildDomTree

After computing the Dominance Tree:

*************** In fgLocalVarLiveness()
In fgLocalVarLivenessInit

Local V04 should not be enregistered because: it is a struct
Tracked variable (9 out of 10) table:
V01 arg0          [   ref]: refCnt =    4, refCntWtd =   4   
V02 arg1          [   ref]: refCnt =    4, refCntWtd =   4   
V03 arg2          [   ref]: refCnt =    4, refCntWtd =   4   
V00 TypeCtx       [  long]: refCnt =    3, refCntWtd =   3   
V06 loc0          [   ref]: refCnt =    1, refCntWtd =   1   
V07 loc1          [   ref]: refCnt =    1, refCntWtd =   1   
V08 loc2          [   ref]: refCnt =    1, refCntWtd =   1   
V04 arg3          [struct]: refCnt =    1, refCntWtd =   1   
V05 arg4          [   int]: refCnt =    1, refCntWtd =   1   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(6)={V01 V02 V03 V00             V04 V05} + ByrefExposed + GcHeap
     DEF(3)={                V06 V07 V08        } + ByrefExposed* + GcHeap*

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (6)={V01 V02 V03 V00 V04 V05} + ByrefExposed + GcHeap
     OUT(0)={                       }

top level assign
removing stmt with no side effects

Removing statement STMT00002 (IL 0x004...0x005)
N003 (  5,  4) [000008] -A------R---              *  ASG       ref   
N002 (  3,  2) [000007] D------N----              +--*  LCL_VAR   ref    V08 loc2         
N001 (  1,  1) [000006] ------------              \--*  LCL_VAR   ref    V03 arg2         
 in BB01 as useless:

top level assign
removing stmt with no side effects

Removing statement STMT00001 (IL 0x002...0x003)
N003 (  5,  4) [000005] -A------R---              *  ASG       ref   
N002 (  3,  2) [000004] D------N----              +--*  LCL_VAR   ref    V07 loc1         
N001 (  1,  1) [000003] ------------              \--*  LCL_VAR   ref    V02 arg1         
 in BB01 as useless:

top level assign
removing stmt with no side effects

Removing statement STMT00000 (IL 0x000...0x001)
N003 (  5,  4) [000002] -A------R---              *  ASG       ref   
N002 (  3,  2) [000001] D------N----              +--*  LCL_VAR   ref    V06 loc0         
N001 (  1,  1) [000000] ------------              \--*  LCL_VAR   ref    V01 arg0         
 in BB01 as useless:

*************** In optRemoveRedundantZeroInits()
*************** In SsaBuilder::InsertPhiFunctions()
Inserting phi functions:
*************** In SsaBuilder::RenameVariables()

After fgSsaBuild:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use)
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use)
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use)
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use)
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use)
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Build SSA representation
Trees after Build SSA representation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use)
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use)
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use)
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use)
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use)
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Early Value Propagation
*************** In optEarlyProp()

After optEarlyProp:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use)
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use)
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use)
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use)
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use)
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Early Value Propagation

*************** Starting PHASE Do value numbering

*************** In fgValueNumber()
Memory Initial Value in BB01 is: $c3
The SSA definition for ByrefExposed (#1) at start of BB01 is $c3 {InitVal($46)}
The SSA definition for GcHeap (#1) at start of BB01 is $c3 {InitVal($46)}

***** BB01, STMT00003(before)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use)
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use)
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use)
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use)
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use)
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use)

N001 [000020]   ARGPLACE  => $180 {180}
N002 [000021]   ARGPLACE  => $1c0 {1c0}
N003 [000022]   ARGPLACE  => $1c1 {1c1}
N004 [000023]   ARGPLACE  => $1c2 {1c2}
N005 [000012]   LCL_VAR   V05 arg4         u:1 (last use) => $140 {InitVal($45)}
N006 [000013]   LCL_FLD   V04 arg3         u:1[+0] (last use) => $181 {181}
N007 [000015]   LCL_VAR   V00 TypeCtx      u:1 (last use) => $80 {InitVal($40)}
N008 [000009]   LCL_VAR   V01 arg0         u:1 (last use) => $c0 {InitVal($41)}
N009 [000010]   LCL_VAR   V02 arg1         u:1 (last use) => $c1 {InitVal($42)}
N010 [000011]   LCL_VAR   V03 arg2         u:1 (last use) => $c2 {InitVal($43)}
VN of ARGPLACE tree [000020] updated to $80 {InitVal($40)}
VN of ARGPLACE tree [000021] updated to $c0 {InitVal($41)}
VN of ARGPLACE tree [000022] updated to $c1 {InitVal($42)}
VN of ARGPLACE tree [000023] updated to $c2 {InitVal($43)}
  fgCurMemoryVN[GcHeap] assigned for CALL at [000014] to VN: $1c3.
N011 [000014]   CALL      => $VN.Void

***** BB01, STMT00003(after)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2

finish(BB01).

*************** Finishing PHASE Do value numbering

*************** Starting PHASE Hoist loop code

*************** Finishing PHASE Hoist loop code

*************** Starting PHASE VN based copy prop
*************** In optVnCopyProp()
Copy Assertion for BB01
  curSsaName stack: { }

							Live vars: {V00 V01 V02 V03 V04 V05} => {V00 V01 V02 V03 V04}
							Live vars: {V00 V01 V02 V03 V04} => {V00 V01 V02 V03}
							Live vars: {V00 V01 V02 V03} => {V01 V02 V03}
							Live vars: {V01 V02 V03} => {V02 V03}
							Live vars: {V02 V03} => {V03}
							Live vars: {V03} => {}

*************** Finishing PHASE VN based copy prop

*************** Starting PHASE Redundant branch opts

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Redundant branch opts [no changes]

*************** Starting PHASE Optimize Valnum CSEs

*************** In optOptimizeCSEs()
Blocks/Trees at start of optOptimizeCSE phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2

-------------------------------------------------------------------------------------------------------------------

*************** In optOptimizeValnumCSEs()

*************** Finishing PHASE Optimize Valnum CSEs

*************** Starting PHASE Assertion prop
*************** In optAssertionPropMain()
Blocks/Trees at start of phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Assertion prop

*************** Starting PHASE Optimize index checks
*************** In OptimizeRangeChecks()
Blocks/trees before phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Optimize index checks

*************** Starting PHASE Insert GC Polls

*************** Finishing PHASE Insert GC Polls [no changes]

*************** Starting PHASE Determine first cold block

*************** In fgDetermineFirstColdBlock()
No procedure splitting will be done for this method

*************** Finishing PHASE Determine first cold block
Trees before Rationalize IR

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}

***** BB01
STMT00003 (IL 0x006...0x011)
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void
N005 (  3,  2) [000012] ------------ arg4 out+20  +--*  LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------ arg5 out+28  +--*  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !----------- arg0 in rcx  +--*  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------ arg1 in rdx  +--*  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------ arg2 in r8   +--*  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------ arg3 in r9   \--*  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Rationalize IR

*************** Finishing PHASE Rationalize IR
Trees after Rationalize IR

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
               [000025] ------------                 IL_OFFSET void   IL offset: 0x6
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t12    int    arg4 out+20
                                                  +--*  t13    long   arg5 out+28
                                                  +--*  t15    long   arg0 in rcx
                                                  +--*  t9     ref    arg1 in rdx
                                                  +--*  t10    ref    arg2 in r8
                                                  +--*  t11    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Do 'simple' lowering
outgoingArgSpaceSize not impacted by fast tail call [000014]

*************** Finishing PHASE Do 'simple' lowering
*************** In fgDebugCheckBBlist
Trees before Lowering nodeinfo

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
               [000025] ------------                 IL_OFFSET void   IL offset: 0x6
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t12    int    arg4 out+20
                                                  +--*  t13    long   arg5 out+28
                                                  +--*  t15    long   arg0 in rcx
                                                  +--*  t9     ref    arg1 in rdx
                                                  +--*  t10    ref    arg2 in r8
                                                  +--*  t11    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Lowering nodeinfo
lowering call (before):
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t12    int    arg4 out+20
                                                  +--*  t13    long   arg5 out+28
                                                  +--*  t15    long   arg0 in rcx
                                                  +--*  t9     ref    arg1 in rdx
                                                  +--*  t10    ref    arg2 in r8
                                                  +--*  t11    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

objp:
======

args:
======
lowering arg : N001 (  0,  0) [000020] ----------L-              *  ARGPLACE  long   $80
lowering arg : N002 (  0,  0) [000021] ----------L-              *  ARGPLACE  ref    $c0
lowering arg : N003 (  0,  0) [000022] ----------L-              *  ARGPLACE  ref    $c1
lowering arg : N004 (  0,  0) [000023] ----------L-              *  ARGPLACE  ref    $c2
lowering arg : N005 (  3,  2) [000012] ------------              *  LCL_VAR   int    V05 arg4         u:1 (last use) $140
new node is :                [000026] ------------              *  PUTARG_STK [+0x20] void  

lowering arg : N006 (  3,  4) [000013] ------------              *  LCL_FLD   long   V04 arg3         u:1[+0] (last use) $181
new node is :                [000027] ------------              *  PUTARG_STK [+0x28] void  


late:
======
lowering arg : N007 (  1,  1) [000015] !-----------              *  LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
new node is :                [000028] ------------              *  PUTARG_REG long   REG rcx

lowering arg : N008 (  1,  1) [000009] ------------              *  LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
new node is :                [000029] ------------              *  PUTARG_REG ref    REG rdx

lowering arg : N009 (  1,  1) [000010] ------------              *  LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
new node is :                [000030] ------------              *  PUTARG_REG ref    REG r8

lowering arg : N010 (  1,  1) [000011] ------------              *  LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
new node is :                [000031] ------------              *  PUTARG_REG ref    REG r9


lvaGrabTemp returning 10 (V10 rat0) called for Fast tail call lowering is creating a new local variable.
lowering call (after):
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
                                                  /--*  t12    int    
               [000026] ------------              *  PUTARG_STK [+0x20] void  
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] $181
                                                  /--*  t13    long   
               [000027] ------------              *  PUTARG_STK [+0x28] void  
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
                                                  /--*  t15    long   
               [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
                                                  /--*  t9     ref    
               [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
                                                  /--*  t10    ref    
               [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t11    ref    
               [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
                                                  /--*  t28    long   arg0 in rcx
                                                  +--*  t29    ref    arg1 in rdx
                                                  +--*  t30    ref    arg2 in r8
                                                  +--*  t31    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

Lower has completed modifying nodes.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
               [000025] ------------                 IL_OFFSET void   IL offset: 0x6
               [000033] ------------                 NO_OP     void  
               [000032] ------------                 START_NONGC void  
N001 (  3,  3) [000035] -c----------        t35 =    LCL_VAR_ADDR byref  V10 rat0         
N002 (  3,  2) [000034] -c----------        t34 =    LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3         
                                                  /--*  t35    byref  
                                                  +--*  t34    struct 
N003 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll)
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
                                                  /--*  t12    int    
               [000026] ------------              *  PUTARG_STK [+0x20] void  
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] $181
                                                  /--*  t13    long   
               [000027] ------------              *  PUTARG_STK [+0x28] void  
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
                                                  /--*  t15    long   
               [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
                                                  /--*  t9     ref    
               [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
                                                  /--*  t10    ref    
               [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t11    ref    
               [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
                                                  /--*  t28    long   arg0 in rcx
                                                  +--*  t29    ref    arg1 in rdx
                                                  +--*  t30    ref    arg2 in r8
                                                  +--*  t31    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

-------------------------------------------------------------------------------------------------------------------

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V10: refCnt =  1, refCntWtd = 2   
New refCnts for V04: refCnt =  1, refCntWtd = 1   
New refCnts for V05: refCnt =  1, refCntWtd = 1   
New refCnts for V10: refCnt =  2, refCntWtd = 4   
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V01: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  1, refCntWtd = 1   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  3, refCntWtd = 3   
New refCnts for V00: refCnt =  4, refCntWtd = 4   
New refCnts for V01: refCnt =  2, refCntWtd = 2   
New refCnts for V01: refCnt =  3, refCntWtd = 3   
New refCnts for V02: refCnt =  2, refCntWtd = 2   
New refCnts for V02: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  2, refCntWtd = 2   
New refCnts for V03: refCnt =  3, refCntWtd = 3   
*************** In fgLocalVarLiveness()
; Initial local variable assignments
;
;  V00 TypeCtx          long 
;  V01 arg0              ref  class-hnd
;  V02 arg1              ref  class-hnd
;  V03 arg2              ref  class-hnd
;  V04 arg3           struct <System.Nullable`1[Int32], 8> do-not-enreg[S]
;  V05 arg4              int 
;  V06 loc0              ref  class-hnd
;  V07 loc1              ref  class-hnd
;  V08 loc2              ref  class-hnd
;  V09 OutArgs        lclBlk <0>  "OutgoingArgSpace"
;  V10 rat0           struct <System.Nullable`1[Int32], 8> do-not-enreg[S] "Fast tail call lowering is creating a new local variable"
In fgLocalVarLivenessInit

Local V04 should not be enregistered because: it is a struct

Local V10 should not be enregistered because: it is a struct
Tracked variable (7 out of 11) table:
V00 TypeCtx       [  long]: refCnt =    4, refCntWtd =   4   
V01 arg0          [   ref]: refCnt =    3, refCntWtd =   3   
V02 arg1          [   ref]: refCnt =    3, refCntWtd =   3   
V03 arg2          [   ref]: refCnt =    3, refCntWtd =   3   
V10 rat0          [struct]: refCnt =    2, refCntWtd =   4   
V04 arg3          [struct]: refCnt =    1, refCntWtd =   1   
V05 arg4          [   int]: refCnt =    1, refCntWtd =   1   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(7)={V00 V01 V02 V03 V10 V04 V05} + ByrefExposed + GcHeap
     DEF(0)={                           } + ByrefExposed* + GcHeap*

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (7)={V00 V01 V02 V03 V10 V04 V05} + ByrefExposed + GcHeap
     OUT(0)={                           }

Removing dead node:
               [000033] ------------              *  NO_OP     void  

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V10: refCnt =  1, refCntWtd = 2   
New refCnts for V04: refCnt =  1, refCntWtd = 1   
New refCnts for V05: refCnt =  1, refCntWtd = 1   
New refCnts for V10: refCnt =  2, refCntWtd = 4   
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V01: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  1, refCntWtd = 1   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  3, refCntWtd = 3   
New refCnts for V00: refCnt =  4, refCntWtd = 4   
New refCnts for V01: refCnt =  2, refCntWtd = 2   
New refCnts for V01: refCnt =  3, refCntWtd = 3   
New refCnts for V02: refCnt =  2, refCntWtd = 2   
New refCnts for V02: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  2, refCntWtd = 2   
New refCnts for V03: refCnt =  3, refCntWtd = 3   

*************** Finishing PHASE Lowering nodeinfo
Trees after Lowering nodeinfo

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
               [000025] ------------                 IL_OFFSET void   IL offset: 0x6
               [000032] ------------                 START_NONGC void  
N001 (  3,  3) [000035] -c----------        t35 =    LCL_VAR_ADDR byref  V10 rat0         
N002 (  3,  2) [000034] -c----------        t34 =    LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3          (last use)
                                                  /--*  t35    byref  
                                                  +--*  t34    struct 
N003 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll)
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
                                                  /--*  t12    int    
               [000026] ------------              *  PUTARG_STK [+0x20] void  
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] (last use) $181
                                                  /--*  t13    long   
               [000027] ------------              *  PUTARG_STK [+0x28] void  
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
                                                  /--*  t15    long   
               [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
                                                  /--*  t9     ref    
               [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
                                                  /--*  t10    ref    
               [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t11    ref    
               [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
                                                  /--*  t28    long   arg0 in rcx
                                                  +--*  t29    ref    arg1 in rdx
                                                  +--*  t30    ref    arg2 in r8
                                                  +--*  t31    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Trees before Calculate stack level slots

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
               [000025] ------------                 IL_OFFSET void   IL offset: 0x6
               [000032] ------------                 START_NONGC void  
N001 (  3,  3) [000035] -c----------        t35 =    LCL_VAR_ADDR byref  V10 rat0         
N002 (  3,  2) [000034] -c----------        t34 =    LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3          (last use)
                                                  /--*  t35    byref  
                                                  +--*  t34    struct 
N003 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll)
N005 (  3,  2) [000012] ------------        t12 =    LCL_VAR   int    V05 arg4         u:1 (last use) $140
                                                  /--*  t12    int    
               [000026] ------------              *  PUTARG_STK [+0x20] void  
N006 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] (last use) $181
                                                  /--*  t13    long   
               [000027] ------------              *  PUTARG_STK [+0x28] void  
N007 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 (last use) $80
                                                  /--*  t15    long   
               [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
N008 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 (last use) $c0
                                                  /--*  t9     ref    
               [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
N009 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 (last use) $c1
                                                  /--*  t10    ref    
               [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
N010 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 (last use) $c2
                                                  /--*  t11    ref    
               [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
                                                  /--*  t28    long   arg0 in rcx
                                                  +--*  t29    ref    arg1 in rdx
                                                  +--*  t30    ref    arg2 in r8
                                                  +--*  t31    ref    arg3 in r9
N011 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 $VN.Void

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Calculate stack level slots

*************** Finishing PHASE Calculate stack level slots [no changes]

*************** Starting PHASE Linear scan register alloc
Clearing modified regs.

buildIntervals ========

-----------------
LIVENESS:
-----------------
BB01 use def in out
{V00 V01 V02 V03 V04 V05 V10}
{}
{V00 V01 V02 V03 V04 V05 V10}
{}
Interval  0: long RefPositions {} physReg:NA Preferences=[allInt]
  Interval  0: (V00) long RefPositions {} physReg:NA Preferences=[allInt]
Interval  1: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  1: (V01) ref RefPositions {} physReg:NA Preferences=[allInt]
Interval  2: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  2: (V02) ref RefPositions {} physReg:NA Preferences=[allInt]
Interval  3: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  3: (V03) ref RefPositions {} physReg:NA Preferences=[allInt]

Local V04 should not be enregistered because: it is a struct
Interval  4: int RefPositions {} physReg:NA Preferences=[allInt]
  Interval  4: (V05) int RefPositions {} physReg:NA Preferences=[allInt]

Local V10 should not be enregistered because: it is a struct

FP callee save candidate vars: None

floatVarCount = 0; hasLoops = 0, singleExit = 1
TUPLE STYLE DUMP BEFORE LSRA
LSRA Block Sequence: BB01(  1   ) 

BB01 [000..012) (return), preds={} succs={}
=====
  N000.                    IL_OFFSET IL offset: 0x6
  N000.                    START_NONGC
  N001.                    LCL_VAR_ADDR V10 rat0         
  N002.                    V04 MEM
  N003.                    STORE_BLK
  N005.                    V05(t12*)
  N000.                    PUTARG_STK [+0x20]; t12*
  N006. t13             =  V10 MEM
  N000.                    PUTARG_STK [+0x28]; t13
  N007.                    V00(t15*)
  N000. t28             =  PUTARG_REG; t15*
  N008.                    V01(t9*)
  N000. t29             =  PUTARG_REG; t9*
  N009.                    V02(t10*)
  N000. t30             =  PUTARG_REG; t10*
  N010.                    V03(t11*)
  N000. t31             =  PUTARG_REG; t11*
  N011.                    CALL     ; t28,t29,t30,t31




buildIntervals second part ========
Int arg V00 in reg rcx
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed>
Int arg V01 in reg rdx
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed>
Int arg V02 in reg r8
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed>
Int arg V03 in reg r9
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed>
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[allInt] minReg=1>

NEW BLOCK BB01
<RefPosition #5   @1   RefTypeBB  BB01 regmask=[] minReg=1>

DefList: {  }
N003 (???,???) [000025] ------------              *  IL_OFFSET void   IL offset: 0x6 REG NA

DefList: {  }
N005 (???,???) [000032] ------------              *  START_NONGC void   REG NA

DefList: {  }
N007 (  3,  3) [000035] -c----------              *  LCL_VAR_ADDR byref  V10 rat0          NA REG NA
Contained
DefList: {  }
N009 (  3,  2) [000034] -c----------              *  LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3          NA (last use) REG NA
Contained
DefList: {  }
N011 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll) REG NA
Interval  5: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #6   @11  RefTypeDef <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1>
<RefPosition #7   @11  RefTypeUse <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last>

DefList: {  }
N013 (  3,  2) [000012] ------------              *  LCL_VAR   int    V05 arg4         u:1 NA (last use) REG NA $140

DefList: {  }
N015 (???,???) [000026] ------------              *  PUTARG_STK [+0x20] void   REG NA
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allInt] minReg=1 last>

DefList: {  }
N017 (  3,  4) [000013] ------------              *  LCL_FLD   long   V10 rat0         [+0] NA (last use) REG NA $181
Interval  6: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #9   @18  RefTypeDef <Ivl:6> LCL_FLD BB01 regmask=[allInt] minReg=1>

DefList: { N017.t13. LCL_FLD }
N019 (???,???) [000027] ------------              *  PUTARG_STK [+0x28] void   REG NA
<RefPosition #10  @19  RefTypeUse <Ivl:6>  BB01 regmask=[allInt] minReg=1 last>

DefList: {  }
N021 (  1,  1) [000015] !-----------              *  LCL_VAR   long   V00 TypeCtx      u:1 NA (last use) REG NA $80

DefList: {  }
N023 (???,???) [000028] ------------              *  PUTARG_REG long   REG rcx
<RefPosition #11  @23  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
Interval  7: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #13  @24  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #14  @24  RefTypeDef <Ivl:7> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>

DefList: { N023.t28. PUTARG_REG }
N025 (  1,  1) [000009] ------------              *  LCL_VAR   ref    V01 arg0         u:1 NA (last use) REG NA $c0

DefList: { N023.t28. PUTARG_REG }
N027 (???,???) [000029] ------------              *  PUTARG_REG ref    REG rdx
<RefPosition #15  @27  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
Interval  8: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #17  @28  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #18  @28  RefTypeDef <Ivl:8> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed>

DefList: { N023.t28. PUTARG_REG; N027.t29. PUTARG_REG }
N029 (  1,  1) [000010] ------------              *  LCL_VAR   ref    V02 arg1         u:1 NA (last use) REG NA $c1

DefList: { N023.t28. PUTARG_REG; N027.t29. PUTARG_REG }
N031 (???,???) [000030] ------------              *  PUTARG_REG ref    REG r8
<RefPosition #19  @31  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
Interval  9: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #21  @32  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #22  @32  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed>

DefList: { N023.t28. PUTARG_REG; N027.t29. PUTARG_REG; N031.t30. PUTARG_REG }
N033 (  1,  1) [000011] ------------              *  LCL_VAR   ref    V03 arg2         u:1 NA (last use) REG NA $c2

DefList: { N023.t28. PUTARG_REG; N027.t29. PUTARG_REG; N031.t30. PUTARG_REG }
N035 (???,???) [000031] ------------              *  PUTARG_REG ref    REG r9
<RefPosition #23  @35  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
Interval 10: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #25  @36  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #26  @36  RefTypeDef <Ivl:10> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed>

DefList: { N023.t28. PUTARG_REG; N027.t29. PUTARG_REG; N031.t30. PUTARG_REG; N035.t31. PUTARG_REG }
N037 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 REG NA $VN.Void
<RefPosition #27  @37  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #28  @37  RefTypeUse <Ivl:7>  BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #29  @37  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #30  @37  RefTypeUse <Ivl:8>  BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #31  @37  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #32  @37  RefTypeUse <Ivl:9>  BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #33  @37  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #34  @37  RefTypeUse <Ivl:10>  BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #35  @38  RefTypeKill <Reg:rax>  BB01 regmask=[rax] minReg=1>
<RefPosition #36  @38  RefTypeKill <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #37  @38  RefTypeKill <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #38  @38  RefTypeKill <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #39  @38  RefTypeKill <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #40  @38  RefTypeKill <Reg:r10>  BB01 regmask=[r10] minReg=1>
<RefPosition #41  @38  RefTypeKill <Reg:r11>  BB01 regmask=[r11] minReg=1>



CHECKING LAST USES for BB01, liveout={}
==============================
use: {V00 V01 V02 V03 V04 V05 V10}
def: {}

Linear scan intervals BEFORE VALIDATING INTERVALS:
Interval  0: (V00) long RefPositions {#0@0 #12@23} physReg:rcx Preferences=[rcx]
Interval  1: (V01) ref RefPositions {#1@0 #16@27} physReg:rdx Preferences=[rdx]
Interval  2: (V02) ref RefPositions {#2@0 #20@31} physReg:r8 Preferences=[r8]
Interval  3: (V03) ref RefPositions {#3@0 #24@35} physReg:r9 Preferences=[r9]
Interval  4: (V05) int RefPositions {#4@0 #8@15} physReg:NA Preferences=[allInt]
Interval  5: int (INTERNAL) RefPositions {#6@11 #7@11} physReg:NA Preferences=[allInt]
Interval  6: long RefPositions {#9@18 #10@19} physReg:NA Preferences=[allInt]
Interval  7: long RefPositions {#14@24 #28@37} physReg:NA Preferences=[rcx]
Interval  8: ref RefPositions {#18@28 #30@37} physReg:NA Preferences=[rdx]
Interval  9: ref RefPositions {#22@32 #32@37} physReg:NA Preferences=[r8]
Interval 10: ref RefPositions {#26@36 #34@37} physReg:NA Preferences=[r9]

------------
REFPOSITIONS BEFORE VALIDATING INTERVALS: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[allInt] minReg=1 regOptional>
<RefPosition #5   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #6   @11  RefTypeDef <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1>
<RefPosition #7   @11  RefTypeUse <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #9   @18  RefTypeDef <Ivl:6> LCL_FLD BB01 regmask=[allInt] minReg=1>
<RefPosition #10  @19  RefTypeUse <Ivl:6>  BB01 regmask=[allInt] minReg=1 last>
<RefPosition #11  @23  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #13  @24  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #14  @24  RefTypeDef <Ivl:7> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #15  @27  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #17  @28  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #18  @28  RefTypeDef <Ivl:8> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed>
<RefPosition #19  @31  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #21  @32  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #22  @32  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed>
<RefPosition #23  @35  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #25  @36  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #26  @36  RefTypeDef <Ivl:10> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed>
<RefPosition #27  @37  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #28  @37  RefTypeUse <Ivl:7>  BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #29  @37  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #30  @37  RefTypeUse <Ivl:8>  BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #31  @37  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #32  @37  RefTypeUse <Ivl:9>  BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #33  @37  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #34  @37  RefTypeUse <Ivl:10>  BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #35  @38  RefTypeKill <Reg:rax>  BB01 regmask=[rax] minReg=1 last>
<RefPosition #36  @38  RefTypeKill <Reg:rcx>  BB01 regmask=[rcx] minReg=1 last>
<RefPosition #37  @38  RefTypeKill <Reg:rdx>  BB01 regmask=[rdx] minReg=1 last>
<RefPosition #38  @38  RefTypeKill <Reg:r8 >  BB01 regmask=[r8] minReg=1 last>
<RefPosition #39  @38  RefTypeKill <Reg:r9 >  BB01 regmask=[r9] minReg=1 last>
<RefPosition #40  @38  RefTypeKill <Reg:r10>  BB01 regmask=[r10] minReg=1 last>
<RefPosition #41  @38  RefTypeKill <Reg:r11>  BB01 regmask=[r11] minReg=1 last>
-----------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
-----------------
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
-----------------
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
-----------------
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
-----------------
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[allInt] minReg=1 regOptional>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
TUPLE STYLE DUMP WITH REF POSITIONS
Incoming Parameters:  V00 V01 V02 V03 V05
BB01 [000..012) (return), preds={} succs={}
=====
  N003.                    IL_OFFSET IL offset: 0x6
  N005.                    START_NONGC
  N007.                    LCL_VAR_ADDR V10 rat0          NA
  N009.                    V04 MEM
  N011.                    STORE_BLK
        Def:<T5>(#6)
                               Use:<T5>(#7) *
  N013.                    V05(L4)
  N015.                    PUTARG_STK [+0x20]
                               Use:<V05/L4>(#8) *
  N017.                    V10 MEM
        Def:<I6>(#9)
  N019.                    PUTARG_STK [+0x28]
                               Use:<I6>(#10) *
  N021.                    V00(L0)
  N023.                    PUTARG_REG
                               Use:<V00/L0>(#12) Fixed:rcx(#11) *
        Def:<I7>(#14) rcx
  N025.                    V01(L1)
  N027.                    PUTARG_REG
                               Use:<V01/L1>(#16) Fixed:rdx(#15) *
        Def:<I8>(#18) rdx
  N029.                    V02(L2)
  N031.                    PUTARG_REG
                               Use:<V02/L2>(#20) Fixed:r8(#19) *
        Def:<I9>(#22) r8
  N033.                    V03(L3)
  N035.                    PUTARG_REG
                               Use:<V03/L3>(#24) Fixed:r9(#23) *
        Def:<I10>(#26) r9
  N037.                    CALL     
                               Use:<I7>(#28) Fixed:rcx(#27) *
                               Use:<I8>(#30) Fixed:rdx(#29) *
                               Use:<I9>(#32) Fixed:r8(#31) *
                               Use:<I10>(#34) Fixed:r9(#33) *
        Kill: rax rcx rdx r8 r9 r10 r11 




Linear scan intervals after buildIntervals:
Interval  0: (V00) long RefPositions {#0@0 #12@23} physReg:rcx Preferences=[rcx]
Interval  1: (V01) ref RefPositions {#1@0 #16@27} physReg:rdx Preferences=[rdx]
Interval  2: (V02) ref RefPositions {#2@0 #20@31} physReg:r8 Preferences=[r8]
Interval  3: (V03) ref RefPositions {#3@0 #24@35} physReg:r9 Preferences=[r9]
Interval  4: (V05) int RefPositions {#4@0 #8@15} physReg:NA Preferences=[allInt]
Interval  5: int (INTERNAL) RefPositions {#6@11 #7@11} physReg:NA Preferences=[allInt]
Interval  6: long RefPositions {#9@18 #10@19} physReg:NA Preferences=[allInt]
Interval  7: long RefPositions {#14@24 #28@37} physReg:NA Preferences=[rcx]
Interval  8: ref RefPositions {#18@28 #30@37} physReg:NA Preferences=[rdx]
Interval  9: ref RefPositions {#22@32 #32@37} physReg:NA Preferences=[r8]
Interval 10: ref RefPositions {#26@36 #34@37} physReg:NA Preferences=[r9]

*************** In LinearScan::allocateRegisters()

Linear scan intervals before allocateRegisters:
Interval  0: (V00) long RefPositions {#0@0 #12@23} physReg:rcx Preferences=[rcx]
Interval  1: (V01) ref RefPositions {#1@0 #16@27} physReg:rdx Preferences=[rdx]
Interval  2: (V02) ref RefPositions {#2@0 #20@31} physReg:r8 Preferences=[r8]
Interval  3: (V03) ref RefPositions {#3@0 #24@35} physReg:r9 Preferences=[r9]
Interval  4: (V05) int RefPositions {#4@0 #8@15} physReg:NA Preferences=[allInt]
Interval  5: int (INTERNAL) RefPositions {#6@11 #7@11} physReg:NA Preferences=[allInt]
Interval  6: long RefPositions {#9@18 #10@19} physReg:NA Preferences=[allInt]
Interval  7: long RefPositions {#14@24 #28@37} physReg:NA Preferences=[rcx]
Interval  8: ref RefPositions {#18@28 #30@37} physReg:NA Preferences=[rdx]
Interval  9: ref RefPositions {#22@32 #32@37} physReg:NA Preferences=[r8]
Interval 10: ref RefPositions {#26@36 #34@37} physReg:NA Preferences=[r9]

------------
REFPOSITIONS BEFORE ALLOCATION: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[allInt] minReg=1 regOptional>
<RefPosition #5   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #6   @11  RefTypeDef <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1>
<RefPosition #7   @11  RefTypeUse <Ivl:5 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #9   @18  RefTypeDef <Ivl:6> LCL_FLD BB01 regmask=[allInt] minReg=1>
<RefPosition #10  @19  RefTypeUse <Ivl:6>  BB01 regmask=[allInt] minReg=1 last>
<RefPosition #11  @23  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #13  @24  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #14  @24  RefTypeDef <Ivl:7> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #15  @27  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #17  @28  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #18  @28  RefTypeDef <Ivl:8> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed>
<RefPosition #19  @31  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #21  @32  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #22  @32  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed>
<RefPosition #23  @35  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #25  @36  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #26  @36  RefTypeDef <Ivl:10> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed>
<RefPosition #27  @37  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #28  @37  RefTypeUse <Ivl:7>  BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #29  @37  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #30  @37  RefTypeUse <Ivl:8>  BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #31  @37  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #32  @37  RefTypeUse <Ivl:9>  BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #33  @37  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #34  @37  RefTypeUse <Ivl:10>  BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #35  @38  RefTypeKill <Reg:rax>  BB01 regmask=[rax] minReg=1 last>
<RefPosition #36  @38  RefTypeKill <Reg:rcx>  BB01 regmask=[rcx] minReg=1 last>
<RefPosition #37  @38  RefTypeKill <Reg:rdx>  BB01 regmask=[rdx] minReg=1 last>
<RefPosition #38  @38  RefTypeKill <Reg:r8 >  BB01 regmask=[r8] minReg=1 last>
<RefPosition #39  @38  RefTypeKill <Reg:r9 >  BB01 regmask=[r9] minReg=1 last>
<RefPosition #40  @38  RefTypeKill <Reg:r10>  BB01 regmask=[r10] minReg=1 last>
<RefPosition #41  @38  RefTypeKill <Reg:r11>  BB01 regmask=[r11] minReg=1 last>

VAR REFPOSITIONS BEFORE ALLOCATION
--- V00  (Interval 0)
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
--- V01  (Interval 1)
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
--- V02  (Interval 2)
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
--- V03  (Interval 3)
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
--- V04
--- V05  (Interval 4)
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[allInt] minReg=1 regOptional>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V06
--- V07
--- V08
--- V09
--- V10



Allocating Registers
--------------------
The following table has one or more rows for each RefPosition that is handled during allocation.
The first column provides the basic information about the RefPosition, with its type (e.g. Def,
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the
action taken during allocation (e.g. Alloc a new register, or Keep an existing one).
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is
active, a 'p' if it is a large vector that has been partially spilled, and 'i'if it is inactive.
Columns are only printed up to the last modifed register, which may increase during allocation,
in which case additional columns will appear.  
Registers which are not marked modified have ---- in their column.

------------------------------+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |
------------------------------+----+----+----+----+----+----+----+----+----+
                              |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#0  V0   Parm   Keep  rcx  |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#1  V1   Parm   Keep  rdx  |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#2  V2   Parm   Keep  r8   |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#3  V3   Parm   Keep  r9   |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#4  V5   Parm   LoRef      |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 1.#5  BB1 PredBB0            |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
11.#6  I5   Def    Alloc rax  |I5 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
11.#7  I5   Use *  Keep  rax  |I5 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
15.#8  V5   Use *  ReLod NA   |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
                   Alloc rax  |V5 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
18.#9  I6   Def    Alloc rax  |I6 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
19.#10 I6   Use *  Keep  rax  |I6 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
23.#11 rcx  Fixd   Keep  rcx  |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
23.#12 V0   Use *  Keep  rcx  |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
24.#13 rcx  Fixd   Keep  rcx  |    |    |V1 a|    |    |    |    |V2 a|V3 a|
24.#14 I7   Def    Alloc rcx  |    |I7 a|V1 a|    |    |    |    |V2 a|V3 a|
27.#15 rdx  Fixd   Keep  rdx  |    |I7 a|V1 a|    |    |    |    |V2 a|V3 a|
27.#16 V1   Use *  Keep  rdx  |    |I7 a|V1 a|    |    |    |    |V2 a|V3 a|
28.#17 rdx  Fixd   Keep  rdx  |    |I7 a|    |    |    |    |    |V2 a|V3 a|
28.#18 I8   Def    Alloc rdx  |    |I7 a|I8 a|    |    |    |    |V2 a|V3 a|
31.#19 r8   Fixd   Keep  r8   |    |I7 a|I8 a|    |    |    |    |V2 a|V3 a|
31.#20 V2   Use *  Keep  r8   |    |I7 a|I8 a|    |    |    |    |V2 a|V3 a|
32.#21 r8   Fixd   Keep  r8   |    |I7 a|I8 a|    |    |    |    |    |V3 a|
32.#22 I9   Def    Alloc r8   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 a|
35.#23 r9   Fixd   Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 a|
35.#24 V3   Use *  Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 a|
36.#25 r9   Fixd   Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|    |
36.#26 I10  Def    Alloc r9   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#27 rcx  Fixd   Keep  rcx  |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#28 I7   Use *  Keep  rcx  |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#29 rdx  Fixd   Keep  rdx  |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#30 I8   Use *  Keep  rdx  |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#31 r8   Fixd   Keep  r8   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#32 I9   Use *  Keep  r8   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#33 r9   Fixd   Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#34 I10  Use *  Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
38.#35 rax  Kill   Keep  rax  |    |    |    |    |    |    |    |    |    |
38.#36 rcx  Kill   Keep  rcx  |    |    |    |    |    |    |    |    |    |
38.#37 rdx  Kill   Keep  rdx  |    |    |    |    |    |    |    |    |    |
38.#38 r8   Kill   Keep  r8   |    |    |    |    |    |    |    |    |    |
38.#39 r9   Kill   Keep  r9   |    |    |    |    |    |    |    |    |    |
38.#40 r10  Kill   Keep  r10  |    |    |    |    |    |    |    |    |    |
38.#41 r11  Kill   Keep  r11  |    |    |    |    |    |    |    |    |    |

------------
REFPOSITIONS AFTER ALLOCATION: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[] minReg=1 regOptional>
<RefPosition #5   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #6   @11  RefTypeDef <Ivl:5 internal> STORE_BLK BB01 regmask=[rax] minReg=1>
<RefPosition #7   @11  RefTypeUse <Ivl:5 internal> STORE_BLK BB01 regmask=[rax] minReg=1 last>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[rax] minReg=1 last reload>
<RefPosition #9   @18  RefTypeDef <Ivl:6> LCL_FLD BB01 regmask=[rax] minReg=1>
<RefPosition #10  @19  RefTypeUse <Ivl:6>  BB01 regmask=[rax] minReg=1 last>
<RefPosition #11  @23  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #13  @24  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #14  @24  RefTypeDef <Ivl:7> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #15  @27  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #17  @28  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #18  @28  RefTypeDef <Ivl:8> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed>
<RefPosition #19  @31  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #21  @32  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #22  @32  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed>
<RefPosition #23  @35  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #25  @36  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #26  @36  RefTypeDef <Ivl:10> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed>
<RefPosition #27  @37  RefTypeFixedReg <Reg:rcx>  BB01 regmask=[rcx] minReg=1>
<RefPosition #28  @37  RefTypeUse <Ivl:7>  BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #29  @37  RefTypeFixedReg <Reg:rdx>  BB01 regmask=[rdx] minReg=1>
<RefPosition #30  @37  RefTypeUse <Ivl:8>  BB01 regmask=[rdx] minReg=1 last fixed>
<RefPosition #31  @37  RefTypeFixedReg <Reg:r8 >  BB01 regmask=[r8] minReg=1>
<RefPosition #32  @37  RefTypeUse <Ivl:9>  BB01 regmask=[r8] minReg=1 last fixed>
<RefPosition #33  @37  RefTypeFixedReg <Reg:r9 >  BB01 regmask=[r9] minReg=1>
<RefPosition #34  @37  RefTypeUse <Ivl:10>  BB01 regmask=[r9] minReg=1 last fixed>
<RefPosition #35  @38  RefTypeKill <Reg:rax>  BB01 regmask=[rax] minReg=1 last>
<RefPosition #36  @38  RefTypeKill <Reg:rcx>  BB01 regmask=[rcx] minReg=1 last>
<RefPosition #37  @38  RefTypeKill <Reg:rdx>  BB01 regmask=[rdx] minReg=1 last>
<RefPosition #38  @38  RefTypeKill <Reg:r8 >  BB01 regmask=[r8] minReg=1 last>
<RefPosition #39  @38  RefTypeKill <Reg:r9 >  BB01 regmask=[r9] minReg=1 last>
<RefPosition #40  @38  RefTypeKill <Reg:r10>  BB01 regmask=[r10] minReg=1 last>
<RefPosition #41  @38  RefTypeKill <Reg:r11>  BB01 regmask=[r11] minReg=1 last>

VAR REFPOSITIONS AFTER ALLOCATION
--- V00  (Interval 0)
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #12  @23  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last fixed>
--- V01  (Interval 1)
<RefPosition #1   @0   RefTypeParamDef <Ivl:1 V01>  BB00 regmask=[rdx] minReg=1 fixed regOptional>
<RefPosition #16  @27  RefTypeUse <Ivl:1 V01> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed>
--- V02  (Interval 2)
<RefPosition #2   @0   RefTypeParamDef <Ivl:2 V02>  BB00 regmask=[r8] minReg=1 fixed regOptional>
<RefPosition #20  @31  RefTypeUse <Ivl:2 V02> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed>
--- V03  (Interval 3)
<RefPosition #3   @0   RefTypeParamDef <Ivl:3 V03>  BB00 regmask=[r9] minReg=1 fixed regOptional>
<RefPosition #24  @35  RefTypeUse <Ivl:3 V03> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed>
--- V04
--- V05  (Interval 4)
<RefPosition #4   @0   RefTypeParamDef <Ivl:4 V05>  BB00 regmask=[] minReg=1 regOptional>
<RefPosition #8   @15  RefTypeUse <Ivl:4 V05> LCL_VAR BB01 regmask=[rax] minReg=1 last reload>
--- V06
--- V07
--- V08
--- V09
--- V10

Active intervals at end of allocation:

-----------------------
RESOLVING BB BOUNDARIES
-----------------------
Resolution Candidates: {V00 V01 V02 V03 V05}
Has NoCritical Edges

Prior to Resolution

BB01
use def in out
{V00 V01 V02 V03 V04 V05 V10}
{}
{V00 V01 V02 V03 V04 V05 V10}
{}
Var=Reg beg of BB01: V00=rcx V01=rdx V02=r8 V03=r9 
Var=Reg end of BB01: none


RESOLVING EDGES

  Set V00 argument initial register to rcx
  Set V01 argument initial register to rdx
  Set V02 argument initial register to r8
  Set V03 argument initial register to r9
  Set V05 argument initial register to STK
Trees after linear scan register allocator (LSRA)

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..012) (return), preds={} succs={}
N003 (???,???) [000025] ------------                 IL_OFFSET void   IL offset: 0x6 REG NA
N005 (???,???) [000032] ------------                 START_NONGC void   REG NA
N007 (  3,  3) [000035] -c----------        t35 =    LCL_VAR_ADDR byref  V10 rat0          NA REG NA
N009 (  3,  2) [000034] -c----------        t34 =    LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3          NA (last use) REG NA
                                                  /--*  t35    byref  
                                                  +--*  t34    struct 
N011 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll) REG NA
N013 (  3,  2) [000012] -----------z        t12 =    LCL_VAR   int    V05 arg4         u:1 rax (last use) REG rax $140
                                                  /--*  t12    int    
N015 (???,???) [000026] ------------              *  PUTARG_STK [+0x20] void   REG NA
N017 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] rax (last use) REG rax $181
                                                  /--*  t13    long   
N019 (???,???) [000027] ------------              *  PUTARG_STK [+0x28] void   REG NA
N021 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 rcx (last use) REG rcx $80
                                                  /--*  t15    long   
N023 (???,???) [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
N025 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 rdx (last use) REG rdx $c0
                                                  /--*  t9     ref    
N027 (???,???) [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
N029 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 r8 (last use) REG r8 $c1
                                                  /--*  t10    ref    
N031 (???,???) [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
N033 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 r9 (last use) REG r9 $c2
                                                  /--*  t11    ref    
N035 (???,???) [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
                                                  /--*  t28    long   arg0 in rcx
                                                  +--*  t29    ref    arg1 in rdx
                                                  +--*  t30    ref    arg2 in r8
                                                  +--*  t31    ref    arg3 in r9
N037 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 REG NA $VN.Void

-------------------------------------------------------------------------------------------------------------------

Final allocation
------------------------------+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |
------------------------------+----+----+----+----+----+----+----+----+----+
 0.#0  V0   Parm   Alloc rcx  |    |V0 a|    |    |    |    |    |    |    |
 0.#1  V1   Parm   Alloc rdx  |    |V0 a|V1 a|    |    |    |    |    |    |
 0.#2  V2   Parm   Alloc r8   |    |V0 a|V1 a|    |    |    |    |V2 a|    |
 0.#3  V3   Parm   Alloc r9   |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 0.#4  V5   Parm   NoReg      |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
 1.#5  BB1 PredBB0            |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
11.#6  I5   Def    Alloc rax  |I5 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
11.#7  I5   Use *  Keep  rax  |I5 i|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
15.#8  V5   Use *  ReLod rax  |V5 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
                   Keep  rax  |V5 i|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
18.#9  I6   Def    Alloc rax  |I6 a|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
19.#10 I6   Use *  Keep  rax  |I6 i|V0 a|V1 a|    |    |    |    |V2 a|V3 a|
23.#11 rcx  Fixd   Keep  rcx  |    |V0 a|V1 a|    |    |    |    |V2 a|V3 a|
23.#12 V0   Use *  Keep  rcx  |    |V0 i|V1 a|    |    |    |    |V2 a|V3 a|
24.#13 rcx  Fixd   Keep  rcx  |    |    |V1 a|    |    |    |    |V2 a|V3 a|
24.#14 I7   Def    Alloc rcx  |    |I7 a|V1 a|    |    |    |    |V2 a|V3 a|
27.#15 rdx  Fixd   Keep  rdx  |    |I7 a|V1 a|    |    |    |    |V2 a|V3 a|
27.#16 V1   Use *  Keep  rdx  |    |I7 a|V1 i|    |    |    |    |V2 a|V3 a|
28.#17 rdx  Fixd   Keep  rdx  |    |I7 a|    |    |    |    |    |V2 a|V3 a|
28.#18 I8   Def    Alloc rdx  |    |I7 a|I8 a|    |    |    |    |V2 a|V3 a|
31.#19 r8   Fixd   Keep  r8   |    |I7 a|I8 a|    |    |    |    |V2 a|V3 a|
31.#20 V2   Use *  Keep  r8   |    |I7 a|I8 a|    |    |    |    |V2 i|V3 a|
32.#21 r8   Fixd   Keep  r8   |    |I7 a|I8 a|    |    |    |    |    |V3 a|
32.#22 I9   Def    Alloc r8   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 a|
35.#23 r9   Fixd   Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 a|
35.#24 V3   Use *  Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|V3 i|
36.#25 r9   Fixd   Keep  r9   |    |I7 a|I8 a|    |    |    |    |I9 a|    |
36.#26 I10  Def    Alloc r9   |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#27 rcx  Fixd   Keep  rcx  |    |I7 a|I8 a|    |    |    |    |I9 a|I10a|
37.#28 I7   Use *  Keep  rcx  |    |I7 i|I8 a|    |    |    |    |I9 a|I10a|
37.#29 rdx  Fixd   Keep  rdx  |    |    |I8 a|    |    |    |    |I9 a|I10a|
37.#30 I8   Use *  Keep  rdx  |    |    |I8 i|    |    |    |    |I9 a|I10a|
37.#31 r8   Fixd   Keep  r8   |    |    |    |    |    |    |    |I9 a|I10a|
37.#32 I9   Use *  Keep  r8   |    |    |    |    |    |    |    |I9 i|I10a|
37.#33 r9   Fixd   Keep  r9   |    |    |    |    |    |    |    |    |I10a|
37.#34 I10  Use *  Keep  r9   |    |    |    |    |    |    |    |    |I10i|
38.#35 rax  Kill   Keep  rax  |    |    |    |    |    |    |    |    |    |
38.#36 rcx  Kill   Keep  rcx  |    |    |    |    |    |    |    |    |    |
38.#37 rdx  Kill   Keep  rdx  |    |    |    |    |    |    |    |    |    |
38.#38 r8   Kill   Keep  r8   |    |    |    |    |    |    |    |    |    |
38.#39 r9   Kill   Keep  r9   |    |    |    |    |    |    |    |    |    |
38.#40 r10  Kill   Keep  r10  |    |    |    |    |    |    |    |    |    |
38.#41 r11  Kill   Keep  r11  |    |    |    |    |    |    |    |    |    |

Recording the maximum number of concurrent spills:

----------
LSRA Stats
----------
Total Tracked Vars:  7
Total Reg Cand Vars: 5
Total number of Intervals: 10
Total number of RefPositions: 41
Total Spill Count: 0    Weighted: 0.000000
Total CopyReg Count: 0   Weighted: 0.000000
Total ResolutionMov Count: 0    Weighted: 0.000000
Total number of split edges: 0
Total Number of spill temps created: 0

TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS
Incoming Parameters:  V00(rcx) V01(rdx) V02(r8) V03(r9) V05(STK)
BB01 [000..012) (return), preds={} succs={}
=====
  N003.                    IL_OFFSET IL offset: 0x6
  N005.                    START_NONGC
  N007.                    LCL_VAR_ADDR V10 rat0          NA
  N009.                    V04 MEM
  N011.                    STORE_BLK
  N013.                    V05(rax*)R
  N015.                    PUTARG_STK [+0x20]; rax*
  N017. rax             =  V10 MEM
  N019.                    PUTARG_STK [+0x28]; rax
  N021.                    V00(rcx*)
  N023. rcx             =  PUTARG_REG; rcx*
  N025.                    V01(rdx*)
  N027. rdx             =  PUTARG_REG; rdx*
  N029.                    V02(r8*)
  N031. r8              =  PUTARG_REG; r8*
  N033.                    V03(r9*)
  N035. r9              =  PUTARG_REG; r9*
  N037.                    CALL     ; rcx,rdx,r8,r9
Var=Reg end of BB01: none




*************** Finishing PHASE Linear scan register alloc
*************** In genGenerateCode()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..012)        (return)                     i label target jmp hascall LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Generate code
*************** In fgDebugCheckBBlist
Finalizing stack frame
Recording Var Locations at start of BB01
  V00(rcx)  V01(rdx)  V02(r8)  V03(r9)
Modified regs: [rax rcx rdx r8-r11]
Callee-saved registers pushed: 0 []
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT)
Assign V10 rat0, size=8, stkOffs=-0x18
--- delta bump 8 for RA
--- delta bump 24 for RSP frame
--- virtual stack offset to actual stack offset delta is 32
-- V00 was 0, now 32
-- V01 was 8, now 40
-- V02 was 16, now 48
-- V03 was 24, now 56
-- V04 was 32, now 64
-- V05 was 40, now 72
-- V09 was 0, now 32
-- V10 was -24, now 8
; Final local variable assignments
;
;  V00 TypeCtx      [V00,T00] (  4,  4   )    long  ->  rcx        
;  V01 arg0         [V01,T01] (  3,  3   )     ref  ->  rdx         class-hnd
;  V02 arg1         [V02,T02] (  3,  3   )     ref  ->   r8         class-hnd
;  V03 arg2         [V03,T03] (  3,  3   )     ref  ->   r9         class-hnd
;  V04 arg3         [V04,T05] (  1,  1   )  struct ( 8) [rsp+0x40]   do-not-enreg[S]
;  V05 arg4         [V05,T06] (  1,  1   )     int  ->  [rsp+0x48]  
;* V06 loc0         [V06    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;* V07 loc1         [V07    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;* V08 loc2         [V08    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;# V09 OutArgs      [V09    ] (  1,  1   )  lclBlk ( 0) [rsp+0x00]   "OutgoingArgSpace"
;  V10 rat0         [V10,T04] (  2,  4   )  struct ( 8) [rsp+0x08]   do-not-enreg[S] "Fast tail call lowering is creating a new local variable"
;
; Lcl frame size = 24
Setting stack level from -572662307 to 0

=============== Generating BB01 [000..012) (return), preds={} succs={} flags=0x00000002.20070020: i label target jmp hascall LIR 
BB01 IN (7)={V00 V01 V02 V03 V10 V04 V05} + ByrefExposed + GcHeap
     OUT(0)={                           }

Recording Var Locations at start of BB01
  V00(rcx)  V01(rdx)  V02(r8)  V03(r9)
Change life 0000000000000000 {} -> 000000000000007F {V00 V01 V02 V03 V04 V05 V10}
							V00 in reg rcx is becoming live  [------]
							Live regs: 00000000 {} => 00000002 {rcx}
							V01 in reg rdx is becoming live  [------]
							Live regs: 00000002 {rcx} => 00000006 {rcx rdx}
							V02 in reg r8 is becoming live  [------]
							Live regs: 00000006 {rcx rdx} => 00000106 {rcx rdx r8}
							V03 in reg r9 is becoming live  [------]
							Live regs: 00000106 {rcx rdx r8} => 00000306 {rcx rdx r8 r9}
							Live regs: (unchanged) 00000306 {rcx rdx r8 r9}
							GC regs: (unchanged) 00000304 {rdx r8 r9}
							Byref regs: (unchanged) 00000000 {}

      L_M10520_BB01:
Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}

Scope info: begin block BB01, IL range [000..012)
Scope info: open scopes =
   0 (V00 TypeCtx) [000..012)
   1 (V01 arg0) [000..012)
   2 (V02 arg1) [000..012)
   3 (V03 arg2) [000..012)
   4 (V04 arg3) [000..012)
   5 (V05 arg4) [000..012)
Added IP mapping: 0x0006 STACK_EMPTY (G_M10520_IG02,ins#0,ofs#0) label
Generating: N003 (???,???) [000025] ------------                 IL_OFFSET void   IL offset: 0x6 REG NA
Generating: N005 (???,???) [000032] ------------                 START_NONGC void   REG NA
Generating: N007 (  3,  3) [000035] -c----------        t35 =    LCL_VAR_ADDR byref  V10 rat0          NA REG NA
Generating: N009 (  3,  2) [000034] -c----------        t34 =    LCL_VAR   struct<System.Nullable`1[Int32], 8> V04 arg3          NA (last use) REG NA
                                                              /--*  t35    byref  
                                                              +--*  t34    struct 
Generating: N011 (  7,  6) [000036] -A----------              *  STORE_BLK struct<8> (copy) (Unroll) REG NA
IN0001:        mov      rax, qword ptr [V04 rsp+40H]
IN0002:        mov      qword ptr [V10 rsp+08H], rax
Generating: N013 (  3,  2) [000012] -----------z        t12 =    LCL_VAR   int    V05 arg4         u:1 rax (last use) REG rax $140
                                                              /--*  t12    int    
Generating: N015 (???,???) [000026] ------------              *  PUTARG_STK [+0x20] void   REG NA
IN0003:        mov      eax, dword ptr [V05 rsp+48H]
							V05 in reg rax is becoming live  [000012]
							Live regs: 00000306 {rcx rdx r8 r9} => 00000307 {rax rcx rdx r8 r9}
							V05 in reg rax is becoming dead  [000012]
							Live regs: 00000307 {rax rcx rdx r8 r9} => 00000306 {rcx rdx r8 r9}
							Live vars: {V00 V01 V02 V03 V04 V05 V10} => {V00 V01 V02 V03 V04 V10}
IN0004:        mov      dword ptr [V00+0x20 rsp+40H], eax
Generating: N017 (  3,  4) [000013] ------------        t13 =    LCL_FLD   long   V10 rat0         [+0] rax (last use) REG rax $181
IN0005:        mov      rax, qword ptr [V10 rsp+08H]
							Live vars: {V00 V01 V02 V03 V04 V10} => {V00 V01 V02 V03 V04}
                                                              /--*  t13    long   
Generating: N019 (???,???) [000027] ------------              *  PUTARG_STK [+0x28] void   REG NA
IN0006:        mov      qword ptr [V00+0x28 rsp+48H], rax
Generating: N021 (  1,  1) [000015] !-----------        t15 =    LCL_VAR   long   V00 TypeCtx      u:1 rcx (last use) REG rcx $80
                                                              /--*  t15    long   
Generating: N023 (???,???) [000028] ------------        t28 = *  PUTARG_REG long   REG rcx
							V00 in reg rcx is becoming dead  [000015]
							Live regs: 00000306 {rcx rdx r8 r9} => 00000304 {rdx r8 r9}
							Live vars: {V00 V01 V02 V03 V04} => {V01 V02 V03 V04}
Generating: N025 (  1,  1) [000009] ------------         t9 =    LCL_VAR   ref    V01 arg0         u:1 rdx (last use) REG rdx $c0
                                                              /--*  t9     ref    
Generating: N027 (???,???) [000029] ------------        t29 = *  PUTARG_REG ref    REG rdx
							V01 in reg rdx is becoming dead  [000009]
							Live regs: 00000304 {rdx r8 r9} => 00000300 {r8 r9}
							Live vars: {V01 V02 V03 V04} => {V02 V03 V04}
							GC regs: 00000304 {rdx r8 r9} => 00000300 {r8 r9}
							GC regs: 00000300 {r8 r9} => 00000304 {rdx r8 r9}
Generating: N029 (  1,  1) [000010] ------------        t10 =    LCL_VAR   ref    V02 arg1         u:1 r8 (last use) REG r8 $c1
                                                              /--*  t10    ref    
Generating: N031 (???,???) [000030] ------------        t30 = *  PUTARG_REG ref    REG r8
							V02 in reg r8 is becoming dead  [000010]
							Live regs: 00000300 {r8 r9} => 00000200 {r9}
							Live vars: {V02 V03 V04} => {V03 V04}
							GC regs: 00000304 {rdx r8 r9} => 00000204 {rdx r9}
							GC regs: 00000204 {rdx r9} => 00000304 {rdx r8 r9}
Generating: N033 (  1,  1) [000011] ------------        t11 =    LCL_VAR   ref    V03 arg2         u:1 r9 (last use) REG r9 $c2
                                                              /--*  t11    ref    
Generating: N035 (???,???) [000031] ------------        t31 = *  PUTARG_REG ref    REG r9
							V03 in reg r9 is becoming dead  [000011]
							Live regs: 00000200 {r9} => 00000000 {}
							Live vars: {V03 V04} => {V04}
							GC regs: 00000304 {rdx r8 r9} => 00000104 {rdx r8}
							GC regs: 00000104 {rdx r8} => 00000304 {rdx r8 r9}
                                                              /--*  t28    long   arg0 in rcx
                                                              +--*  t29    ref    arg1 in rdx
                                                              +--*  t30    ref    arg2 in r8
                                                              +--*  t31    ref    arg3 in r9
Generating: N037 ( 30, 19) [000014] --CXG-------              *  CALL      void   Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps.consume@307 REG NA $VN.Void
							GC regs: 00000304 {rdx r8 r9} => 00000300 {r8 r9}
							GC regs: 00000300 {r8 r9} => 00000200 {r9}
							GC regs: 00000200 {r9} => 00000000 {}

Scope info: end block BB01, IL range [000..012)
Scope info: ending scope, LVnum=0 [000..012)
Scope info: ending scope, LVnum=7 [000..012)
siEndScope: Failed to end scope for V07
Scope info: ending scope, LVnum=6 [000..012)
siEndScope: Failed to end scope for V06
Scope info: ending scope, LVnum=5 [000..012)
Scope info: ending scope, LVnum=4 [000..012)
Scope info: ending scope, LVnum=3 [000..012)
Scope info: ending scope, LVnum=2 [000..012)
Scope info: ending scope, LVnum=1 [000..012)
Scope info: ending scope, LVnum=8 [000..012)
siEndScope: Failed to end scope for V08
Scope info: open scopes =
   <none>
Added IP mapping: EPILOG STACK_EMPTY (G_M10520_IG02,ins#6,ofs#28) label
Reserving epilog IG for block BB01

      G_M10520_IG02:        ; offs=000000H, funclet=00, bbWeight=1   
*************** After placeholder IG creation
G_M10520_IG01:        ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M10520_IG02:        ; offs=000000H, size=001CH, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}, byref, nogc
G_M10520_IG03:        ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, nogc, extend <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000304 {rdx r8 r9}, InitByrefRegs=00000000 {}
Change life 0000000000000020 {V04} -> 0000000000000000 {}

# compCycleEstimate =     30, compSizeEstimate =    19 Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
; Final local variable assignments
;
;  V00 TypeCtx      [V00,T00] (  4,  4   )    long  ->  rcx        
;  V01 arg0         [V01,T01] (  3,  3   )     ref  ->  rdx         class-hnd
;  V02 arg1         [V02,T02] (  3,  3   )     ref  ->   r8         class-hnd
;  V03 arg2         [V03,T03] (  3,  3   )     ref  ->   r9         class-hnd
;  V04 arg3         [V04,T05] (  1,  1   )  struct ( 8) [rsp+0x40]   do-not-enreg[S]
;  V05 arg4         [V05,T06] (  1,  1   )     int  ->  [rsp+0x48]  
;* V06 loc0         [V06    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;* V07 loc1         [V07    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;* V08 loc2         [V08    ] (  0,  0   )     ref  ->  zero-ref    class-hnd
;# V09 OutArgs      [V09    ] (  1,  1   )  lclBlk ( 0) [rsp+0x00]   "OutgoingArgSpace"
;  V10 rat0         [V10,T04] (  2,  4   )  struct ( 8) [rsp+0x08]   do-not-enreg[S] "Fast tail call lowering is creating a new local variable"
;
; Lcl frame size = 24
*************** Before prolog / epilog generation
G_M10520_IG01:        ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M10520_IG02:        ; offs=000000H, size=001CH, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}, byref, nogc
G_M10520_IG03:        ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, nogc, extend <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000304 {rdx r8 r9}, InitByrefRegs=00000000 {}
Recording Var Locations at start of BB01
  V00(rcx)  V01(rdx)  V02(r8)  V03(r9)  V05(rax->STK)
*************** In genFnProlog()
Added IP mapping to front: PROLOG STACK_EMPTY (G_M10520_IG01,ins#0,ofs#0) label

__prolog:
IN0007:        sub      rsp, 24
IN0008:        mov      qword ptr [rsp+10H], rcx
*************** In genFnPrologCalleeRegArgs() for int regs
*************** In genEnregisterIncomingStackArgs()


      G_M10520_IG01:        ; offs=000000H, funclet=00, bbWeight=1   
*************** In genFnEpilog()

__epilog:
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000304 {rdx r8 r9}, gcRegByrefSetCur=00000000 {}
IN0009:        add      rsp, 24
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN000a:        jmp      Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307()

      G_M10520_IG03:        ; offs=00001CH, funclet=00, bbWeight=1   
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs
*************** After prolog / epilog generation
G_M10520_IG01:        ; func=00, offs=000000H, size=0009H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M10520_IG02:        ; offs=000009H, size=001CH, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}, byref, nogc
G_M10520_IG03:        ; offs=000025H, size=0009H, epilog, nogc, extend
*************** In emitJumpDistBind()

*************** Finishing PHASE Generate code

*************** Starting PHASE Emit code

Hot  code size = 0x2E bytes
Cold code size = 0x0 bytes
reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x6)
*************** In emitEndCodeGen()
Converting emitMaxStackDepth from bytes (0) to elements (0)

***************************************************************************
Instructions as they come out of the scheduler


G_M10520_IG01:        ; func=00, offs=000000H, size=0009H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN0007: 000000 sub      rsp, 24
IN0008: 000004 mov      qword ptr [rsp+10H], rcx
						;; bbWeight=1    PerfScore 1.25
G_M10520_IG02:        ; func=00, offs=000009H, size=001CH, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}, byref, nogc
       ; gcrRegs +[rdx r8-r9]
IN0001: 000009 mov      rax, qword ptr [rsp+40H]
IN0002: 00000E mov      qword ptr [rsp+08H], rax
IN0003: 000013 mov      eax, dword ptr [rsp+48H]
IN0004: 000017 mov      dword ptr [rsp+40H], eax
IN0005: 00001B mov      rax, qword ptr [rsp+08H]
IN0006: 000020 mov      qword ptr [rsp+48H], rax
						;; bbWeight=1    PerfScore 6.00
G_M10520_IG03:        ; func=00, offs=000025H, size=0009H, epilog, nogc, extend
IN0009: 000025 add      rsp, 24
IN000a: 000029 jmp      Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307()
       ; gcr arg pop 0
						;; bbWeight=1    PerfScore 2.25Allocated method code size =   46 , actual size =   46, unused size =    0

; Total bytes of code 46, prolog size 9, PerfScore 14.10, instruction count 10, allocated bytes for code 46 (MethodHash=c105d6e7) for method Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
; ============================================================

*************** After end code gen, before unwindEmit()
G_M10520_IG01:        ; func=00, offs=000000H, size=0009H, bbWeight=1    PerfScore 1.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG

IN0007: 000000 sub      rsp, 24
IN0008: 000004 mov      qword ptr [rsp+10H], rcx

G_M10520_IG02:        ; offs=000009H, size=001CH, bbWeight=1    PerfScore 6.00, gcrefRegs=00000304 {rdx r8 r9}, byrefRegs=00000000 {}, byref, nogc

IN0001: 000009 mov      rax, qword ptr [V04 rsp+40H]
IN0002: 00000E mov      qword ptr [V10 rsp+08H], rax
IN0003: 000013 mov      eax, dword ptr [V05 rsp+48H]
IN0004: 000017 mov      dword ptr [V00+0x20 rsp+40H], eax
IN0005: 00001B mov      rax, qword ptr [V10 rsp+08H]
IN0006: 000020 mov      qword ptr [V00+0x28 rsp+48H], rax

G_M10520_IG03:        ; offs=000025H, size=0009H, bbWeight=1    PerfScore 2.25, epilog, nogc, extend

IN0009: 000025 add      rsp, 24
IN000a: 000029 jmp      Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:consume@307()


*************** Finishing PHASE Emit code

*************** Starting PHASE Emit GC+EH tables
Unwind Info:
  >> Start offset   : 0x000000 (not in unwind data)
  >>   End offset   : 0xd1ffab1e (not in unwind data)
  Version           : 1
  Flags             : 0x00
  SizeOfProlog      : 0x04
  CountOfUnwindCodes: 1
  FrameRegister     : none (0)
  FrameOffset       : N/A (no FrameRegister) (Value=0)
  UnwindCodes       :
    CodeOffset: 0x04 UnwindOp: UWOP_ALLOC_SMALL (2)     OpInfo: 2 * 8 + 8 = 24 = 0x18
allocUnwindInfo(pHotCode=0x00000000D1FFAB1E, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0x2e, unwindSize=0x6, pUnwindBlock=0x00000000D1FFAB1E, funKind=0 (main function))
*************** In genIPmappingGen()
IP mapping count : 3
IL offs PROLOG : 0x00000000 ( STACK_EMPTY )
IL offs 0x0006 : 0x00000009 ( STACK_EMPTY )
IL offs EPILOG : 0x00000025 ( STACK_EMPTY )

*************** In genSetScopeInfo()
VarLocInfo count is 12
; Variable debug info: 12 live range(s), 5 var(s) for method Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
 -3(   typeCtx) : From 00000000h to 00000009h, in rcx
  4(   UNKNOWN) : From 00000000h to 00000009h, in rsp[48] (1 slot)
  3(   UNKNOWN) : From 00000000h to 00000009h, in rsp[40] (1 slot)
  2(   UNKNOWN) : From 00000000h to 00000009h, in r9
  1(   UNKNOWN) : From 00000000h to 00000009h, in r8
  0(   UNKNOWN) : From 00000000h to 00000009h, in rdx
  4(   UNKNOWN) : From 00000009h to 00000017h, in rsp'[72] (1 slot)
 -3(   typeCtx) : From 00000009h to 00000025h, in rcx
  0(   UNKNOWN) : From 00000009h to 00000025h, in rdx
  1(   UNKNOWN) : From 00000009h to 00000025h, in r8
  2(   UNKNOWN) : From 00000009h to 00000025h, in r9
  3(   UNKNOWN) : From 00000009h to 00000025h, in rsp'[64] (1 slot)
*************** In gcInfoBlockHdrSave()
Set code length to 46.
Set ReturnKind to Object.
Set generic instantiation context stack slot to -16, type is MD.
Set prolog size 0x9.
Set Outgoing stack arg area size to 0.
Register slot id for reg rdx = 0.
Register slot id for reg r8 = 1.
Register slot id for reg r9 = 2.
Set state of slot 0 at instr offset 0x9 to Live.
Set state of slot 1 at instr offset 0x9 to Live.
Set state of slot 2 at instr offset 0x9 to Live.
Set state of slot 0 at instr offset 0x2e to Dead.
Set state of slot 1 at instr offset 0x2e to Dead.
Set state of slot 2 at instr offset 0x2e to Dead.

*************** Finishing PHASE Emit GC+EH tables
Method code size: 46

Allocations for Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]] (MethodHash=c105d6e7)
count:        456, size:      51468, max =       3072
allocateMemory:      65536, nraUsed:      54064

Alloc'd bytes by kind:
                  kind |       size |     pct
  ---------------------+------------+--------
         AssertionProp |       6460 |  12.55%
               ASTNode |       4608 |   8.95%
              InstDesc |       2432 |   4.73%
              ImpStack |        384 |   0.75%
            BasicBlock |        848 |   1.65%
             fgArgInfo |        384 |   0.75%
       fgArgInfoPtrArr |        168 |   0.33%
              FlowList |          0 |   0.00%
     TreeStatementList |          0 |   0.00%
               SiScope |        872 |   1.69%
       DominatorMemory |         96 |   0.19%
                  LSRA |       3296 |   6.40%
         LSRA_Interval |        880 |   1.71%
      LSRA_RefPosition |       2688 |   5.22%
          Reachability |         16 |   0.03%
                   SSA |        848 |   1.65%
           ValueNumber |       6282 |  12.21%
              LvaTable |       2244 |   4.36%
            UnwindInfo |          0 |   0.00%
                hashBv |         40 |   0.08%
                bitset |         56 |   0.11%
          FixedBitVect |          8 |   0.02%
               Generic |       1558 |   3.03%
   LocalAddressVisitor |        512 |   0.99%
         FieldSeqStore |          0 |   0.00%
    ZeroOffsetFieldMap |         40 |   0.08%
          ArrayInfoMap |         40 |   0.08%
          MemoryPhiArg |          0 |   0.00%
                   CSE |       1136 |   2.21%
                    GC |       2388 |   4.64%
       CorTailCallInfo |          0 |   0.00%
              Inlining |        584 |   1.13%
            ArrayStack |          0 |   0.00%
             DebugInfo |        456 |   0.89%
             DebugOnly |       9943 |  19.32%
               Codegen |       1176 |   2.28%
               LoopOpt |          0 |   0.00%
             LoopHoist |          0 |   0.00%
               Unknown |        113 |   0.22%
            RangeCheck |          0 |   0.00%
              CopyProp |        632 |   1.23%
           SideEffects |          0 |   0.00%
       ObjectAllocator |          0 |   0.00%
    VariableLiveRanges |          0 |   0.00%
           ClassLayout |        112 |   0.22%
       TailMergeThrows |          0 |   0.00%
             EarlyProp |          0 |   0.00%
              ZeroInit |        168 |   0.33%
                   Pgo |          0 |   0.00%

****** DONE compiling Microsoft.FSharp.Text.StructuredPrintfImpl.LayoutOps:boundedUnfoldL(Microsoft.FSharp.Core.FSharpFunc`2[__Canon,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,__Canon],Microsoft.FSharp.Core.FSharpFunc`2[Nullable`1,Boolean],System.Nullable`1[Int32],int):Microsoft.FSharp.Collections.FSharpList`1[[Microsoft.FSharp.Text.StructuredPrintfImpl.Layout, FSharp.Core, Version=5.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a]]
Using jit(D:\Sergey\git\runtime\artifacts\tests\coreclr\windows.x64.Checked\Tests\Core_Root_diff\clrjit.dll) with input (D:\Sergey\git\runtime\artifacts\spmi\mch\73d20c3a-75a9-4eea-a952-60419d67b6a6.windows.x64\libraries.pmi.windows.x64.checked.mch)
 indexCount=1 (7338)
Jit startup took 5.515100ms
Loaded 1  Jitted 1  FailedCompile 0 Excluded 0
Total time: 104.060100ms