****** START compiling System.Numerics.Quaternion:get_IsIdentity():bool:this (MethodHash=46a9358e)
Generating code for Windows x64
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC  = false
OPTIONS: compProcedureSplitting   = false
OPTIONS: compProcedureSplittingEH = false
OPTIONS: Jit invoked for ngen
IL to import:
IL_0000  02                ldarg.0     
IL_0001  71 d7 01 00 02    ldobj        0x20001D7
IL_0006  28 d1 1c 00 06    call         0x6001CD1
IL_000b  28 d5 1c 00 06    call         0x6001CD5
IL_0010  2a                ret         
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
'this'    passed in register rcx

lvaGrabTemp returning 1 (V01 tmp0) (a long lifetime temp) called for OutgoingArgSpace.
; Initial local variable assignments
;
;  V00 this            byref  this
;  V01 OutArgs        lclBlk <na>  "OutgoingArgSpace"
*************** In compInitDebuggingInfo() for System.Numerics.Quaternion:get_IsIdentity():bool:this
getVars() returned cVars = 0, extendOthers = true
info.compVarScopesCount = 1
    	VarNum 	LVNum 	      Name 	Beg 	End
 0: 	00h 	00h 	  V00 this 	000h   	011h
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0007h ( STACK_EMPTY NOP CALL_SITE )
*************** In fgFindBasicBlocks() for System.Numerics.Quaternion:get_IsIdentity():bool:this
weight= 10 : state   3 [ ldarg.0 ]
weight= 29 : state 101 [ ldobj ]
weight= 79 : state  40 [ call ]
weight= 79 : state  40 [ call ]
weight= 19 : state  42 [ ret ]
Jump targets:
  none
New Basic Block BB01 [0000] created.
BB01 [000..011)

multiplier in methods of promotable struct increased to 3.
Inline candidate looks like a wrapper method.  Multiplier increased to 4.
Inline candidate callsite is hot.  Multiplier increased to 7.
calleeNativeSizeEstimate=216
callsiteNativeSizeEstimate=85
benefit multiplier=7
threshold=595
Native estimate for function size is within threshold for inlining 21.6 <= 59.5 (multiplier = 7)
IL Code Size,Instr   17,   5, Basic Block count   1, Local Variable Num,Ref count   2,  1 for method System.Numerics.Quaternion:get_IsIdentity():bool:this
OPTIONS: opts.MinOpts() == false
Basic block list for 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Pre-import

*************** Finishing PHASE Pre-import

*************** Starting PHASE Profile incorporation
BBOPT not set

*************** Finishing PHASE Profile incorporation [no changes]

*************** Starting PHASE Importation
*************** In impImport() for System.Numerics.Quaternion:get_IsIdentity():bool:this

impImportBlockPending for BB01

Importing BB01 (PC=000) of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'
    [ 0]   0 (0x000) ldarg.0
    [ 1]   1 (0x001) ldobj 020001D7SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type

    [ 1]   6 (0x006) call 06001CD1
In Compiler::impImportCall: opcode is call, kind=0, callRetType is struct, structSize is 16

lvaGrabTemp returning 2 (V02 tmp1) called for impAppendStmt.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type


STMT00001 (IL 0x000...  ???)
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         


STMT00000 (IL 0x000...  ???)
               [000002] I-C-G-------              *  CALL r2r_ind struct System.Numerics.Quaternion.get_Identity (exactContextHnd=0x00000000D1FFAB1E)

    [ 2]  11 (0x00b) call 06001CD5 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT)
In Compiler::impImportCall: opcode is call, kind=0, callRetType is bool, structSize is 0
Calling impNormStructVal on:
               [000007] --C---------              *  RET_EXPR  struct(inl return from call [000002])
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type

lvaGrabTemp returning 3 (V03 tmp2) called for struct address for call/obj.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type


STMT00002 (IL   ???...  ???)
               [000007] --C---------              *  RET_EXPR  void  (inl return from call [000002])
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
resulting tree:
               [000013] n-----------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------              \--*  ADDR      byref 
               [000011] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
Calling impNormStructVal on:
               [000006] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
resulting tree:
               [000015] n-----------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------              \--*  ADDR      byref 
               [000006] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

info.compCompHnd->canTailCall returned false for call [000008]


STMT00003 (IL   ???...  ???)
               [000008] I-C-G-------              *  CALL r2r_ind int    System.Numerics.Quaternion.op_Equality (exactContextHnd=0x00000000D1FFAB1E)
               [000015] n----------- arg0         +--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------              |  \--*  ADDR      byref 
               [000006] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000013] n----------- arg1         \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

    [ 1]  16 (0x010) ret

STMT00004 (IL   ???...  ???)
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000016] --C---------                 \--*  RET_EXPR  int   (inl return from call [000008])

*************** Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) (return), preds={} succs={}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00000 (IL 0x000...  ???)
               [000002] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion.get_Identity (exactContextHnd=0x00000000D1FFAB1E)
               [000010] ------------ arg0         \--*  ADDR      byref 
               [000009] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

***** BB01
STMT00002 (IL   ???...  ???)
               [000007] --C---------              *  RET_EXPR  void  (inl return from call [000002])

***** BB01
STMT00003 (IL   ???...  ???)
               [000008] I-C-G-------              *  CALL r2r_ind int    System.Numerics.Quaternion.op_Equality (exactContextHnd=0x00000000D1FFAB1E)
               [000015] n----------- arg0         +--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------              |  \--*  ADDR      byref 
               [000006] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000013] n----------- arg1         \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

***** BB01
STMT00004 (IL   ???...  ???)
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000016] --C---------                 \--*  RET_EXPR  int   (inl return from call [000008])

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Finishing PHASE Indirect call transform [no changes]

*************** Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Finishing PHASE Expand patchpoints [no changes]

*************** Starting PHASE Post-import

*************** Finishing PHASE Post-import

*************** Starting PHASE Morph - Init

New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short)

*************** In fgRemoveEmptyBlocks

*************** Finishing PHASE Morph - Init
*************** In fgDebugCheckBBlist

*************** Starting PHASE Morph - Inlining
Expanding INLINE_CANDIDATE in statement STMT00000 in BB01:
STMT00000 (IL 0x000...  ???)
               [000002] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion.get_Identity (exactContextHnd=0x00000000D1FFAB1E)
               [000010] ------------ arg0         \--*  ADDR      byref 
               [000009] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
INLINER: inlineInfo.tokenLookupContextHandle for System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion set to 0x00000000D1FFAB1E:

Invoking compiler for the inlinee method System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion :
IL to import:
IL_0000  22 00 00 00 00    ldc.r4       0.000000
IL_0005  22 00 00 00 00    ldc.r4       0.000000
IL_000a  22 00 00 00 00    ldc.r4       0.000000
IL_000f  22 00 00 80 3f    ldc.r4       1.000000
IL_0014  73 cf 1c 00 06    newobj       0x6001CCF
IL_0019  2a                ret         

INLINER impTokenLookupContextHandle for System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion is 0x00000000D1FFAB1E.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
*************** In fgFindBasicBlocks() for System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion
weight= 33 : state  35 [ ldc.r4 ]
weight= 33 : state  35 [ ldc.r4 ]
weight= 33 : state  35 [ ldc.r4 ]
weight= 33 : state  35 [ ldc.r4 ]
weight=227 : state 103 [ newobj ]
weight= 19 : state  42 [ ret ]

multiplier in methods of promotable struct increased to 3.
Inline candidate has SIMD type args, locals or return value.  Multiplier increased to 6.
Inline candidate is mostly loads and stores.  Multiplier increased to 9.
Inline candidate callsite is boring.  Multiplier increased to 10.3.
calleeNativeSizeEstimate=378
callsiteNativeSizeEstimate=55
benefit multiplier=10.3
threshold=566
Native estimate for function size is within threshold for inlining 37.8 <= 56.6 (multiplier = 10.3)
Jump targets:
  none
New Basic Block BB02 [0001] created.
BB02 [000..01A)
Basic block list for 'System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..01A)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000002] Starting PHASE Pre-import

*************** Inline @[000002] Finishing PHASE Pre-import

*************** Inline @[000002] Starting PHASE Profile incorporation
BBOPT not set

*************** Inline @[000002] Finishing PHASE Profile incorporation [no changes]

*************** Inline @[000002] Starting PHASE Importation
*************** In impImport() for System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion

impImportBlockPending for BB02

Importing BB02 (PC=000) of 'System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion'
    [ 0]   0 (0x000) ldc.r4 0.00000000000000000
    [ 1]   5 (0x005) ldc.r4 0.00000000000000000
    [ 2]  10 (0x00a) ldc.r4 0.00000000000000000
    [ 3]  15 (0x00f) ldc.r4 1.0000000000000000
    [ 4]  20 (0x014) newobj
lvaGrabTemp returning 4 (V04 tmp3) called for NewObj constructor temp.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type


               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000024] ------------              \--*  CNS_INT   int    0
 06001CCF
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0


               [000028] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion..ctor (exactContextHnd=0x00000000D1FFAB1E)
               [000027] ------------ this in rcx  +--*  ADDR      byref 
               [000026] -------N----              |  \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000019] ------------ arg1         +--*  CNS_DBL   float  0.00000000000000000
               [000020] ------------ arg2         +--*  CNS_DBL   float  0.00000000000000000
               [000021] ------------ arg3         +--*  CNS_DBL   float  0.00000000000000000
               [000022] ------------ arg4         \--*  CNS_DBL   float  1.0000000000000000

    [ 1]  25 (0x019) ret

    Inlinee Return expression (before normalization)  =>
               [000029] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         

*************** Inline @[000002] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..01A)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB02 [000..01A) (return), preds={} succs={}

***** BB02
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000024] ------------              \--*  CNS_INT   int    0

***** BB02
               [000028] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion..ctor (exactContextHnd=0x00000000D1FFAB1E)
               [000027] ------------ this in rcx  +--*  ADDR      byref 
               [000026] -------N----              |  \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000019] ------------ arg1         +--*  CNS_DBL   float  0.00000000000000000
               [000020] ------------ arg2         +--*  CNS_DBL   float  0.00000000000000000
               [000021] ------------ arg3         +--*  CNS_DBL   float  0.00000000000000000
               [000022] ------------ arg4         \--*  CNS_DBL   float  1.0000000000000000

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000002] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000002] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000002] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000002] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000002] Starting PHASE Post-import

*************** In fgRemoveEmptyBlocks

*************** Inline @[000002] Finishing PHASE Post-import


----------- Statements (and blocks) added due to the inlining of call [000002] -----------

Inlinee method body:
STMT00005 (IL 0x000...  ???)
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000024] ------------              \--*  CNS_INT   int    0


STMT00006 (IL 0x000...  ???)
               [000028] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion..ctor (exactContextHnd=0x00000000D1FFAB1E)
               [000027] ------------ this in rcx  +--*  ADDR      byref 
               [000026] -------N----              |  \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000019] ------------ arg1         +--*  CNS_DBL   float  0.00000000000000000
               [000020] ------------ arg2         +--*  CNS_DBL   float  0.00000000000000000
               [000021] ------------ arg3         +--*  CNS_DBL   float  0.00000000000000000
               [000022] ------------ arg4         \--*  CNS_DBL   float  1.0000000000000000

fgInlineAppendStatements: no gc ref inline locals.

Return expression for call at [000002] is
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
Successfully inlined System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion (26 IL bytes) (depth 1) [profitable inline]
--------------------------------------------------------------------------------------------

INLINER: during 'fgInline' result 'success' reason 'profitable inline' for 'System.Numerics.Quaternion:get_IsIdentity():bool:this' calling 'System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion'
INLINER: during 'fgInline' result 'success' reason 'profitable inline'
Expanding INLINE_CANDIDATE in statement STMT00006 in BB01:
STMT00006 (IL 0x000...  ???)
               [000028] I-C-G-------              *  CALL r2r_ind void   System.Numerics.Quaternion..ctor (exactContextHnd=0x00000000D1FFAB1E)
               [000027] ------------ this in rcx  +--*  ADDR      byref 
               [000026] -------N----              |  \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000019] ------------ arg1         +--*  CNS_DBL   float  0.00000000000000000
               [000020] ------------ arg2         +--*  CNS_DBL   float  0.00000000000000000
               [000021] ------------ arg3         +--*  CNS_DBL   float  0.00000000000000000
               [000022] ------------ arg4         \--*  CNS_DBL   float  1.0000000000000000
thisArg: is a constant is byref to a struct local
               [000027] ------------              *  ADDR      byref 
               [000026] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         


Argument #1: is a constant
               [000019] ------------              *  CNS_DBL   float  0.00000000000000000


Argument #2: is a constant
               [000020] ------------              *  CNS_DBL   float  0.00000000000000000


Argument #3: is a constant
               [000021] ------------              *  CNS_DBL   float  0.00000000000000000


Argument #4: is a constant
               [000022] ------------              *  CNS_DBL   float  1.0000000000000000

INLINER: inlineInfo.tokenLookupContextHandle for System.Numerics.Quaternion:.ctor(float,float,float,float):this set to 0x00000000D1FFAB1E:

Invoking compiler for the inlinee method System.Numerics.Quaternion:.ctor(float,float,float,float):this :
IL to import:
IL_0000  02                ldarg.0     
IL_0001  03                ldarg.1     
IL_0002  7d 45 06 00 04    stfld        0x4000645
IL_0007  02                ldarg.0     
IL_0008  04                ldarg.2     
IL_0009  7d 46 06 00 04    stfld        0x4000646
IL_000e  02                ldarg.0     
IL_000f  05                ldarg.3     
IL_0010  7d 47 06 00 04    stfld        0x4000647
IL_0015  02                ldarg.0     
IL_0016  0e 04             ldarg.s      0x4
IL_0018  7d 48 06 00 04    stfld        0x4000648
IL_001d  2a                ret         

INLINER impTokenLookupContextHandle for System.Numerics.Quaternion:.ctor(float,float,float,float):this is 0x00000000D1FFAB1E.
*************** In fgFindBasicBlocks() for System.Numerics.Quaternion:.ctor(float,float,float,float):this
weight= 69 : state 226 [ ldarg.0 -> ldarg.1 -> stfld ]
weight= 98 : state 228 [ ldarg.0 -> ldarg.2 -> stfld ]
weight= 97 : state 230 [ ldarg.0 -> ldarg.3 -> stfld ]
weight= 10 : state   3 [ ldarg.0 ]
weight= 32 : state  15 [ ldarg.s ]
weight= 31 : state 111 [ stfld ]
weight= 19 : state  42 [ ret ]

multiplier in instance constructors increased to 1.5.
multiplier in methods of promotable struct increased to 4.5.
Inline candidate has SIMD type args, locals or return value.  Multiplier increased to 7.5.
Inline candidate is mostly loads and stores.  Multiplier increased to 10.5.
Inline candidate callsite is boring.  Multiplier increased to 11.8.
calleeNativeSizeEstimate=356
callsiteNativeSizeEstimate=205
benefit multiplier=11.8
threshold=2419
Native estimate for function size is within threshold for inlining 35.6 <= 241.9 (multiplier = 11.8)
Jump targets:
  none
New Basic Block BB03 [0002] created.
BB03 [000..01E)
Basic block list for 'System.Numerics.Quaternion:.ctor(float,float,float,float):this'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..01E)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000028] Starting PHASE Pre-import

*************** Inline @[000028] Finishing PHASE Pre-import

*************** Inline @[000028] Starting PHASE Profile incorporation
BBOPT not set

*************** Inline @[000028] Finishing PHASE Profile incorporation [no changes]

*************** Inline @[000028] Starting PHASE Importation
*************** In impImport() for System.Numerics.Quaternion:.ctor(float,float,float,float):this

impImportBlockPending for BB03

Importing BB03 (PC=000) of 'System.Numerics.Quaternion:.ctor(float,float,float,float):this'
    [ 0]   0 (0x000) ldarg.0
    [ 1]   1 (0x001) ldarg.1
    [ 2]   2 (0x002) stfld 04000645

               [000038] -A----------              *  ASG       float 
               [000037] -------N----              +--*  FIELD     float  X
               [000034] ------------              |  \--*  ADDR      byref 
               [000035] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

    [ 0]   7 (0x007) ldarg.0
    [ 1]   8 (0x008) ldarg.2
    [ 2]   9 (0x009) stfld 04000646

               [000043] -A----------              *  ASG       float 
               [000042] -------N----              +--*  FIELD     float  Y
               [000039] ------------              |  \--*  ADDR      byref 
               [000040] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

    [ 0]  14 (0x00e) ldarg.0
    [ 1]  15 (0x00f) ldarg.3
    [ 2]  16 (0x010) stfld 04000647

               [000048] -A----------              *  ASG       float 
               [000047] -------N----              +--*  FIELD     float  Z
               [000044] ------------              |  \--*  ADDR      byref 
               [000045] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

    [ 0]  21 (0x015) ldarg.0
    [ 1]  22 (0x016) ldarg.s 4
    [ 2]  24 (0x018) stfld 04000648

               [000053] -A----------              *  ASG       float 
               [000052] -------N----              +--*  FIELD     float  W
               [000049] ------------              |  \--*  ADDR      byref 
               [000050] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

    [ 0]  29 (0x01d) ret
*************** Inline @[000028] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..01E)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB03 [000..01E) (return), preds={} succs={}

***** BB03
               [000038] -A----------              *  ASG       float 
               [000037] -------N----              +--*  FIELD     float  X
               [000034] ------------              |  \--*  ADDR      byref 
               [000035] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB03
               [000043] -A----------              *  ASG       float 
               [000042] -------N----              +--*  FIELD     float  Y
               [000039] ------------              |  \--*  ADDR      byref 
               [000040] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB03
               [000048] -A----------              *  ASG       float 
               [000047] -------N----              +--*  FIELD     float  Z
               [000044] ------------              |  \--*  ADDR      byref 
               [000045] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB03
               [000053] -A----------              *  ASG       float 
               [000052] -------N----              +--*  FIELD     float  W
               [000049] ------------              |  \--*  ADDR      byref 
               [000050] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000028] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000028] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000028] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000028] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000028] Starting PHASE Post-import

*************** In fgRemoveEmptyBlocks

*************** Inline @[000028] Finishing PHASE Post-import


----------- Statements (and blocks) added due to the inlining of call [000028] -----------

Arguments setup:

Inlinee method body:
STMT00007 (IL 0x000...  ???)
               [000038] -A----------              *  ASG       float 
               [000037] -------N----              +--*  FIELD     float  X
               [000034] ------------              |  \--*  ADDR      byref 
               [000035] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000


STMT00008 (IL 0x000...  ???)
               [000043] -A----------              *  ASG       float 
               [000042] -------N----              +--*  FIELD     float  Y
               [000039] ------------              |  \--*  ADDR      byref 
               [000040] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000


STMT00009 (IL 0x000...  ???)
               [000048] -A----------              *  ASG       float 
               [000047] -------N----              +--*  FIELD     float  Z
               [000044] ------------              |  \--*  ADDR      byref 
               [000045] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000


STMT00010 (IL 0x000...  ???)
               [000053] -A----------              *  ASG       float 
               [000052] -------N----              +--*  FIELD     float  W
               [000049] ------------              |  \--*  ADDR      byref 
               [000050] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined System.Numerics.Quaternion:.ctor(float,float,float,float):this (30 IL bytes) (depth 2) [profitable inline]
--------------------------------------------------------------------------------------------

INLINER: during 'fgInline' result 'success' reason 'profitable inline' for 'System.Numerics.Quaternion:get_IsIdentity():bool:this' calling 'System.Numerics.Quaternion:.ctor(float,float,float,float):this'
INLINER: during 'fgInline' result 'success' reason 'profitable inline'

Replacing the return expression placeholder [000007] with [000032]
               [000007] --C---------              *  RET_EXPR  void  (inl return from call [000032])

Inserting the inline return expression
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         

Expanding INLINE_CANDIDATE in statement STMT00003 in BB01:
STMT00003 (IL   ???...  ???)
               [000008] I-C-G-------              *  CALL r2r_ind int    System.Numerics.Quaternion.op_Equality (exactContextHnd=0x00000000D1FFAB1E)
               [000015] n----------- arg0         +--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------              |  \--*  ADDR      byref 
               [000006] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000013] n----------- arg1         \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Argument #0:
               [000015] n-----------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------              \--*  ADDR      byref 
               [000006] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         


Argument #1:
               [000013] n-----------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------              \--*  ADDR      byref 
               [000011] -------N----                 \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
INLINER: inlineInfo.tokenLookupContextHandle for System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool set to 0x00000000D1FFAB1E:

Invoking compiler for the inlinee method System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool :
IL to import:
IL_0000  02                ldarg.0     
IL_0001  7b 45 06 00 04    ldfld        0x4000645
IL_0006  03                ldarg.1     
IL_0007  7b 45 06 00 04    ldfld        0x4000645
IL_000c  33 2b             bne.un.s     43 (IL_0039)
IL_000e  02                ldarg.0     
IL_000f  7b 46 06 00 04    ldfld        0x4000646
IL_0014  03                ldarg.1     
IL_0015  7b 46 06 00 04    ldfld        0x4000646
IL_001a  33 1d             bne.un.s     29 (IL_0039)
IL_001c  02                ldarg.0     
IL_001d  7b 47 06 00 04    ldfld        0x4000647
IL_0022  03                ldarg.1     
IL_0023  7b 47 06 00 04    ldfld        0x4000647
IL_0028  33 0f             bne.un.s     15 (IL_0039)
IL_002a  02                ldarg.0     
IL_002b  7b 48 06 00 04    ldfld        0x4000648
IL_0030  03                ldarg.1     
IL_0031  7b 48 06 00 04    ldfld        0x4000648
IL_0036  fe 01             ceq         
IL_0038  2a                ret         
IL_0039  16                ldc.i4.0    
IL_003a  2a                ret         

INLINER impTokenLookupContextHandle for System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool is 0x00000000D1FFAB1E.
*************** In fgFindBasicBlocks() for System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool
weight= 31 : state 191 [ ldarg.0 -> ldfld ]
weight= 29 : state 192 [ ldarg.1 -> ldfld ]
weight= 12 : state  51 [ bne.un.s ]
weight= 31 : state 191 [ ldarg.0 -> ldfld ]
weight= 29 : state 192 [ ldarg.1 -> ldfld ]
weight= 12 : state  51 [ bne.un.s ]
weight= 31 : state 191 [ ldarg.0 -> ldfld ]
weight= 29 : state 192 [ ldarg.1 -> ldfld ]
weight= 12 : state  51 [ bne.un.s ]
weight= 31 : state 191 [ ldarg.0 -> ldfld ]
weight= 29 : state 192 [ ldarg.1 -> ldfld ]
weight= 20 : state 168 [ ceq ]
weight= 19 : state  42 [ ret ]
weight= 15 : state  23 [ ldc.i4.0 ]
weight= 19 : state  42 [ ret ]

multiplier in methods of promotable struct increased to 3.
Inline candidate has SIMD type args, locals or return value.  Multiplier increased to 6.
Inline candidate callsite is boring.  Multiplier increased to 7.3.
calleeNativeSizeEstimate=349
callsiteNativeSizeEstimate=155
benefit multiplier=7.3
threshold=1131
Native estimate for function size is within threshold for inlining 34.9 <= 113.1 (multiplier = 7.3)
Jump targets:
  IL_0039
New Basic Block BB04 [0003] created.
BB04 [000..00E)
New Basic Block BB05 [0004] created.
BB05 [00E..01C)
New Basic Block BB06 [0005] created.
BB06 [01C..02A)
New Basic Block BB07 [0006] created.
BB07 [02A..039)
New Basic Block BB08 [0007] created.
BB08 [039..03B)

lvaGrabTemp returning 5 (V05 tmp4) (a long lifetime temp) called for Inline return value spill temp.
Basic block list for 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00E)-> BB08 ( cond )                     
BB05 [0004]  1                             1       [00E..01C)-> BB08 ( cond )                     
BB06 [0005]  1                             1       [01C..02A)-> BB08 ( cond )                     
BB07 [0006]  1                             1       [02A..039)        (return)                     
BB08 [0007]  3                             1       [039..03B)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000008] Starting PHASE Pre-import

*************** Inline @[000008] Finishing PHASE Pre-import

*************** Inline @[000008] Starting PHASE Profile incorporation
BBOPT not set

*************** Inline @[000008] Finishing PHASE Profile incorporation [no changes]

*************** Inline @[000008] Starting PHASE Importation
*************** In impImport() for System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool

impImportBlockPending for BB04

Importing BB04 (PC=000) of 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
    [ 0]   0 (0x000) ldarg.0
lvaGrabTemp returning 6 (V06 tmp5) called for Inlining Arg.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type

    [ 1]   1 (0x001) ldfld 04000645
    [ 1]   6 (0x006) ldarg.1
lvaGrabTemp returning 7 (V07 tmp6) called for Inlining Arg.
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type

    [ 2]   7 (0x007) ldfld 04000645
    [ 2]  12 (0x00c) bne.un.s

               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  FIELD     float  X
               [000056] ------------                 |  \--*  ADDR      byref 
               [000055] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000060] ------------                 \--*  FIELD     float  X
               [000059] ------------                    \--*  ADDR      byref 
               [000058] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

impImportBlockPending for BB05

impImportBlockPending for BB08

Importing BB08 (PC=057) of 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
    [ 0]  57 (0x039) ldc.i4.0 0
    [ 1]  58 (0x03a) ret

    Inlinee Return expression (before normalization)  =>
               [000063] ------------              *  CNS_INT   int    0


               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0


    Inlinee Return expression (after normalization) =>
               [000067] ------------              *  LCL_VAR   bool   V05 tmp4         

Importing BB05 (PC=014) of 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
    [ 0]  14 (0x00e) ldarg.0
    [ 1]  15 (0x00f) ldfld 04000646
    [ 1]  20 (0x014) ldarg.1
    [ 2]  21 (0x015) ldfld 04000646
    [ 2]  26 (0x01a) bne.un.s

               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  FIELD     float  Y
               [000069] ------------                 |  \--*  ADDR      byref 
               [000068] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000073] ------------                 \--*  FIELD     float  Y
               [000072] ------------                    \--*  ADDR      byref 
               [000071] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

impImportBlockPending for BB06

impImportBlockPending for BB08

Importing BB06 (PC=028) of 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
    [ 0]  28 (0x01c) ldarg.0
    [ 1]  29 (0x01d) ldfld 04000647
    [ 1]  34 (0x022) ldarg.1
    [ 2]  35 (0x023) ldfld 04000647
    [ 2]  40 (0x028) bne.un.s

               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  FIELD     float  Z
               [000077] ------------                 |  \--*  ADDR      byref 
               [000076] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000081] ------------                 \--*  FIELD     float  Z
               [000080] ------------                    \--*  ADDR      byref 
               [000079] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

impImportBlockPending for BB07

impImportBlockPending for BB08

Importing BB07 (PC=042) of 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
    [ 0]  42 (0x02a) ldarg.0
    [ 1]  43 (0x02b) ldfld 04000648
    [ 1]  48 (0x030) ldarg.1
    [ 2]  49 (0x031) ldfld 04000648
    [ 2]  54 (0x036) ceq
    [ 1]  56 (0x038) ret

    Inlinee Return expression (before normalization)  =>
               [000090] ------------              *  EQ        int   
               [000086] ------------              +--*  FIELD     float  W
               [000085] ------------              |  \--*  ADDR      byref 
               [000084] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000089] ------------              \--*  FIELD     float  W
               [000088] ------------                 \--*  ADDR      byref 
               [000087] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         


               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  FIELD     float  W
               [000085] ------------                 |  \--*  ADDR      byref 
               [000084] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000089] ------------                 \--*  FIELD     float  W
               [000088] ------------                    \--*  ADDR      byref 
               [000087] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         


    Inlinee Return expression (after normalization) =>
               [000093] ------------              *  LCL_VAR   bool   V05 tmp4         

*************** Inline @[000008] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00E)-> BB08 ( cond )                     i 
BB05 [0004]  1                             1       [00E..01C)-> BB08 ( cond )                     i 
BB06 [0005]  1                             1       [01C..02A)-> BB08 ( cond )                     i 
BB07 [0006]  1                             1       [02A..039)        (return)                     i 
BB08 [0007]  3                             1       [039..03B)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB04 [000..00E) -> BB08 (cond), preds={} succs={BB05,BB08}

***** BB04
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  FIELD     float  X
               [000056] ------------                 |  \--*  ADDR      byref 
               [000055] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000060] ------------                 \--*  FIELD     float  X
               [000059] ------------                    \--*  ADDR      byref 
               [000058] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB05 [00E..01C) -> BB08 (cond), preds={} succs={BB06,BB08}

***** BB05
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  FIELD     float  Y
               [000069] ------------                 |  \--*  ADDR      byref 
               [000068] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000073] ------------                 \--*  FIELD     float  Y
               [000072] ------------                    \--*  ADDR      byref 
               [000071] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB06 [01C..02A) -> BB08 (cond), preds={} succs={BB07,BB08}

***** BB06
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  FIELD     float  Z
               [000077] ------------                 |  \--*  ADDR      byref 
               [000076] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000081] ------------                 \--*  FIELD     float  Z
               [000080] ------------                    \--*  ADDR      byref 
               [000079] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB07 [02A..039) (return), preds={} succs={}

***** BB07
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  FIELD     float  W
               [000085] ------------                 |  \--*  ADDR      byref 
               [000084] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000089] ------------                 \--*  FIELD     float  W
               [000088] ------------                    \--*  ADDR      byref 
               [000087] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB08 [039..03B) (return), preds={} succs={}

***** BB08
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000008] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000008] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000008] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000008] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000008] Starting PHASE Post-import

*************** In fgRemoveEmptyBlocks

*************** Inline @[000008] Finishing PHASE Post-import


----------- Statements (and blocks) added due to the inlining of call [000008] -----------

Arguments setup:
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
STMT00016 (IL   ???...  ???)
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000015] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------                 \--*  ADDR      byref 
               [000006] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
SIMD Candidate Type System.Numerics.Quaternion
  Unknown SIMD Type
STMT00017 (IL   ???...  ???)
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         
               [000013] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Inlinee method body:New Basic Block BB09 [0008] created.

Convert bbJumpKind of BB07 to BBJ_ALWAYS to bottomBlock BB09

Convert bbJumpKind of BB08 to BBJ_NONE
fgInlineAppendStatements: no gc ref inline locals.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..000)-> BB08 ( cond )                     i internal 
BB05 [0004]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB06 [0005]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB07 [0006]  1                             1       [000..000)-> BB09 (always)                     i internal 
BB08 [0007]  3                             1       [000..000)                                     i internal 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB04 [000..000) -> BB08 (cond), preds={} succs={BB05,BB08}

***** BB04
STMT00011 (IL   ???...  ???)
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  FIELD     float  X
               [000056] ------------                 |  \--*  ADDR      byref 
               [000055] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000060] ------------                 \--*  FIELD     float  X
               [000059] ------------                    \--*  ADDR      byref 
               [000058] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB05 [000..000) -> BB08 (cond), preds={} succs={BB06,BB08}

***** BB05
STMT00013 (IL   ???...  ???)
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  FIELD     float  Y
               [000069] ------------                 |  \--*  ADDR      byref 
               [000068] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000073] ------------                 \--*  FIELD     float  Y
               [000072] ------------                    \--*  ADDR      byref 
               [000071] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB06 [000..000) -> BB08 (cond), preds={} succs={BB07,BB08}

***** BB06
STMT00014 (IL   ???...  ???)
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  FIELD     float  Z
               [000077] ------------                 |  \--*  ADDR      byref 
               [000076] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000081] ------------                 \--*  FIELD     float  Z
               [000080] ------------                    \--*  ADDR      byref 
               [000079] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB07 [000..000) -> BB09 (always), preds={} succs={BB09}

***** BB07
STMT00015 (IL   ???...  ???)
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  FIELD     float  W
               [000085] ------------                 |  \--*  ADDR      byref 
               [000084] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000089] ------------                 \--*  FIELD     float  W
               [000088] ------------                    \--*  ADDR      byref 
               [000087] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB08 [000..000), preds={} succs={BB09}

***** BB08
STMT00012 (IL   ???...  ???)
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

-------------------------------------------------------------------------------------------------------------------

Return expression for call at [000008] is
               [000093] ------------              *  LCL_VAR   bool   V05 tmp4         
Successfully inlined System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool (59 IL bytes) (depth 1) [profitable inline]
--------------------------------------------------------------------------------------------

INLINER: during 'fgInline' result 'success' reason 'profitable inline' for 'System.Numerics.Quaternion:get_IsIdentity():bool:this' calling 'System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool'
INLINER: during 'fgInline' result 'success' reason 'profitable inline'

Replacing the return expression placeholder [000016] with [000093]
               [000016] --C---------              *  RET_EXPR  int   (inl return from call [000093])

Inserting the inline return expression
               [000093] ------------              *  LCL_VAR   bool   V05 tmp4         

**************** Inline Tree
Inlines into 06001CD2 [via DefaultPolicy] System.Numerics.Quaternion:get_IsIdentity():bool:this
  [1 IL=0006 TR=000002 06001CD1] [profitable inline] System.Numerics.Quaternion:get_Identity():System.Numerics.Quaternion
    [2 IL=0020 TR=000028 06001CCF] [profitable inline] System.Numerics.Quaternion:.ctor(float,float,float,float):this
  [3 IL=0011 TR=000008 06001CD5] [profitable inline] System.Numerics.Quaternion:op_Equality(System.Numerics.Quaternion,System.Numerics.Quaternion):bool
Budget: initialTime=111, finalTime=299, initialBudget=1110, currentBudget=1110
Budget: initialSize=518, finalSize=1186

*************** Finishing PHASE Morph - Inlining
Trees after Morph - Inlining

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i 
BB04 [0003]  1                             1       [000..000)-> BB08 ( cond )                     i internal 
BB05 [0004]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB06 [0005]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB07 [0006]  1                             1       [000..000)-> BB09 (always)                     i internal 
BB08 [0007]  3                             1       [000..000)                                     i internal 
BB09 [0008]  1                             1       [???..???)        (return)                     internal 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011), preds={} succs={BB04}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000024] ------------              \--*  CNS_INT   int    0

***** BB01
STMT00007 (IL 0x000...  ???)
               [000038] -A----------              *  ASG       float 
               [000037] -------N----              +--*  FIELD     float  X
               [000034] ------------              |  \--*  ADDR      byref 
               [000035] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
               [000043] -A----------              *  ASG       float 
               [000042] -------N----              +--*  FIELD     float  Y
               [000039] ------------              |  \--*  ADDR      byref 
               [000040] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
               [000048] -A----------              *  ASG       float 
               [000047] -------N----              +--*  FIELD     float  Z
               [000044] ------------              |  \--*  ADDR      byref 
               [000045] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
               [000053] -A----------              *  ASG       float 
               [000052] -------N----              +--*  FIELD     float  W
               [000049] ------------              |  \--*  ADDR      byref 
               [000050] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V04 tmp3         

***** BB01
STMT00016 (IL   ???...  ???)
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000015] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------                 \--*  ADDR      byref 
               [000006] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

***** BB01
STMT00017 (IL   ???...  ???)
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         
               [000013] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

------------ BB04 [000..000) -> BB08 (cond), preds={} succs={BB05,BB08}

***** BB04
STMT00011 (IL   ???...  ???)
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  FIELD     float  X
               [000056] ------------                 |  \--*  ADDR      byref 
               [000055] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000060] ------------                 \--*  FIELD     float  X
               [000059] ------------                    \--*  ADDR      byref 
               [000058] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB05 [000..000) -> BB08 (cond), preds={} succs={BB06,BB08}

***** BB05
STMT00013 (IL   ???...  ???)
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  FIELD     float  Y
               [000069] ------------                 |  \--*  ADDR      byref 
               [000068] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000073] ------------                 \--*  FIELD     float  Y
               [000072] ------------                    \--*  ADDR      byref 
               [000071] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB06 [000..000) -> BB08 (cond), preds={} succs={BB07,BB08}

***** BB06
STMT00014 (IL   ???...  ???)
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  FIELD     float  Z
               [000077] ------------                 |  \--*  ADDR      byref 
               [000076] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000081] ------------                 \--*  FIELD     float  Z
               [000080] ------------                    \--*  ADDR      byref 
               [000079] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB07 [000..000) -> BB09 (always), preds={} succs={BB09}

***** BB07
STMT00015 (IL   ???...  ???)
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  FIELD     float  W
               [000085] ------------                 |  \--*  ADDR      byref 
               [000084] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V06 tmp5         
               [000089] ------------                 \--*  FIELD     float  W
               [000088] ------------                    \--*  ADDR      byref 
               [000087] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V07 tmp6         

------------ BB08 [000..000), preds={} succs={BB09}

***** BB08
STMT00012 (IL   ???...  ???)
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

------------ BB09 [???..???) (return), preds={} succs={}

***** BB09
STMT00004 (IL   ???...  ???)
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000093] ------------                 \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Allocate Objects
no newobjs in this method; punting

*************** Finishing PHASE Allocate Objects [no changes]

*************** Starting PHASE Morph - Add internal blocks

*************** After fgAddInternal()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i 
BB04 [0003]  1                             1       [000..000)-> BB08 ( cond )                     i internal 
BB05 [0004]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB06 [0005]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB07 [0006]  1                             1       [000..000)-> BB09 (always)                     i internal 
BB08 [0007]  3                             1       [000..000)                                     i internal 
BB09 [0008]  1                             1       [???..???)        (return)                     internal 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** Finishing PHASE Morph - Add internal blocks

*************** Starting PHASE Remove empty try

*************** In fgRemoveEmptyTry()
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty try [no changes]

*************** Starting PHASE Remove empty finally
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty finally [no changes]

*************** Starting PHASE Merge callfinally chains
No EH in this method, nothing to merge.

*************** Finishing PHASE Merge callfinally chains [no changes]

*************** Starting PHASE Clone finally
No EH in this method, no cloning.

*************** Finishing PHASE Clone finally [no changes]

*************** Starting PHASE Compute preds

Renumbering the basic blocks for fgComputePred

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i 
BB04 [0003]  1                             1       [000..000)-> BB08 ( cond )                     i internal 
BB05 [0004]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB06 [0005]  1                             0.50    [000..000)-> BB08 ( cond )                     i internal 
BB07 [0006]  1                             1       [000..000)-> BB09 (always)                     i internal 
BB08 [0007]  3                             1       [000..000)                                     i internal 
BB09 [0008]  1                             1       [???..???)        (return)                     internal 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
Renumber BB04 to BB02
Renumber BB05 to BB03
Renumber BB06 to BB04
Renumber BB07 to BB05
Renumber BB08 to BB06
Renumber BB09 to BB07

*************** After renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i 
BB02 [0003]  1                             1       [000..000)-> BB06 ( cond )                     i internal 
BB03 [0004]  1                             0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1                             0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1                             1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3                             1       [000..000)                                     i internal 
BB07 [0008]  1                             1       [???..???)        (return)                     internal 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

New BlockSet epoch 2, # of blocks (including unused BB00): 8, bitset array size: 1 (short)

*************** In fgComputePreds()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i 
BB02 [0003]  1                             1       [000..000)-> BB06 ( cond )                     i internal 
BB03 [0004]  1                             0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1                             0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1                             1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3                             1       [000..000)                                     i internal 
BB07 [0008]  1                             1       [???..???)        (return)                     internal 
-----------------------------------------------------------------------------------------------------------------------------------------


*************** After fgComputePreds()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i label target 
BB02 [0003]  1       BB01                  1       [000..000)-> BB06 ( cond )                     i internal 
BB03 [0004]  1       BB02                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB02,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------


*************** Finishing PHASE Compute preds

*************** Starting PHASE Merge throw blocks

*************** In fgTailMergeThrows
Method does not have multiple noreturn calls.

*************** Finishing PHASE Merge throw blocks [no changes]

*************** Starting PHASE Update flow graph early pass

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)                                     i label target 
BB02 [0003]  1       BB01                  1       [000..000)-> BB06 ( cond )                     i internal 
BB03 [0004]  1       BB02                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB02,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------


Compacting blocks BB01 and BB02:
*************** In fgDebugCheckBBlist

After updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Update flow graph early pass

*************** Starting PHASE Morph - Promote Structs

*************** In fgResetImplicitByRefRefCount()
*************** In fgPromoteStructs()

lvaTable before fgPromoteStructs
; Initial local variable assignments
;
;  V00 this            byref  this
;  V01 OutArgs        lclBlk <na>  "OutgoingArgSpace"
;  V02 tmp1           struct <System.Numerics.Quaternion, 16> "impAppendStmt"
;  V03 tmp2           struct <System.Numerics.Quaternion, 16> "struct address for call/obj"
;  V04 tmp3           struct <System.Numerics.Quaternion, 16> "NewObj constructor temp"
;  V05 tmp4             bool  "Inline return value spill temp"
;  V06 tmp5           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
;  V07 tmp6           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
Not promoting promotable struct local V02: #fields = 4, fieldAccessed = 0.
Not promoting promotable struct local V03: #fields = 4, fieldAccessed = 0.

Promoting struct local V04 (System.Numerics.Quaternion):
lvaGrabTemp returning 8 (V08 tmp7) (a long lifetime temp) called for field V04.X (fldOffset=0x0).

lvaGrabTemp returning 9 (V09 tmp8) (a long lifetime temp) called for field V04.Y (fldOffset=0x4).

lvaGrabTemp returning 10 (V10 tmp9) (a long lifetime temp) called for field V04.Z (fldOffset=0x8).

lvaGrabTemp returning 11 (V11 tmp10) (a long lifetime temp) called for field V04.W (fldOffset=0xc).

Promoting struct local V06 (System.Numerics.Quaternion):
lvaGrabTemp returning 12 (V12 tmp11) (a long lifetime temp) called for field V06.X (fldOffset=0x0).

lvaGrabTemp returning 13 (V13 tmp12) (a long lifetime temp) called for field V06.Y (fldOffset=0x4).

lvaGrabTemp returning 14 (V14 tmp13) (a long lifetime temp) called for field V06.Z (fldOffset=0x8).

lvaGrabTemp returning 15 (V15 tmp14) (a long lifetime temp) called for field V06.W (fldOffset=0xc).

Promoting struct local V07 (System.Numerics.Quaternion):
lvaGrabTemp returning 16 (V16 tmp15) (a long lifetime temp) called for field V07.X (fldOffset=0x0).

lvaGrabTemp returning 17 (V17 tmp16) (a long lifetime temp) called for field V07.Y (fldOffset=0x4).

lvaGrabTemp returning 18 (V18 tmp17) (a long lifetime temp) called for field V07.Z (fldOffset=0x8).

lvaGrabTemp returning 19 (V19 tmp18) (a long lifetime temp) called for field V07.W (fldOffset=0xc).

lvaTable after fgPromoteStructs
; Initial local variable assignments
;
;  V00 this            byref  this
;  V01 OutArgs        lclBlk <na>  "OutgoingArgSpace"
;  V02 tmp1           struct <System.Numerics.Quaternion, 16> "impAppendStmt"
;  V03 tmp2           struct <System.Numerics.Quaternion, 16> "struct address for call/obj"
;  V04 tmp3           struct <System.Numerics.Quaternion, 16> "NewObj constructor temp"
;  V05 tmp4             bool  "Inline return value spill temp"
;  V06 tmp5           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
;  V07 tmp6           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
;  V08 tmp7            float  V04.X(offs=0x00) P-INDEP "field V04.X (fldOffset=0x0)"
;  V09 tmp8            float  V04.Y(offs=0x04) P-INDEP "field V04.Y (fldOffset=0x4)"
;  V10 tmp9            float  V04.Z(offs=0x08) P-INDEP "field V04.Z (fldOffset=0x8)"
;  V11 tmp10           float  V04.W(offs=0x0c) P-INDEP "field V04.W (fldOffset=0xc)"
;  V12 tmp11           float  V06.X(offs=0x00) P-INDEP "field V06.X (fldOffset=0x0)"
;  V13 tmp12           float  V06.Y(offs=0x04) P-INDEP "field V06.Y (fldOffset=0x4)"
;  V14 tmp13           float  V06.Z(offs=0x08) P-INDEP "field V06.Z (fldOffset=0x8)"
;  V15 tmp14           float  V06.W(offs=0x0c) P-INDEP "field V06.W (fldOffset=0xc)"
;  V16 tmp15           float  V07.X(offs=0x00) P-INDEP "field V07.X (fldOffset=0x0)"
;  V17 tmp16           float  V07.Y(offs=0x04) P-INDEP "field V07.Y (fldOffset=0x4)"
;  V18 tmp17           float  V07.Z(offs=0x08) P-INDEP "field V07.Z (fldOffset=0x8)"
;  V19 tmp18           float  V07.W(offs=0x0c) P-INDEP "field V07.W (fldOffset=0xc)"

*************** Finishing PHASE Morph - Promote Structs

*************** Starting PHASE Morph - Structs/AddrExp

*************** In fgMarkAddressExposedLocals()
LocalAddressVisitor visiting statement:
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

LocalAddressVisitor visiting statement:
STMT00005 (IL 0x000...  ???)
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  +--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  +--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  +--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  +--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000024] ------------              \--*  CNS_INT   int    0

LocalAddressVisitor visiting statement:
STMT00007 (IL 0x000...  ???)
               [000038] -A----------              *  ASG       float 
               [000037] -------N----              +--*  FIELD     float  X
               [000034] ------------              |  \--*  ADDR      byref 
               [000035] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  |     \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  |     \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  |     \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  |     \--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000
Replacing the field in promoted struct with local var V08
LocalAddressVisitor modified statement:
STMT00007 (IL 0x000...  ???)
               [000038] -A----------              *  ASG       float 
               [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

LocalAddressVisitor visiting statement:
STMT00008 (IL 0x000...  ???)
               [000043] -A----------              *  ASG       float 
               [000042] -------N----              +--*  FIELD     float  Y
               [000039] ------------              |  \--*  ADDR      byref 
               [000040] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  |     \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  |     \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  |     \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  |     \--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000
Replacing the field in promoted struct with local var V09
LocalAddressVisitor modified statement:
STMT00008 (IL 0x000...  ???)
               [000043] -A----------              *  ASG       float 
               [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

LocalAddressVisitor visiting statement:
STMT00009 (IL 0x000...  ???)
               [000048] -A----------              *  ASG       float 
               [000047] -------N----              +--*  FIELD     float  Z
               [000044] ------------              |  \--*  ADDR      byref 
               [000045] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  |     \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  |     \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  |     \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  |     \--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000
Replacing the field in promoted struct with local var V10
LocalAddressVisitor modified statement:
STMT00009 (IL 0x000...  ???)
               [000048] -A----------              *  ASG       float 
               [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

LocalAddressVisitor visiting statement:
STMT00010 (IL 0x000...  ???)
               [000053] -A----------              *  ASG       float 
               [000052] -------N----              +--*  FIELD     float  W
               [000049] ------------              |  \--*  ADDR      byref 
               [000050] -------N----              |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  |     \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  |     \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  |     \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  |     \--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000
Replacing the field in promoted struct with local var V11
LocalAddressVisitor modified statement:
STMT00010 (IL 0x000...  ???)
               [000053] -A----------              *  ASG       float 
               [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

LocalAddressVisitor visiting statement:
STMT00002 (IL   ???...  ???)
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  \--*    float  V04.W (offs=0x0c) -> V11 tmp10        

LocalAddressVisitor visiting statement:
STMT00016 (IL   ???...  ???)
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  +--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  +--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  +--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  +--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000015] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000014] ------------                 \--*  ADDR      byref 
               [000006] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
LocalAddressVisitor modified statement:
STMT00016 (IL   ???...  ???)
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  +--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  +--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  +--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  +--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000015] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

LocalAddressVisitor visiting statement:
STMT00017 (IL   ???...  ???)
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  +--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  +--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  +--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  +--*    float  V07.W (offs=0x0c) -> V19 tmp18        
               [000013] n-----------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000012] ------------                 \--*  ADDR      byref 
               [000011] -------N----                    \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
LocalAddressVisitor modified statement:
STMT00017 (IL   ???...  ???)
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  +--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  +--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  +--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  +--*    float  V07.W (offs=0x0c) -> V19 tmp18        
               [000013] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

LocalAddressVisitor visiting statement:
STMT00011 (IL   ???...  ???)
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  FIELD     float  X
               [000056] ------------                 |  \--*  ADDR      byref 
               [000055] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                     |     \--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                     |     \--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                     |     \--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                     |     \--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000060] ------------                 \--*  FIELD     float  X
               [000059] ------------                    \--*  ADDR      byref 
               [000058] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                           \--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                           \--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                           \--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                           \--*    float  V07.W (offs=0x0c) -> V19 tmp18        
Replacing the field in promoted struct with local var V12
Replacing the field in promoted struct with local var V16
LocalAddressVisitor modified statement:
STMT00011 (IL   ???...  ???)
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        

LocalAddressVisitor visiting statement:
STMT00013 (IL   ???...  ???)
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  FIELD     float  Y
               [000069] ------------                 |  \--*  ADDR      byref 
               [000068] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                     |     \--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                     |     \--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                     |     \--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                     |     \--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000073] ------------                 \--*  FIELD     float  Y
               [000072] ------------                    \--*  ADDR      byref 
               [000071] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                           \--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                           \--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                           \--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                           \--*    float  V07.W (offs=0x0c) -> V19 tmp18        
Replacing the field in promoted struct with local var V13
Replacing the field in promoted struct with local var V17
LocalAddressVisitor modified statement:
STMT00013 (IL   ???...  ???)
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        

LocalAddressVisitor visiting statement:
STMT00014 (IL   ???...  ???)
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  FIELD     float  Z
               [000077] ------------                 |  \--*  ADDR      byref 
               [000076] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                     |     \--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                     |     \--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                     |     \--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                     |     \--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000081] ------------                 \--*  FIELD     float  Z
               [000080] ------------                    \--*  ADDR      byref 
               [000079] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                           \--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                           \--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                           \--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                           \--*    float  V07.W (offs=0x0c) -> V19 tmp18        
Replacing the field in promoted struct with local var V14
Replacing the field in promoted struct with local var V18
LocalAddressVisitor modified statement:
STMT00014 (IL   ???...  ???)
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        

LocalAddressVisitor visiting statement:
STMT00015 (IL   ???...  ???)
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  FIELD     float  W
               [000085] ------------                 |  \--*  ADDR      byref 
               [000084] -------N----                 |     \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                     |     \--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                     |     \--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                     |     \--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                     |     \--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000089] ------------                 \--*  FIELD     float  W
               [000088] ------------                    \--*  ADDR      byref 
               [000087] -------N----                       \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                           \--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                           \--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                           \--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                           \--*    float  V07.W (offs=0x0c) -> V19 tmp18        
Replacing the field in promoted struct with local var V15
Replacing the field in promoted struct with local var V19
LocalAddressVisitor modified statement:
STMT00015 (IL   ???...  ???)
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        

LocalAddressVisitor visiting statement:
STMT00012 (IL   ???...  ???)
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

LocalAddressVisitor visiting statement:
STMT00004 (IL   ???...  ???)
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000093] ------------                 \--*  LCL_VAR   bool   V05 tmp4         


*************** Finishing PHASE Morph - Structs/AddrExp

*************** Starting PHASE Morph - ByRefs

*************** In fgRetypeImplicitByRefArgs()

*************** Finishing PHASE Morph - ByRefs

*************** Starting PHASE Morph - Global

*************** In fgMorphBlocks()

Morphing BB01 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB01, STMT00001 (before)
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

fgMorphTree (before 0):
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG-------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

fgMorphTree (before 1):
               [000003] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 1):
               [000003] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 2):
               [000001] ---XG-------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] ------------              \--*  LCL_VAR   byref  V00 this         

fgMorphTree (before 3):
               [000000] ------------              *  LCL_VAR   byref  V00 this         

fgMorphTree (after 3):
               [000000] ------------              *  LCL_VAR   byref  V00 this         

fgMorphTree (after 2):
               [000001] ---XG-------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] -----+------              \--*  LCL_VAR   byref  V00 this         
fgMorphCopyBlock:
fgMorphBlkNode for dst tree, before:
               [000003] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
fgMorphBlkNode after:
               [000003] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
fgMorphBlkNode for src tree, before:
               [000001] ---XG+------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] -----+------              \--*  LCL_VAR   byref  V00 this         
fgMorphBlkNode after:
               [000001] ---XG+------              *  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] -----+------              \--*  LCL_VAR   byref  V00 this         
block assignment to morph:
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  OBJ       struct<System.Numerics.Quaternion, 16>
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         
 with no promoted structs this requires a CopyBlock.

Local V02 should not be enregistered because: written in a block op

fgMorphCopyBlock (after):
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

fgMorphTree (after 0):
               [000005] -A-XG-------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

fgMorphTree BB01, STMT00001 (after)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

fgMorphTree BB01, STMT00005 (before)
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  +--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  +--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  +--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  +--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000024] ------------              \--*  CNS_INT   int    0

fgMorphTree (before 4):
               [000025] IA----------              *  ASG       struct (init)
               [000023] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  +--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  +--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  +--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  +--*    float  V04.W (offs=0x0c) -> V11 tmp10        
               [000024] ------------              \--*  CNS_INT   int    0

fgMorphTree (before 5):
               [000023] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphTree (after 5):
               [000023] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphTree (before 6):
               [000024] ------------              *  CNS_INT   int    0

fgMorphTree (after 6):
               [000024] ------------              *  CNS_INT   int    0
fgMorphBlkNode for dst tree, before:
               [000023] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        
fgMorphBlkNode after:
               [000023] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphInitBlock: using field by field initialization.
GenTreeNode creates assertion:
               [000103] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V08 == 0.000000 index=#01, mask=0000000000000001
GenTreeNode creates assertion:
               [000106] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V09 == 0.000000 index=#02, mask=0000000000000002
GenTreeNode creates assertion:
               [000110] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V10 == 0.000000 index=#03, mask=0000000000000004
GenTreeNode creates assertion:
               [000114] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V11 == 0.000000 index=#04, mask=0000000000000008
fgMorphInitBlock (after):
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 4):
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree BB01, STMT00005 (after)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree BB01, STMT00007 (before)
               [000038] -A----------              *  ASG       float 
               [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 7):
               [000038] -A----------              *  ASG       float 
               [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 8):
               [000037] D------N----              *  LCL_VAR   float  V08 tmp7         

fgMorphTree (after 8):
               [000037] D------N----              *  LCL_VAR   float  V08 tmp7         

fgMorphTree (before 9):
               [000036] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 9):
               [000036] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 7):
               [000038] -A----------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000

The assignment [000038] using V08 removes: Constant Assertion: V08 == 0.000000
GenTreeNode creates assertion:
               [000038] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V08 == 0.000000 index=#04, mask=0000000000000008

fgMorphTree BB01, STMT00008 (before)
               [000043] -A----------              *  ASG       float 
               [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 10):
               [000043] -A----------              *  ASG       float 
               [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 11):
               [000042] D------N----              *  LCL_VAR   float  V09 tmp8         

fgMorphTree (after 11):
               [000042] D------N----              *  LCL_VAR   float  V09 tmp8         

fgMorphTree (before 12):
               [000041] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 12):
               [000041] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 10):
               [000043] -A----------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000

The assignment [000043] using V09 removes: Constant Assertion: V09 == 0.000000
GenTreeNode creates assertion:
               [000043] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V09 == 0.000000 index=#04, mask=0000000000000008

fgMorphTree BB01, STMT00009 (before)
               [000048] -A----------              *  ASG       float 
               [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 13):
               [000048] -A----------              *  ASG       float 
               [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

fgMorphTree (before 14):
               [000047] D------N----              *  LCL_VAR   float  V10 tmp9         

fgMorphTree (after 14):
               [000047] D------N----              *  LCL_VAR   float  V10 tmp9         

fgMorphTree (before 15):
               [000046] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 15):
               [000046] ------------              *  CNS_DBL   float  0.00000000000000000

fgMorphTree (after 13):
               [000048] -A----------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000

The assignment [000048] using V10 removes: Constant Assertion: V10 == 0.000000
GenTreeNode creates assertion:
               [000048] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V10 == 0.000000 index=#04, mask=0000000000000008

fgMorphTree BB01, STMT00010 (before)
               [000053] -A----------              *  ASG       float 
               [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

fgMorphTree (before 16):
               [000053] -A----------              *  ASG       float 
               [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

fgMorphTree (before 17):
               [000052] D------N----              *  LCL_VAR   float  V11 tmp10        

fgMorphTree (after 17):
               [000052] D------N----              *  LCL_VAR   float  V11 tmp10        

fgMorphTree (before 18):
               [000051] ------------              *  CNS_DBL   float  1.0000000000000000

fgMorphTree (after 18):
               [000051] ------------              *  CNS_DBL   float  1.0000000000000000

fgMorphTree (after 16):
               [000053] -A----------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000

The assignment [000053] using V11 removes: Constant Assertion: V11 == 0.000000
GenTreeNode creates assertion:
               [000053] -A----------              *  ASG       float 
In BB01 New Local Constant Assertion: V11 == 1.00000 index=#04, mask=0000000000000008

fgMorphTree BB01, STMT00002 (before)
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  \--*    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphTree (before 19):
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  \--*    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphTree (before 20):
               [000031] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 20):
               [000031] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 21):
               [000029] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        

fgMorphTree (after 21):
               [000029] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        
fgMorphCopyBlock:
fgMorphBlkNode for dst tree, before:
               [000031] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
fgMorphBlkNode after:
               [000031] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
fgMorphBlkNode for src tree, before:
               [000029] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        
fgMorphBlkNode after:
               [000029] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  *    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  *    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  *    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  *    float  V04.W (offs=0x0c) -> V11 tmp10        
block assignment to morph:
               [000032] -A----------              *  ASG       struct (copy)
               [000031] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
               [000029] -----+------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V04 tmp3         
                                                  \--*    float  V04.X (offs=0x00) -> V08 tmp7         
                                                  \--*    float  V04.Y (offs=0x04) -> V09 tmp8         
                                                  \--*    float  V04.Z (offs=0x08) -> V10 tmp9         
                                                  \--*    float  V04.W (offs=0x0c) -> V11 tmp10        
 (srcDoFldAsg=true) using field by field assignments.

Local V03 should not be enregistered because: written in a block op

Local V03 should not be enregistered because: was accessed as a local field
dstFld - Multiple Fields Clone created:
               [000120] ------------              *  ADDR      byref 
               [000121] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 22):
               [000120] ------------              *  ADDR      byref 
               [000121] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 23):
               [000121] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 23):
               [000121] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 22):
               [000120] ------------              *  ADDR      byref 
               [000121] D----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field
dstFld - Multiple Fields Clone created:
               [000126] ------------              *  ADDR      byref 
               [000127] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 24):
               [000126] ------------              *  ADDR      byref 
               [000127] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 25):
               [000127] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 25):
               [000127] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 24):
               [000126] ------------              *  ADDR      byref 
               [000127] D----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field
dstFld - Multiple Fields Clone created:
               [000132] ------------              *  ADDR      byref 
               [000133] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 26):
               [000132] ------------              *  ADDR      byref 
               [000133] D------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 27):
               [000133] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 27):
               [000133] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 26):
               [000132] ------------              *  ADDR      byref 
               [000133] D----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field

fgMorphCopyBlock (after):
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

fgMorphTree (after 19):
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

fgMorphTree BB01, STMT00002 (after)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

fgMorphTree BB01, STMT00016 (before)
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  +--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  +--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  +--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  +--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000015] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 28):
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  +--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  +--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  +--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  +--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000015] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 29):
               [000094] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  *    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  *    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  *    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  *    float  V06.W (offs=0x0c) -> V15 tmp14        

fgMorphTree (after 29):
               [000094] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  *    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  *    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  *    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  *    float  V06.W (offs=0x0c) -> V15 tmp14        

fgMorphTree (before 30):
               [000015] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 30):
               [000015] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
fgMorphCopyBlock:
fgMorphBlkNode for dst tree, before:
               [000094] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  *    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  *    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  *    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  *    float  V06.W (offs=0x0c) -> V15 tmp14        
fgMorphBlkNode after:
               [000094] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  *    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  *    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  *    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  *    float  V06.W (offs=0x0c) -> V15 tmp14        
fgMorphBlkNode for src tree, before:
               [000015] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
fgMorphBlkNode after:
               [000015] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
block assignment to morph:
               [000096] -A----------              *  ASG       struct (copy)
               [000094] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V06 tmp5         
                                                  +--*    float  V06.X (offs=0x00) -> V12 tmp11        
                                                  +--*    float  V06.Y (offs=0x04) -> V13 tmp12        
                                                  +--*    float  V06.Z (offs=0x08) -> V14 tmp13        
                                                  +--*    float  V06.W (offs=0x0c) -> V15 tmp14        
               [000015] -----+------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
 (destDoFldAsg=true) using field by field assignments.

Local V02 should not be enregistered because: written in a block op

Local V02 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000143] ------------              *  ADDR      byref 
               [000144] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 31):
               [000143] ------------              *  ADDR      byref 
               [000144] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 32):
               [000144] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 32):
               [000144] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 31):
               [000143] ------------              *  ADDR      byref 
               [000144] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

Local V02 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000149] ------------              *  ADDR      byref 
               [000150] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 33):
               [000149] ------------              *  ADDR      byref 
               [000150] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 34):
               [000150] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 34):
               [000150] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 33):
               [000149] ------------              *  ADDR      byref 
               [000150] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

Local V02 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000155] ------------              *  ADDR      byref 
               [000156] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 35):
               [000155] ------------              *  ADDR      byref 
               [000156] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (before 36):
               [000156] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 36):
               [000156] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

fgMorphTree (after 35):
               [000155] ------------              *  ADDR      byref 
               [000156] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         

Local V02 should not be enregistered because: was accessed as a local field

fgMorphCopyBlock (after):
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

fgMorphTree (after 28):
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

fgMorphTree BB01, STMT00016 (after)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

fgMorphTree BB01, STMT00017 (before)
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  +--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  +--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  +--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  +--*    float  V07.W (offs=0x0c) -> V19 tmp18        
               [000013] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 37):
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  +--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  +--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  +--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  +--*    float  V07.W (offs=0x0c) -> V19 tmp18        
               [000013] ------------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 38):
               [000097] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  *    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  *    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  *    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  *    float  V07.W (offs=0x0c) -> V19 tmp18        

fgMorphTree (after 38):
               [000097] D------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  *    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  *    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  *    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  *    float  V07.W (offs=0x0c) -> V19 tmp18        

fgMorphTree (before 39):
               [000013] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 39):
               [000013] ------------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
fgMorphCopyBlock:
fgMorphBlkNode for dst tree, before:
               [000097] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  *    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  *    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  *    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  *    float  V07.W (offs=0x0c) -> V19 tmp18        
fgMorphBlkNode after:
               [000097] D----+-N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  *    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  *    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  *    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  *    float  V07.W (offs=0x0c) -> V19 tmp18        
fgMorphBlkNode for src tree, before:
               [000013] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
fgMorphBlkNode after:
               [000013] -----+------              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
block assignment to morph:
               [000099] -A----------              *  ASG       struct (copy)
               [000097] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16>(P) V07 tmp6         
                                                  +--*    float  V07.X (offs=0x00) -> V16 tmp15        
                                                  +--*    float  V07.Y (offs=0x04) -> V17 tmp16        
                                                  +--*    float  V07.Z (offs=0x08) -> V18 tmp17        
                                                  +--*    float  V07.W (offs=0x0c) -> V19 tmp18        
               [000013] -----+------              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         
 (destDoFldAsg=true) using field by field assignments.

Local V03 should not be enregistered because: written in a block op

Local V03 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000165] ------------              *  ADDR      byref 
               [000166] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 40):
               [000165] ------------              *  ADDR      byref 
               [000166] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 41):
               [000166] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 41):
               [000166] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 40):
               [000165] ------------              *  ADDR      byref 
               [000166] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000171] ------------              *  ADDR      byref 
               [000172] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 42):
               [000171] ------------              *  ADDR      byref 
               [000172] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 43):
               [000172] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 43):
               [000172] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 42):
               [000171] ------------              *  ADDR      byref 
               [000172] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field
srcFld - Multiple Fields Clone created:
               [000177] ------------              *  ADDR      byref 
               [000178] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 44):
               [000177] ------------              *  ADDR      byref 
               [000178] -------N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (before 45):
               [000178] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 45):
               [000178] -------N----              *  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

fgMorphTree (after 44):
               [000177] ------------              *  ADDR      byref 
               [000178] -----+-N----              \--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V03 tmp2         

Local V03 should not be enregistered because: was accessed as a local field

fgMorphCopyBlock (after):
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

fgMorphTree (after 37):
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

fgMorphTree BB01, STMT00017 (after)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

fgMorphTree BB01, STMT00011 (before)
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        

fgMorphTree (before 46):
               [000062] ------------              *  JTRUE     void  
               [000061] N--------U--              \--*  NE        int   
               [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        

fgMorphTree (before 47):
               [000061] N------N-U--              *  NE        int   
               [000057] ------------              +--*  LCL_VAR   float  V12 tmp11        
               [000060] ------------              \--*  LCL_VAR   float  V16 tmp15        

fgMorphTree (before 48):
               [000057] ------------              *  LCL_VAR   float  V12 tmp11        

fgMorphTree (after 48):
               [000057] ------------              *  LCL_VAR   float  V12 tmp11        

fgMorphTree (before 49):
               [000060] ------------              *  LCL_VAR   float  V16 tmp15        

fgMorphTree (after 49):
               [000060] ------------              *  LCL_VAR   float  V16 tmp15        

fgMorphTree (after 47):
               [000061] N------N-U--              *  NE        int   
               [000057] -----+------              +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------              \--*  LCL_VAR   float  V16 tmp15        

fgMorphTree (after 46):
               [000062] ------------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        

Morphing BB03 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB03, STMT00013 (before)
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        

fgMorphTree (before 50):
               [000075] ------------              *  JTRUE     void  
               [000074] N--------U--              \--*  NE        int   
               [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        

fgMorphTree (before 51):
               [000074] N------N-U--              *  NE        int   
               [000070] ------------              +--*  LCL_VAR   float  V13 tmp12        
               [000073] ------------              \--*  LCL_VAR   float  V17 tmp16        

fgMorphTree (before 52):
               [000070] ------------              *  LCL_VAR   float  V13 tmp12        

fgMorphTree (after 52):
               [000070] ------------              *  LCL_VAR   float  V13 tmp12        

fgMorphTree (before 53):
               [000073] ------------              *  LCL_VAR   float  V17 tmp16        

fgMorphTree (after 53):
               [000073] ------------              *  LCL_VAR   float  V17 tmp16        

fgMorphTree (after 51):
               [000074] N------N-U--              *  NE        int   
               [000070] -----+------              +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------              \--*  LCL_VAR   float  V17 tmp16        

fgMorphTree (after 50):
               [000075] ------------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        

Morphing BB04 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB04, STMT00014 (before)
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        

fgMorphTree (before 54):
               [000083] ------------              *  JTRUE     void  
               [000082] N--------U--              \--*  NE        int   
               [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        

fgMorphTree (before 55):
               [000082] N------N-U--              *  NE        int   
               [000078] ------------              +--*  LCL_VAR   float  V14 tmp13        
               [000081] ------------              \--*  LCL_VAR   float  V18 tmp17        

fgMorphTree (before 56):
               [000078] ------------              *  LCL_VAR   float  V14 tmp13        

fgMorphTree (after 56):
               [000078] ------------              *  LCL_VAR   float  V14 tmp13        

fgMorphTree (before 57):
               [000081] ------------              *  LCL_VAR   float  V18 tmp17        

fgMorphTree (after 57):
               [000081] ------------              *  LCL_VAR   float  V18 tmp17        

fgMorphTree (after 55):
               [000082] N------N-U--              *  NE        int   
               [000078] -----+------              +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------              \--*  LCL_VAR   float  V18 tmp17        

fgMorphTree (after 54):
               [000083] ------------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        

Morphing BB05 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB05, STMT00015 (before)
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        

fgMorphTree (before 58):
               [000092] -A----------              *  ASG       bool  
               [000091] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000090] ------------              \--*  EQ        int   
               [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        

fgMorphTree (before 59):
               [000091] D------N----              *  LCL_VAR   int    V05 tmp4         

fgMorphTree (after 59):
               [000091] D------N----              *  LCL_VAR   int    V05 tmp4         

fgMorphTree (before 60):
               [000090] ------------              *  EQ        int   
               [000086] ------------              +--*  LCL_VAR   float  V15 tmp14        
               [000089] ------------              \--*  LCL_VAR   float  V19 tmp18        

fgMorphTree (before 61):
               [000086] ------------              *  LCL_VAR   float  V15 tmp14        

fgMorphTree (after 61):
               [000086] ------------              *  LCL_VAR   float  V15 tmp14        

fgMorphTree (before 62):
               [000089] ------------              *  LCL_VAR   float  V19 tmp18        

fgMorphTree (after 62):
               [000089] ------------              *  LCL_VAR   float  V19 tmp18        

fgMorphTree (after 60):
               [000090] ------------              *  EQ        int   
               [000086] -----+------              +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------              \--*  LCL_VAR   float  V19 tmp18        

fgMorphTree (after 58):
               [000092] -A----------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        
GenTreeNode creates assertion:
               [000092] -A----------              *  ASG       bool  
In BB05 New Local Subrange Assertion: V05 in [0..1] index=#01, mask=0000000000000001

Morphing BB06 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB06, STMT00012 (before)
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

fgMorphTree (before 63):
               [000066] -A----------              *  ASG       bool  
               [000065] D------N----              +--*  LCL_VAR   bool   V05 tmp4         
               [000064] ------------              \--*  CAST      int <- bool <- int
               [000063] ------------                 \--*  CNS_INT   int    0

fgMorphTree (before 64):
               [000065] D------N----              *  LCL_VAR   int    V05 tmp4         

fgMorphTree (after 64):
               [000065] D------N----              *  LCL_VAR   int    V05 tmp4         

fgMorphTree (before 65):
               [000064] ------------              *  CAST      int <- bool <- int
               [000063] ------------              \--*  CNS_INT   int    0

fgMorphTree (before 66):
               [000063] ------------              *  CNS_INT   int    0

fgMorphTree (after 66):
               [000063] ------------              *  CNS_INT   int    0

fgMorphTree (after 65):
               [000063] -----+------              *  CNS_INT   int    0

fgMorphTree (after 63):
               [000066] -A----------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0
GenTreeNode creates assertion:
               [000066] -A----------              *  ASG       bool  
In BB06 New Local Constant Assertion: V05 == 0 index=#01, mask=0000000000000001

fgMorphTree BB06, STMT00012 (after)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0

Morphing BB07 of 'System.Numerics.Quaternion:get_IsIdentity():bool:this'

fgMorphTree BB07, STMT00004 (before)
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000093] ------------                 \--*  LCL_VAR   bool   V05 tmp4         

fgMorphTree (before 67):
               [000018] --C---------              *  RETURN    int   
               [000017] --C---------              \--*  CAST      int <- bool <- int
               [000093] ------------                 \--*  LCL_VAR   bool   V05 tmp4         

fgMorphTree (before 68):
               [000017] --C---------              *  CAST      int <- bool <- int
               [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         

fgMorphTree (before 69):
               [000093] ------------              *  LCL_VAR   bool   V05 tmp4         

fgMorphTree (after 69):
               [000093] ------------              *  LCL_VAR   bool   V05 tmp4         

fgMorphTree (after 68):
               [000093] -----+------              *  LCL_VAR   bool   V05 tmp4         

fgMorphTree (after 67):
               [000018] ------------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

fgMorphTree BB07, STMT00004 (after)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

*************** Finishing PHASE Morph - Global
Trees after Morph - Global

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB06 (cond), preds={} succs={BB03,BB06}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00007 (IL 0x000...  ???)
               [000038] -A---+------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
               [000043] -A---+------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
               [000048] -A---+------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
               [000053] -A---+------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

***** BB01
STMT00016 (IL   ???...  ???)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

***** BB01
STMT00017 (IL   ???...  ???)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

***** BB01
STMT00011 (IL   ???...  ???)
               [000062] -----+------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        

------------ BB03 [000..000) -> BB06 (cond), preds={BB01} succs={BB04,BB06}

***** BB03
STMT00013 (IL   ???...  ???)
               [000075] -----+------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        

------------ BB04 [000..000) -> BB06 (cond), preds={BB03} succs={BB05,BB06}

***** BB04
STMT00014 (IL   ???...  ???)
               [000083] -----+------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        

------------ BB05 [000..000) -> BB07 (always), preds={BB04} succs={BB07}

***** BB05
STMT00015 (IL   ???...  ???)
               [000092] -A---+------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        

------------ BB06 [000..000), preds={BB01,BB03,BB04} succs={BB07}

***** BB06
STMT00012 (IL   ???...  ???)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0

------------ BB07 [???..???) (return), preds={BB05,BB06} succs={}

***** BB07
STMT00004 (IL   ???...  ???)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE GS Cookie
No GS security needed

*************** Finishing PHASE GS Cookie

*************** Starting PHASE Compute edge weights (1, false)
*************** In fgComputeBlockAndEdgeWeights()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

 -- no profile data, so using default called count
 -- not optimizing or no profile data, so not computing edge weights

*************** Finishing PHASE Compute edge weights (1, false)

*************** Starting PHASE Create EH funclets
*************** In fgCreateFunclets()

After fgCreateFunclets()
-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Create EH funclets

*************** Starting PHASE Invert loops

*************** Finishing PHASE Invert loops
Trees after Invert loops

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB06 (cond), preds={} succs={BB03,BB06}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00007 (IL 0x000...  ???)
               [000038] -A---+------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
               [000043] -A---+------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
               [000048] -A---+------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
               [000053] -A---+------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

***** BB01
STMT00016 (IL   ???...  ???)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

***** BB01
STMT00017 (IL   ???...  ???)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

***** BB01
STMT00011 (IL   ???...  ???)
               [000062] -----+------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        

------------ BB03 [000..000) -> BB06 (cond), preds={BB01} succs={BB04,BB06}

***** BB03
STMT00013 (IL   ???...  ???)
               [000075] -----+------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        

------------ BB04 [000..000) -> BB06 (cond), preds={BB03} succs={BB05,BB06}

***** BB04
STMT00014 (IL   ???...  ???)
               [000083] -----+------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        

------------ BB05 [000..000) -> BB07 (always), preds={BB04} succs={BB07}

***** BB05
STMT00015 (IL   ???...  ???)
               [000092] -A---+------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        

------------ BB06 [000..000), preds={BB01,BB03,BB04} succs={BB07}

***** BB06
STMT00012 (IL   ???...  ???)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0

------------ BB07 [???..???) (return), preds={BB05,BB06} succs={}

***** BB07
STMT00004 (IL   ???...  ???)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Optimize layout

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** In fgExpandRarelyRunBlocks()
*************** In fgReorderBlocks()

Initial BasicBlocks
-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------


*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize layout
Trees after Optimize layout

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB06 (cond), preds={} succs={BB03,BB06}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00007 (IL 0x000...  ???)
               [000038] -A---+------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
               [000043] -A---+------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
               [000048] -A---+------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
               [000053] -A---+------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

***** BB01
STMT00016 (IL   ???...  ???)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

***** BB01
STMT00017 (IL   ???...  ???)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

***** BB01
STMT00011 (IL   ???...  ???)
               [000062] -----+------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        

------------ BB03 [000..000) -> BB06 (cond), preds={BB01} succs={BB04,BB06}

***** BB03
STMT00013 (IL   ???...  ???)
               [000075] -----+------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        

------------ BB04 [000..000) -> BB06 (cond), preds={BB03} succs={BB05,BB06}

***** BB04
STMT00014 (IL   ???...  ???)
               [000083] -----+------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        

------------ BB05 [000..000) -> BB07 (always), preds={BB04} succs={BB07}

***** BB05
STMT00015 (IL   ???...  ???)
               [000092] -A---+------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        

------------ BB06 [000..000), preds={BB01,BB03,BB04} succs={BB07}

***** BB06
STMT00012 (IL   ???...  ???)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0

------------ BB07 [???..???) (return), preds={BB05,BB06} succs={}

***** BB07
STMT00004 (IL   ???...  ???)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Compute blocks reachability
*************** In fgComputeReachability
*************** In fgDebugCheckBBlist

Renumbering the basic blocks for fgComputeReachability pass #1

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB06 ( cond )                     i label target 
BB03 [0004]  1       BB01                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB04 [0005]  1       BB03                  0.50    [000..000)-> BB06 ( cond )                     i internal 
BB05 [0006]  1       BB04                  1       [000..000)-> BB07 (always)                     i internal 
BB06 [0007]  3       BB01,BB03,BB04        1       [000..000)                                     i internal label target 
BB07 [0008]  2       BB05,BB06             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
Renumber BB03 to BB02
Renumber BB04 to BB03
Renumber BB05 to BB04
Renumber BB06 to BB05
Renumber BB07 to BB06

*************** After renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.50    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.50    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  1       [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        1       [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

New BlockSet epoch 3, # of blocks (including unused BB00): 7, bitset array size: 1 (short)
Enter blocks: BB01 

After computing reachability sets:
------------------------------------------------
BBnum  Reachable by 
------------------------------------------------
BB01 : BB01 
BB02 : BB01 BB02 
BB03 : BB01 BB02 BB03 
BB04 : BB01 BB02 BB03 BB04 
BB05 : BB01 BB02 BB03 BB05 
BB06 : BB01 BB02 BB03 BB04 BB05 BB06 

After computing reachability:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.50    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.50    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  1       [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        1       [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist
*************** In fgComputeDoms
*************** In fgDebugCheckBBlist

Dominator computation start blocks (those blocks with no incoming edges):
BB01 
------------------------------------------------
BBnum  Dominated by
------------------------------------------------
BB01:  BB01 
BB02:  BB02 BB01 
BB03:  BB03 BB02 BB01 
BB04:  BB04 BB03 BB02 BB01 
BB05:  BB05 BB01 
BB06:  BB06 BB01 

Inside fgBuildDomTree

After computing the Dominance Tree:
BB01 : BB06 BB05 BB02 
BB02 : BB03 
BB03 : BB04 


After numbering the dominator tree:
BB01: pre=01, post=06
BB02: pre=04, post=05
BB03: pre=05, post=04
BB04: pre=06, post=03
BB05: pre=03, post=02
BB06: pre=02, post=01

*************** Finishing PHASE Compute blocks reachability

*************** Starting PHASE Find loops
*************** In optFindLoops()

After optSetBlockWeights:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Find loops
Trees after Find loops

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00007 (IL 0x000...  ???)
               [000038] -A---+------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
               [000043] -A---+------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
               [000048] -A---+------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
               [000053] -A---+------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

***** BB01
STMT00016 (IL   ???...  ???)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

***** BB01
STMT00017 (IL   ???...  ???)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

***** BB01
STMT00011 (IL   ???...  ???)
               [000062] -----+------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
               [000075] -----+------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
               [000083] -----+------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
               [000092] -A---+------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00004 (IL   ???...  ???)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Clone loops

*************** In optCloneLoops()

*************** Finishing PHASE Clone loops

*************** Starting PHASE Unroll loops

*************** Finishing PHASE Unroll loops

*************** Starting PHASE Mark local vars

*************** In lvaMarkLocalVars()
*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***

*** marking local variables in block BB01 (weight=1   )
STMT00001 (IL 0x000...0x010)
               [000005] -A-XG+------              *  ASG       struct (copy)
               [000003] D----+-N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
               [000001] ---XG+------              \--*  IND       struct
               [000000] -----+------                 \--*  LCL_VAR   byref  V00 this         
New refCnts for V02: refCnt =  1, refCntWtd = 2   
New refCnts for V00: refCnt =  1, refCntWtd = 1   
STMT00005 (IL 0x000...  ???)
               [000115] -A---+------              *  COMMA     void  
               [000111] -A----------              +--*  COMMA     void  
               [000107] -A----------              |  +--*  COMMA     void  
               [000103] -A----------              |  |  +--*  ASG       float 
               [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
               [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
               [000106] -A----------              |  |  \--*  ASG       float 
               [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
               [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
               [000110] -A----------              |  \--*  ASG       float 
               [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
               [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
               [000114] -A----------              \--*  ASG       float 
               [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
               [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000
New refCnts for V08: refCnt =  1, refCntWtd = 1   
New refCnts for V09: refCnt =  1, refCntWtd = 1   
New refCnts for V10: refCnt =  1, refCntWtd = 1   
New refCnts for V11: refCnt =  1, refCntWtd = 1   
STMT00007 (IL 0x000...  ???)
               [000038] -A---+------              *  ASG       float 
               [000037] D----+-N----              +--*  LCL_VAR   float  V08 tmp7         
               [000036] -----+------              \--*  CNS_DBL   float  0.00000000000000000
New refCnts for V08: refCnt =  2, refCntWtd = 2   
STMT00008 (IL 0x000...  ???)
               [000043] -A---+------              *  ASG       float 
               [000042] D----+-N----              +--*  LCL_VAR   float  V09 tmp8         
               [000041] -----+------              \--*  CNS_DBL   float  0.00000000000000000
New refCnts for V09: refCnt =  2, refCntWtd = 2   
STMT00009 (IL 0x000...  ???)
               [000048] -A---+------              *  ASG       float 
               [000047] D----+-N----              +--*  LCL_VAR   float  V10 tmp9         
               [000046] -----+------              \--*  CNS_DBL   float  0.00000000000000000
New refCnts for V10: refCnt =  2, refCntWtd = 2   
STMT00010 (IL 0x000...  ???)
               [000053] -A---+------              *  ASG       float 
               [000052] D----+-N----              +--*  LCL_VAR   float  V11 tmp10        
               [000051] -----+------              \--*  CNS_DBL   float  1.0000000000000000
New refCnts for V11: refCnt =  2, refCntWtd = 2   
STMT00002 (IL   ???...  ???)
               [000137] -A---+------              *  COMMA     void  
               [000131] -A----------              +--*  COMMA     void  
               [000125] -A----------              |  +--*  COMMA     void  
               [000119] -A----------              |  |  +--*  ASG       float 
               [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
               [000124] -A----------              |  |  \--*  ASG       float 
               [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
               [000130] -A----------              |  \--*  ASG       float 
               [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
               [000136] -A----------              \--*  ASG       float 
               [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
               [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        
New refCnts for V03: refCnt =  1, refCntWtd = 2   
New refCnts for V08: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  2, refCntWtd = 4   
New refCnts for V09: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  3, refCntWtd = 6   
New refCnts for V10: refCnt =  3, refCntWtd = 3   
New refCnts for V03: refCnt =  4, refCntWtd = 8   
New refCnts for V11: refCnt =  3, refCntWtd = 3   
STMT00016 (IL   ???...  ???)
               [000159] -A---+------              *  COMMA     void  
               [000153] -A----------              +--*  COMMA     void  
               [000147] -A----------              |  +--*  COMMA     void  
               [000141] -A----------              |  |  +--*  ASG       float 
               [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
               [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
               [000146] -A----------              |  |  \--*  ASG       float 
               [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
               [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
               [000152] -A----------              |  \--*  ASG       float 
               [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
               [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
               [000158] -A----------              \--*  ASG       float 
               [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
               [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]
New refCnts for V12: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  2, refCntWtd = 4   
New refCnts for V13: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  3, refCntWtd = 6   
New refCnts for V14: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  4, refCntWtd = 8   
New refCnts for V15: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  5, refCntWtd = 10   
STMT00017 (IL   ???...  ???)
               [000181] -A---+------              *  COMMA     void  
               [000175] -A----------              +--*  COMMA     void  
               [000169] -A----------              |  +--*  COMMA     void  
               [000163] -A----------              |  |  +--*  ASG       float 
               [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
               [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
               [000168] -A----------              |  |  \--*  ASG       float 
               [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
               [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
               [000174] -A----------              |  \--*  ASG       float 
               [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
               [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
               [000180] -A----------              \--*  ASG       float 
               [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
               [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
New refCnts for V16: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  5, refCntWtd = 10   
New refCnts for V17: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  6, refCntWtd = 12   
New refCnts for V18: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  7, refCntWtd = 14   
New refCnts for V19: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  8, refCntWtd = 16   
STMT00011 (IL   ???...  ???)
               [000062] -----+------              *  JTRUE     void  
               [000061] N----+-N-U--              \--*  NE        int   
               [000057] -----+------                 +--*  LCL_VAR   float  V12 tmp11        
               [000060] -----+------                 \--*  LCL_VAR   float  V16 tmp15        
New refCnts for V12: refCnt =  2, refCntWtd = 2   
New refCnts for V16: refCnt =  2, refCntWtd = 2   

*** marking local variables in block BB02 (weight=0.25)
STMT00013 (IL   ???...  ???)
               [000075] -----+------              *  JTRUE     void  
               [000074] N----+-N-U--              \--*  NE        int   
               [000070] -----+------                 +--*  LCL_VAR   float  V13 tmp12        
               [000073] -----+------                 \--*  LCL_VAR   float  V17 tmp16        
New refCnts for V13: refCnt =  2, refCntWtd = 1.25
New refCnts for V17: refCnt =  2, refCntWtd = 1.25

*** marking local variables in block BB03 (weight=0.25)
STMT00014 (IL   ???...  ???)
               [000083] -----+------              *  JTRUE     void  
               [000082] N----+-N-U--              \--*  NE        int   
               [000078] -----+------                 +--*  LCL_VAR   float  V14 tmp13        
               [000081] -----+------                 \--*  LCL_VAR   float  V18 tmp17        
New refCnts for V14: refCnt =  2, refCntWtd = 1.25
New refCnts for V18: refCnt =  2, refCntWtd = 1.25

*** marking local variables in block BB04 (weight=0.50)
STMT00015 (IL   ???...  ???)
               [000092] -A---+------              *  ASG       bool  
               [000091] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000090] -----+------              \--*  EQ        int   
               [000086] -----+------                 +--*  LCL_VAR   float  V15 tmp14        
               [000089] -----+------                 \--*  LCL_VAR   float  V19 tmp18        
New refCnts for V05: refCnt =  1, refCntWtd = 0.50
New refCnts for V15: refCnt =  2, refCntWtd = 1.50
New refCnts for V19: refCnt =  2, refCntWtd = 1.50

*** marking local variables in block BB05 (weight=0.50)
STMT00012 (IL   ???...  ???)
               [000066] -A---+------              *  ASG       bool  
               [000065] D----+-N----              +--*  LCL_VAR   int    V05 tmp4         
               [000063] -----+------              \--*  CNS_INT   int    0
New refCnts for V05: refCnt =  2, refCntWtd = 1   

*** marking local variables in block BB06 (weight=1   )
STMT00004 (IL   ???...  ???)
               [000018] -----+------              *  RETURN    int   
               [000093] -----+------              \--*  LCL_VAR   bool   V05 tmp4         
New refCnts for V05: refCnt =  3, refCntWtd = 2   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V00: refCnt =  3, refCntWtd = 3   

*************** In optAddCopies()


*************** Finishing PHASE Mark local vars

*************** Starting PHASE Optimize bools
*************** In optOptimizeBools()
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize bools

*************** Starting PHASE Find oper order
*************** In fgFindOperOrder()

*************** Finishing PHASE Find oper order

*************** Starting PHASE Set block order
*************** In fgSetBlockOrder()
The biggest BB has   15 tree nodes

*************** Finishing PHASE Set block order
Trees before Build SSA representation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy)
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         

***** BB01
STMT00005 (IL 0x000...  ???)
N015 (  4, 12) [000115] -A----------              *  COMMA     void  
N011 (  3,  9) [000111] -A----------              +--*  COMMA     void  
N007 (  2,  6) [000107] -A----------              |  +--*  COMMA     void  
N003 (  1,  3) [000103] -A------R---              |  |  +--*  ASG       float 
N002 (  1,  2) [000101] D------N----              |  |  |  +--*  LCL_VAR   float  V08 tmp7         
N001 (  1,  1) [000102] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000
N006 (  1,  3) [000106] -A------R---              |  |  \--*  ASG       float 
N005 (  1,  2) [000104] D------N----              |  |     +--*  LCL_VAR   float  V09 tmp8         
N004 (  1,  1) [000105] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000
N010 (  1,  3) [000110] -A------R---              |  \--*  ASG       float 
N009 (  1,  2) [000108] D------N----              |     +--*  LCL_VAR   float  V10 tmp9         
N008 (  1,  1) [000109] ------------              |     \--*  CNS_DBL   float  0.00000000000000000
N014 (  1,  3) [000114] -A------R---              \--*  ASG       float 
N013 (  1,  2) [000112] D------N----                 +--*  LCL_VAR   float  V11 tmp10        
N012 (  1,  1) [000113] ------------                 \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float 
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float 
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float 
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float 
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void  
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void  
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void  
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void  
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         [+0] Fseq[X]
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         [+4] Fseq[Y]
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         [+8] Fseq[Z]
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         [+12] Fseq[W]

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void  
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         [+0] Fseq[X]
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         [+4] Fseq[Y]
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         [+8] Fseq[Z]
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         [+12] Fseq[W]

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool  
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         
N003 ( 10,  9) [000090] ------------              \--*  EQ        int   
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool  
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int   
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Build SSA representation
*************** In SsaBuilder::Build()
[SsaBuilder] Max block count is 7.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
[SsaBuilder] Topologically sorted the graph.
[SsaBuilder::ComputeImmediateDom]

Inside fgBuildDomTree

After computing the Dominance Tree:
BB01 : BB06 BB05 BB02 
BB02 : BB03 
BB03 : BB04 

*************** In fgLocalVarLiveness()
In fgLocalVarLivenessInit

Local V02 should not be enregistered because: it is a struct

Local V03 should not be enregistered because: it is a struct
Tracked variable (16 out of 20) table:
V03 tmp2          [struct]: refCnt =    8, refCntWtd =  16   
V02 tmp1          [struct]: refCnt =    5, refCntWtd =  10   
V00 this          [ byref]: refCnt =    3, refCntWtd =   3   
V05 tmp4          [  bool]: refCnt =    3, refCntWtd =   2   
V08 tmp7          [ float]: refCnt =    3, refCntWtd =   3   
V09 tmp8          [ float]: refCnt =    3, refCntWtd =   3   
V10 tmp9          [ float]: refCnt =    3, refCntWtd =   3   
V11 tmp10         [ float]: refCnt =    3, refCntWtd =   3   
V12 tmp11         [ float]: refCnt =    2, refCntWtd =   2   
V16 tmp15         [ float]: refCnt =    2, refCntWtd =   2   
V15 tmp14         [ float]: refCnt =    2, refCntWtd =   1.50
V19 tmp18         [ float]: refCnt =    2, refCntWtd =   1.50
V13 tmp12         [ float]: refCnt =    2, refCntWtd =   1.25
V14 tmp13         [ float]: refCnt =    2, refCntWtd =   1.25
V17 tmp16         [ float]: refCnt =    2, refCntWtd =   1.25
V18 tmp17         [ float]: refCnt =    2, refCntWtd =   1.25

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(2)={V03     V00                                                } + ByrefExposed + GcHeap
     DEF(14)={V03 V02     V08 V09 V10 V11 V12 V16 V15 V19 V13 V14 V17 V18}

BB02 USE(2)={V13 V17}
     DEF(0)={       }

BB03 USE(2)={V14 V18}
     DEF(0)={       }

BB04 USE(2)={    V15 V19}
     DEF(1)={V05        }

BB05 USE(0)={   }
     DEF(1)={V05}

BB06 USE(1)={V05}
     DEF(0)={   }

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (2)={V03 V00                        } + ByrefExposed + GcHeap
     OUT(6)={        V15 V19 V13 V14 V17 V18}

BB02 IN (6)={V15 V19 V13 V14 V17 V18}
     OUT(4)={V15 V19     V14     V18}

BB03 IN (4)={V15 V19 V14 V18}
     OUT(2)={V15 V19        }

BB04 IN (2)={    V15 V19}
     OUT(1)={V05        }

BB05 IN (0)={   }
     OUT(1)={V05}

BB06 IN (1)={V05}
     OUT(0)={   }


Removing tree [000114] in BB01 as useless
N014 (  1,  3) [000114] -A------R---              *  ASG       float 
N013 (  1,  2) [000112] D------N----              +--*  LCL_VAR   float  V11 tmp10        
N012 (  1,  1) [000113] ------------              \--*  CNS_DBL   float  0.00000000000000000


Removing tree [000110] in BB01 as useless
N010 (  1,  3) [000110] -A------R---              *  ASG       float 
N009 (  1,  2) [000108] D------N----              +--*  LCL_VAR   float  V10 tmp9         
N008 (  1,  1) [000109] ------------              \--*  CNS_DBL   float  0.00000000000000000


Removing tree [000106] in BB01 as useless
N006 (  1,  3) [000106] -A------R---              *  ASG       float 
N005 (  1,  2) [000104] D------N----              +--*  LCL_VAR   float  V09 tmp8         
N004 (  1,  1) [000105] ------------              \--*  CNS_DBL   float  0.00000000000000000


Removing tree [000103] in BB01 as useless
N003 (  1,  3) [000103] -A------R---              *  ASG       float 
N002 (  1,  2) [000101] D------N----              +--*  LCL_VAR   float  V08 tmp7         
N001 (  1,  1) [000102] ------------              \--*  CNS_DBL   float  0.00000000000000000


fgComputeLife modified tree:
N007 (  0,  0) [000115] ------------              *  COMMA     void  
N005 (  0,  0) [000111] ------------              +--*  COMMA     void  
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void  
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void  
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void  
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void  
N006 (  0,  0) [000114] ------------              \--*  NOP       void  

*************** In optRemoveRedundantZeroInits()
*************** In SsaBuilder::InsertPhiFunctions()
Inserting phi functions:
Added PHI definition for V05 at start of BB06.
*************** In SsaBuilder::RenameVariables()

After fgSsaBuild:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy)
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use)

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void  
N005 (  0,  0) [000111] ------------              +--*  COMMA     void  
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void  
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void  
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void  
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void  
N006 (  0,  0) [000114] ------------              \--*  NOP       void  

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float 
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float 
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float 
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float 
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void  
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void  
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void  
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X]
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         u:1 (last use)
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y]
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         u:1 (last use)
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z]
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use)
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W]
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use)

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void  
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X]
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y]
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z]
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use)

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void  
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X]
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y]
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z]
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use)

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use)
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        u:1 (last use)

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use)
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use)

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use)
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use)

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool  
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3
N003 ( 10,  9) [000090] ------------              \--*  EQ        int   
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use)
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use)

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool  
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int   
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Build SSA representation
Trees after Build SSA representation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy)
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use)

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void  
N005 (  0,  0) [000111] ------------              +--*  COMMA     void  
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void  
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void  
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void  
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void  
N006 (  0,  0) [000114] ------------              \--*  NOP       void  

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float 
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float 
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float 
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float 
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void  
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void  
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void  
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X]
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         u:1 (last use)
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y]
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         u:1 (last use)
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z]
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use)
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W]
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use)

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void  
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X]
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y]
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z]
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use)

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void  
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X]
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y]
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z]
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use)

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use)
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        u:1 (last use)

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use)
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use)

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use)
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use)

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool  
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3
N003 ( 10,  9) [000090] ------------              \--*  EQ        int   
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use)
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use)

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool  
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int   
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Early Value Propagation
*************** In optEarlyProp()

After optEarlyProp:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy)
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use)

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void  
N005 (  0,  0) [000111] ------------              +--*  COMMA     void  
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void  
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void  
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void  
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void  
N006 (  0,  0) [000114] ------------              \--*  NOP       void  

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float 
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float 
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float 
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float 
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void  
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void  
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void  
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X]
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         u:1 (last use)
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y]
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         u:1 (last use)
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z]
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use)
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W]
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use)

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void  
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X]
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y]
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z]
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use)

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void  
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X]
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y]
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z]
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use)

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use)
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        u:1 (last use)

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use)
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use)

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use)
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use)

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool  
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3
N003 ( 10,  9) [000090] ------------              \--*  EQ        int   
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use)
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use)

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool  
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int   
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use)

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Early Value Propagation

*************** Starting PHASE Do value numbering

*************** In fgValueNumber()
Memory Initial Value in BB01 is: $100
The SSA definition for ByrefExposed (#1) at start of BB01 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB01 is $100 {InitVal($42)}

***** BB01, STMT00001(before)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy)
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use)

N001 [000000]   LCL_VAR   V00 this         u:1 (last use) => $80 {InitVal($40)}
N002 [000001]   IND       => <l:$1c1 {norm=$140 {140}, exc=$180 {NullPtrExc($80)}}, c:$1c0 {norm=$141 {141}, exc=$180 {NullPtrExc($80)}}>
Tree [000005] assigned VN to local var V02/1: new uniq $143 {143}
N004 [000005]   ASG       => $VN.Void

***** BB01, STMT00001(after)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

---------

***** BB01, STMT00005(before)
N007 (  0,  0) [000115] ------------              *  COMMA     void  
N005 (  0,  0) [000111] ------------              +--*  COMMA     void  
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void  
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void  
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void  
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void  
N006 (  0,  0) [000114] ------------              \--*  NOP       void  

N001 [000103]   NOP       => $200 {200}
N002 [000106]   NOP       => $201 {201}
N003 [000107]   COMMA     => $201 {201}
N004 [000110]   NOP       => $202 {202}
N005 [000111]   COMMA     => $202 {202}
N006 [000114]   NOP       => $203 {203}
N007 [000115]   COMMA     => $203 {203}

***** BB01, STMT00005(after)
N007 (  0,  0) [000115] ------------              *  COMMA     void   $203
N005 (  0,  0) [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0) [000114] ------------              \--*  NOP       void   $203

---------

***** BB01, STMT00007(before)
N003 (  1,  3) [000038] -A------R---              *  ASG       float 
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000

N001 [000036]   CNS_DBL   0.00000000000000000 => $240 {FltCns[0.000000]}
N002 [000037]   LCL_VAR   V08 tmp7         d:1 => $240 {FltCns[0.000000]}
N003 [000038]   ASG       => $240 {FltCns[0.000000]}

***** BB01, STMT00007(after)
N003 (  1,  3) [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

---------

***** BB01, STMT00008(before)
N003 (  1,  3) [000043] -A------R---              *  ASG       float 
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000

N001 [000041]   CNS_DBL   0.00000000000000000 => $240 {FltCns[0.000000]}
N002 [000042]   LCL_VAR   V09 tmp8         d:1 => $240 {FltCns[0.000000]}
N003 [000043]   ASG       => $240 {FltCns[0.000000]}

***** BB01, STMT00008(after)
N003 (  1,  3) [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

---------

***** BB01, STMT00009(before)
N003 (  1,  3) [000048] -A------R---              *  ASG       float 
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000

N001 [000046]   CNS_DBL   0.00000000000000000 => $240 {FltCns[0.000000]}
N002 [000047]   LCL_VAR   V10 tmp9         d:1 => $240 {FltCns[0.000000]}
N003 [000048]   ASG       => $240 {FltCns[0.000000]}

***** BB01, STMT00009(after)
N003 (  1,  3) [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

---------

***** BB01, STMT00010(before)
N003 (  1,  3) [000053] -A------R---              *  ASG       float 
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000

N001 [000051]   CNS_DBL   1.0000000000000000 => $241 {FltCns[1.000000]}
N002 [000052]   LCL_VAR   V11 tmp10        d:1 => $241 {FltCns[1.000000]}
N003 [000053]   ASG       => $241 {FltCns[1.000000]}

***** BB01, STMT00010(after)
N003 (  1,  3) [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

---------

***** BB01, STMT00002(before)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void  
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void  
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void  
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X]
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         u:1 (last use)
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y]
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         u:1 (last use)
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z]
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use)
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W]
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use)

N001 [000118]   LCL_VAR   V08 tmp7         u:1 (last use) => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapSelect($c0, $2c0):float returns $300 {$c0[$2c0]}
  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapSelect($c0, $2c0):float returns $300 {$c0[$2c0]}
N002 [000117]   LCL_FLD   V03 tmp2         ud:1->2[+0] Fseq[X] => $300 {$c0[$2c0]}
  VNApplySelectorsAssign:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapStore($c0, $2c0, $240):float returns $340 {$c0[$2c0 := $240]}
  VNApplySelectorsAssign:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapStore($c0, $2c0, $240):float returns $340 {$c0[$2c0 := $240]}
N002 [000117]   LCL_FLD   V03 tmp2         ud:1->2[+0] Fseq[X] => $340 {$c0[$2c0 := $240]}
N003 [000119]   ASG       => $240 {FltCns[0.000000]}
N004 [000123]   LCL_VAR   V09 tmp8         u:1 (last use) => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
      AX2: $2c1 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c1) ==> select($c0, $2c1).
    VNForMapSelect($340, $2c1):float returns $301 {$c0[$2c1]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
      AX2: $2c1 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c1) ==> select($c0, $2c1).
    VNForMapSelect($340, $2c1):float returns $301 {$c0[$2c1]}
N005 [000122]   LCL_FLD   V03 tmp2         ud:2->3[+4] Fseq[Y] => $301 {$c0[$2c1]}
  VNApplySelectorsAssign:
    VNForHandle(Y) is $2c1, fieldType is float
    VNForMapStore($340, $2c1, $240):float returns $341 {$340[$2c1 := $240]}
  VNApplySelectorsAssign:
    VNForHandle(Y) is $2c1, fieldType is float
    VNForMapStore($340, $2c1, $240):float returns $341 {$340[$2c1 := $240]}
N005 [000122]   LCL_FLD   V03 tmp2         ud:2->3[+4] Fseq[Y] => $341 {$340[$2c1 := $240]}
N006 [000124]   ASG       => $240 {FltCns[0.000000]}
N007 [000125]   COMMA     => $240 {FltCns[0.000000]}
N008 [000129]   LCL_VAR   V10 tmp9         u:1 (last use) => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
      AX2: $2c2 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c2) ==> select($340, $2c2).
      AX2: $2c2 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c2) ==> select($c0, $2c2).
    VNForMapSelect($341, $2c2):float returns $302 {$c0[$2c2]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
      AX2: $2c2 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c2) ==> select($340, $2c2).
      AX2: $2c2 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c2) ==> select($c0, $2c2).
    VNForMapSelect($341, $2c2):float returns $302 {$c0[$2c2]}
N009 [000128]   LCL_FLD   V03 tmp2         ud:3->4[+8] Fseq[Z] => $302 {$c0[$2c2]}
  VNApplySelectorsAssign:
    VNForHandle(Z) is $2c2, fieldType is float
    VNForMapStore($341, $2c2, $240):float returns $342 {$341[$2c2 := $240]}
  VNApplySelectorsAssign:
    VNForHandle(Z) is $2c2, fieldType is float
    VNForMapStore($341, $2c2, $240):float returns $342 {$341[$2c2 := $240]}
N009 [000128]   LCL_FLD   V03 tmp2         ud:3->4[+8] Fseq[Z] => $342 {$341[$2c2 := $240]}
N010 [000130]   ASG       => $240 {FltCns[0.000000]}
N011 [000131]   COMMA     => $240 {FltCns[0.000000]}
N012 [000135]   LCL_VAR   V11 tmp10        u:1 (last use) => $241 {FltCns[1.000000]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
      AX2: $2c3 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c3) ==> select($341, $2c3).
      AX2: $2c3 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c3) ==> select($340, $2c3).
      AX2: $2c3 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c3) ==> select($c0, $2c3).
    VNForMapSelect($342, $2c3):float returns $303 {$c0[$2c3]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
      AX2: $2c3 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c3) ==> select($341, $2c3).
      AX2: $2c3 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c3) ==> select($340, $2c3).
      AX2: $2c3 != $2c0 ==> select([$340]store($c0, $2c0, $240), $2c3) ==> select($c0, $2c3).
    VNForMapSelect($342, $2c3):float returns $303 {$c0[$2c3]}
N013 [000134]   LCL_FLD   V03 tmp2         ud:4->5[+12] Fseq[W] => $303 {$c0[$2c3]}
  VNApplySelectorsAssign:
    VNForHandle(W) is $2c3, fieldType is float
    VNForMapStore($342, $2c3, $241):float returns $343 {$342[$2c3 := $241]}
  VNApplySelectorsAssign:
    VNForHandle(W) is $2c3, fieldType is float
    VNForMapStore($342, $2c3, $241):float returns $343 {$342[$2c3 := $241]}
N013 [000134]   LCL_FLD   V03 tmp2         ud:4->5[+12] Fseq[W] => $343 {$342[$2c3 := $241]}
N014 [000136]   ASG       => $241 {FltCns[1.000000]}
N015 [000137]   COMMA     => $241 {FltCns[1.000000]}

***** BB01, STMT00002(after)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V08 tmp7         u:1 (last use) $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241

---------

***** BB01, STMT00016(before)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void  
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X]
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y]
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z]
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use)

  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapSelect($143, $2c0):float returns $304 {$143[$2c0]}
  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
    VNForMapSelect($143, $2c0):float returns $304 {$143[$2c0]}
N001 [000140]   LCL_FLD   V02 tmp1         u:1[+0] Fseq[X] => $304 {$143[$2c0]}
N002 [000139]   LCL_VAR   V12 tmp11        d:1 => $304 {$143[$2c0]}
N003 [000141]   ASG       => $304 {$143[$2c0]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
    VNForMapSelect($143, $2c1):float returns $305 {$143[$2c1]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
    VNForMapSelect($143, $2c1):float returns $305 {$143[$2c1]}
N004 [000145]   LCL_FLD   V02 tmp1         u:1[+4] Fseq[Y] => $305 {$143[$2c1]}
N005 [000142]   LCL_VAR   V13 tmp12        d:1 => $305 {$143[$2c1]}
N006 [000146]   ASG       => $305 {$143[$2c1]}
N007 [000147]   COMMA     => $305 {$143[$2c1]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
    VNForMapSelect($143, $2c2):float returns $306 {$143[$2c2]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
    VNForMapSelect($143, $2c2):float returns $306 {$143[$2c2]}
N008 [000151]   LCL_FLD   V02 tmp1         u:1[+8] Fseq[Z] => $306 {$143[$2c2]}
N009 [000148]   LCL_VAR   V14 tmp13        d:1 => $306 {$143[$2c2]}
N010 [000152]   ASG       => $306 {$143[$2c2]}
N011 [000153]   COMMA     => $306 {$143[$2c2]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
    VNForMapSelect($143, $2c3):float returns $307 {$143[$2c3]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
    VNForMapSelect($143, $2c3):float returns $307 {$143[$2c3]}
N012 [000157]   LCL_FLD   V02 tmp1         u:1[+12] Fseq[W] (last use) => $307 {$143[$2c3]}
N013 [000154]   LCL_VAR   V15 tmp14        d:1 => $307 {$143[$2c3]}
N014 [000158]   ASG       => $307 {$143[$2c3]}
N015 [000159]   COMMA     => $307 {$143[$2c3]}

***** BB01, STMT00016(after)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

---------

***** BB01, STMT00017(before)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void  
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void  
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void  
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float 
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X]
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float 
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y]
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float 
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z]
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float 
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use)

  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
      AX2: $2c0 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c0) ==> select($342, $2c0).
      AX2: $2c0 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c0) ==> select($341, $2c0).
      AX2: $2c0 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c0) ==> select($340, $2c0).
      AX1: select([$c0]store($340, $2c0, $240), $2c0) ==> $240.
    VNForMapSelect($343, $2c0):float returns $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(X) is $2c0, fieldType is float
      AX2: $2c0 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c0) ==> select($342, $2c0).
      AX2: $2c0 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c0) ==> select($341, $2c0).
      AX2: $2c0 != $2c1 ==> select([$341]store($340, $2c1, $240), $2c0) ==> select($340, $2c0).
      AX1: select([$c0]store($340, $2c0, $240), $2c0) ==> $240.
    VNForMapSelect($343, $2c0):float returns $240 {FltCns[0.000000]}
N001 [000162]   LCL_FLD   V03 tmp2         u:5[+0] Fseq[X] => $240 {FltCns[0.000000]}
N002 [000161]   LCL_VAR   V16 tmp15        d:1 => $240 {FltCns[0.000000]}
N003 [000163]   ASG       => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
      AX2: $2c1 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c1) ==> select($342, $2c1).
      AX2: $2c1 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c1) ==> select($341, $2c1).
      AX1: select([$340]store($341, $2c1, $240), $2c1) ==> $240.
    VNForMapSelect($343, $2c1):float returns $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Y) is $2c1, fieldType is float
      AX2: $2c1 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c1) ==> select($342, $2c1).
      AX2: $2c1 != $2c2 ==> select([$342]store($341, $2c2, $240), $2c1) ==> select($341, $2c1).
      AX1: select([$340]store($341, $2c1, $240), $2c1) ==> $240.
    VNForMapSelect($343, $2c1):float returns $240 {FltCns[0.000000]}
N004 [000167]   LCL_FLD   V03 tmp2         u:5[+4] Fseq[Y] => $240 {FltCns[0.000000]}
N005 [000164]   LCL_VAR   V17 tmp16        d:1 => $240 {FltCns[0.000000]}
N006 [000168]   ASG       => $240 {FltCns[0.000000]}
N007 [000169]   COMMA     => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
      AX2: $2c2 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c2) ==> select($342, $2c2).
      AX1: select([$341]store($342, $2c2, $240), $2c2) ==> $240.
    VNForMapSelect($343, $2c2):float returns $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(Z) is $2c2, fieldType is float
      AX2: $2c2 != $2c3 ==> select([$343]store($342, $2c3, $241), $2c2) ==> select($342, $2c2).
      AX1: select([$341]store($342, $2c2, $240), $2c2) ==> $240.
    VNForMapSelect($343, $2c2):float returns $240 {FltCns[0.000000]}
N008 [000173]   LCL_FLD   V03 tmp2         u:5[+8] Fseq[Z] => $240 {FltCns[0.000000]}
N009 [000170]   LCL_VAR   V18 tmp17        d:1 => $240 {FltCns[0.000000]}
N010 [000174]   ASG       => $240 {FltCns[0.000000]}
N011 [000175]   COMMA     => $240 {FltCns[0.000000]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
      AX1: select([$342]store($343, $2c3, $241), $2c3) ==> $241.
    VNForMapSelect($343, $2c3):float returns $241 {FltCns[1.000000]}
  VNApplySelectors:
    VNForHandle(W) is $2c3, fieldType is float
      AX1: select([$342]store($343, $2c3, $241), $2c3) ==> $241.
    VNForMapSelect($343, $2c3):float returns $241 {FltCns[1.000000]}
N012 [000179]   LCL_FLD   V03 tmp2         u:5[+12] Fseq[W] (last use) => $241 {FltCns[1.000000]}
N013 [000176]   LCL_VAR   V19 tmp18        d:1 => $241 {FltCns[1.000000]}
N014 [000180]   ASG       => $241 {FltCns[1.000000]}
N015 [000181]   COMMA     => $241 {FltCns[1.000000]}

***** BB01, STMT00017(after)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void   $241
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void   $240
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void   $240
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

---------

***** BB01, STMT00011(before)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use)
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        u:1 (last use)

N001 [000057]   LCL_VAR   V12 tmp11        u:1 (last use) => $304 {$143[$2c0]}
N002 [000060]   LCL_VAR   V16 tmp15        u:1 (last use) => $240 {FltCns[0.000000]}
N003 [000061]   NE        => $380 {NE($304, $240)}

***** BB01, STMT00011(after)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V16 tmp15        u:1 (last use) $240

finish(BB01).
   Succ(BB02).
     Not yet completed.
     All preds complete, adding to allDone.
   Succ(BB05).
     Not yet completed.
     Not all preds complete  Adding to notallDone, if necessary...
       Was necessary.
The SSA definition for ByrefExposed (#1) at start of BB02 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB02 is $100 {InitVal($42)}

***** BB02, STMT00013(before)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use)
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use)

N001 [000070]   LCL_VAR   V13 tmp12        u:1 (last use) => $305 {$143[$2c1]}
N002 [000073]   LCL_VAR   V17 tmp16        u:1 (last use) => $240 {FltCns[0.000000]}
N003 [000074]   NE        => $381 {NE($305, $240)}

***** BB02, STMT00013(after)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use) $240

finish(BB02).
   Succ(BB03).
     Not yet completed.
     All preds complete, adding to allDone.
   Succ(BB05).
     Not yet completed.
     Not all preds complete  Adding to notallDone, if necessary...
The SSA definition for ByrefExposed (#1) at start of BB03 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB03 is $100 {InitVal($42)}

***** BB03, STMT00014(before)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int   
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use)
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use)

N001 [000078]   LCL_VAR   V14 tmp13        u:1 (last use) => $306 {$143[$2c2]}
N002 [000081]   LCL_VAR   V18 tmp17        u:1 (last use) => $240 {FltCns[0.000000]}
N003 [000082]   NE        => $382 {NE($306, $240)}

***** BB03, STMT00014(after)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

finish(BB03).
   Succ(BB04).
     Not yet completed.
     All preds complete, adding to allDone.
   Succ(BB05).
     Not yet completed.
     All preds complete, adding to allDone.
The SSA definition for ByrefExposed (#1) at start of BB05 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB05 is $100 {InitVal($42)}

***** BB05, STMT00012(before)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool  
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0

N001 [000063]   CNS_INT   0 => $40 {IntCns 0}
N002 [000065]   LCL_VAR   V05 tmp4         d:2 => $40 {IntCns 0}
N003 [000066]   ASG       => $40 {IntCns 0}

***** BB05, STMT00012(after)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0 $40

finish(BB05).
   Succ(BB06).
     Not yet completed.
     Not all preds complete  Adding to notallDone, if necessary...
       Was necessary.
The SSA definition for ByrefExposed (#1) at start of BB04 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB04 is $100 {InitVal($42)}

***** BB04, STMT00015(before)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool  
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3
N003 ( 10,  9) [000090] ------------              \--*  EQ        int   
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use)
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use)

N001 [000086]   LCL_VAR   V15 tmp14        u:1 (last use) => $307 {$143[$2c3]}
N002 [000089]   LCL_VAR   V19 tmp18        u:1 (last use) => $241 {FltCns[1.000000]}
N003 [000090]   EQ        => $383 {EQ($307, $241)}
N004 [000091]   LCL_VAR   V05 tmp4         d:3 => $383 {EQ($307, $241)}
N005 [000092]   ASG       => $383 {EQ($307, $241)}

***** BB04, STMT00015(after)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use) $241

finish(BB04).
   Succ(BB06).
     Not yet completed.
     All preds complete, adding to allDone.
SSA PHI definition: set VN of local 5/1 to $440 {PhiDef($5, $1, $400)} .
The SSA definition for ByrefExposed (#1) at start of BB06 is $100 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB06 is $100 {InitVal($42)}

***** BB06, STMT00004(before)
N002 (  5,  4) [000018] ------------              *  RETURN    int   
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use)

N001 [000093]   LCL_VAR   V05 tmp4         u:1 (last use) => $440 {PhiDef($5, $1, $400)}
N002 [000018]   RETURN    => $3c2 {3c2}

***** BB06, STMT00004(after)
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

finish(BB06).

*************** Finishing PHASE Do value numbering

*************** Starting PHASE Hoist loop code

*************** Finishing PHASE Hoist loop code

*************** Starting PHASE VN based copy prop
*************** In optVnCopyProp()
Copy Assertion for BB01
  curSsaName stack: { }

							Live vars: {V00 V03} => {V03}
							Live vars: {V03} => {V02 V03}
							Live vars: {V02 V03} => {V02 V03 V08}
							Live vars: {V02 V03 V08} => {V02 V03 V08 V09}
							Live vars: {V02 V03 V08 V09} => {V02 V03 V08 V09 V10}
							Live vars: {V02 V03 V08 V09 V10} => {V02 V03 V08 V09 V10 V11}
							Live vars: {V02 V03 V08 V09 V10 V11} => {V02 V03 V09 V10 V11}
VN based copy assertion for [000118] V08 @00000240 by [000042] V09 @00000240.
N001 (  1,  2) [000118] ------------              *  LCL_VAR   float  V08 tmp7         u:1 (last use) $240
copy propagated to:
N001 (  1,  2) [000118] ------------              *  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
							Live vars: {V02 V03 V09 V10 V11} => {V02 V03 V10 V11}
VN based copy assertion for [000123] V09 @00000240 by [000047] V10 @00000240.
N004 (  1,  2) [000123] ------------              *  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
copy propagated to:
N004 (  1,  2) [000123] ------------              *  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
							Live vars: {V02 V03 V10 V11} => {V02 V03 V11}
							Live vars: {V02 V03 V11} => {V02 V03}
							Live vars: {V02 V03} => {V02 V03 V12}
							Live vars: {V02 V03 V12} => {V02 V03 V12 V13}
							Live vars: {V02 V03 V12 V13} => {V02 V03 V12 V13 V14}
							Live vars: {V02 V03 V12 V13 V14} => {V03 V12 V13 V14}
							Live vars: {V03 V12 V13 V14} => {V03 V12 V13 V14 V15}
							Live vars: {V03 V12 V13 V14 V15} => {V03 V12 V13 V14 V15 V16}
							Live vars: {V03 V12 V13 V14 V15 V16} => {V03 V12 V13 V14 V15 V16 V17}
							Live vars: {V03 V12 V13 V14 V15 V16 V17} => {V03 V12 V13 V14 V15 V16 V17 V18}
							Live vars: {V03 V12 V13 V14 V15 V16 V17 V18} => {V12 V13 V14 V15 V16 V17 V18}
							Live vars: {V12 V13 V14 V15 V16 V17 V18} => {V12 V13 V14 V15 V16 V17 V18 V19}
							Live vars: {V12 V13 V14 V15 V16 V17 V18 V19} => {V13 V14 V15 V16 V17 V18 V19}
							Live vars: {V13 V14 V15 V16 V17 V18 V19} => {V13 V14 V15 V17 V18 V19}
VN based copy assertion for [000060] V16 @00000240 by [000164] V17 @00000240.
N002 (  3,  4) [000060] ------------              *  LCL_VAR   float  V16 tmp15        u:1 (last use) $240
copy propagated to:
N002 (  3,  4) [000060] ------------              *  LCL_VAR   float  V17 tmp16        u:1 (last use) $240
Copy Assertion for BB06
  curSsaName stack: { 0-[000000]:V00 2-[000003]:V02 3-[000134]:V03 8-[000037]:V08 9-[000042]:V09 10-[000047]:V10 11-[000052]:V11 12-[000139]:V12 13-[000142]:V13 14-[000148]:V14 15-[000154]:V15 16-[000161]:V16 17-[000164]:V17 18-[000170]:V18 19-[000176]:V19 }

							Live vars: {V05} => {}
Copy Assertion for BB05
  curSsaName stack: { 0-[000000]:V00 2-[000003]:V02 3-[000134]:V03 8-[000037]:V08 9-[000042]:V09 10-[000047]:V10 11-[000052]:V11 12-[000139]:V12 13-[000142]:V13 14-[000148]:V14 15-[000154]:V15 16-[000161]:V16 17-[000164]:V17 18-[000170]:V18 19-[000176]:V19 }

							Live vars: {} => {V05}
Copy Assertion for BB02
  curSsaName stack: { 0-[000000]:V00 2-[000003]:V02 3-[000134]:V03 8-[000037]:V08 9-[000042]:V09 10-[000047]:V10 11-[000052]:V11 12-[000139]:V12 13-[000142]:V13 14-[000148]:V14 15-[000154]:V15 16-[000161]:V16 17-[000164]:V17 18-[000170]:V18 19-[000176]:V19 }

							Live vars: {V13 V14 V15 V17 V18 V19} => {V14 V15 V17 V18 V19}
							Live vars: {V14 V15 V17 V18 V19} => {V14 V15 V18 V19}
VN based copy assertion for [000073] V17 @00000240 by [000170] V18 @00000240.
N002 (  3,  4) [000073] ------------              *  LCL_VAR   float  V17 tmp16        u:1 (last use) $240
copy propagated to:
N002 (  3,  4) [000073] ------------              *  LCL_VAR   float  V18 tmp17        u:1 (last use) $240
Copy Assertion for BB03
  curSsaName stack: { 0-[000000]:V00 2-[000003]:V02 3-[000134]:V03 8-[000037]:V08 9-[000042]:V09 10-[000047]:V10 11-[000052]:V11 12-[000139]:V12 13-[000142]:V13 14-[000148]:V14 15-[000154]:V15 16-[000161]:V16 17-[000164]:V17 18-[000170]:V18 19-[000176]:V19 }

							Live vars: {V14 V15 V18 V19} => {V15 V18 V19}
							Live vars: {V15 V18 V19} => {V15 V19}
Copy Assertion for BB04
  curSsaName stack: { 0-[000000]:V00 2-[000003]:V02 3-[000134]:V03 8-[000037]:V08 9-[000042]:V09 10-[000047]:V10 11-[000052]:V11 12-[000139]:V12 13-[000142]:V13 14-[000148]:V14 15-[000154]:V15 16-[000161]:V16 17-[000164]:V17 18-[000170]:V18 19-[000176]:V19 }

							Live vars: {V15 V19} => {V19}
							Live vars: {V19} => {}
							Live vars: {} => {V05}

*************** Finishing PHASE VN based copy prop

*************** Starting PHASE Redundant branch opts

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Redundant branch opts [no changes]

*************** Starting PHASE Optimize Valnum CSEs

*************** In optOptimizeCSEs()
Blocks/Trees at start of optOptimizeCSE phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void   $203
N005 (  0,  0) [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0) [000114] ------------              \--*  NOP       void   $203

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36) [000181] -A----------              *  COMMA     void   $241
N011 ( 21, 27) [000175] -A----------              +--*  COMMA     void   $240
N007 ( 14, 18) [000169] -A----------              |  +--*  COMMA     void   $240
N003 (  7,  9) [000163] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N001 (  3,  4) [000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N006 (  7,  9) [000168] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) [000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9) [000174] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) [000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N014 (  7,  9) [000180] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use) $240

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use) $241

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0 $40

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2 $40

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

-------------------------------------------------------------------------------------------------------------------

*************** In optOptimizeValnumCSEs()

CSE candidate #01, key=$240 in BB01, [cost= 3, size= 4]: 
N004 (  3,  4) CSE #01 (use)[000167] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

Blocks that generate CSE def/uses
BB01 cseGen = 0000000000000003

Performing DataFlow for ValnumCSE's
StartMerge BB01
  :: cseOut    = 0000000000000007
EndMerge BB01
  :: cseIn     = 0000000000000000
  :: cseGen    = 0000000000000003
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB02
  :: cseOut    = 0000000000000007
Merge BB02 and BB01
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
EndMerge BB02
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB05
  :: cseOut    = 0000000000000007
Merge BB05 and BB01
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
Merge BB05 and BB02
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
Merge BB05 and BB03
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
EndMerge BB05
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB03
  :: cseOut    = 0000000000000007
Merge BB03 and BB02
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
EndMerge BB03
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB05
  :: cseOut    = 0000000000000003
Merge BB05 and BB01
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
Merge BB05 and BB02
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
Merge BB05 and BB03
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
EndMerge BB05
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000003, => false
StartMerge BB06
  :: cseOut    = 0000000000000007
Merge BB06 and BB04
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000007
Merge BB06 and BB05
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
EndMerge BB06
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB04
  :: cseOut    = 0000000000000007
Merge BB04 and BB03
  :: cseIn     = 0000000000000007
  :: cseOut    = 0000000000000007
  => cseIn     = 0000000000000003
EndMerge BB04
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000007, => true
StartMerge BB05
  :: cseOut    = 0000000000000003
Merge BB05 and BB01
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
Merge BB05 and BB02
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
Merge BB05 and BB03
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
EndMerge BB05
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000003, => false
StartMerge BB06
  :: cseOut    = 0000000000000003
Merge BB06 and BB04
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
Merge BB06 and BB05
  :: cseIn     = 0000000000000003
  :: cseOut    = 0000000000000003
  => cseIn     = 0000000000000003
EndMerge BB06
  :: cseIn     = 0000000000000003
  :: cseGen    = 0000000000000000
  => cseOut    = 0000000000000003
  != preMerge  = 0000000000000003, => false

After performing DataFlow for ValnumCSE's
BB01 cseIn  = 0000000000000000, cseGen = 0000000000000003, cseOut = 0000000000000003
BB02 cseIn  = 0000000000000003, cseGen = 0000000000000000, cseOut = 0000000000000003
BB03 cseIn  = 0000000000000003, cseGen = 0000000000000000, cseOut = 0000000000000003
BB04 cseIn  = 0000000000000003, cseGen = 0000000000000000, cseOut = 0000000000000003
BB05 cseIn  = 0000000000000003, cseGen = 0000000000000000, cseOut = 0000000000000003
BB06 cseIn  = 0000000000000003, cseGen = 0000000000000000, cseOut = 0000000000000003

Labeling the CSEs with Use/Def information
BB01 [000162] Def of CSE #01 [weight=1   ]
BB01 [000167] Use of CSE #01 [weight=1   ]
BB01 [000173] Use of CSE #01 [weight=1   ]

************ Trees at start of optValnumCSE_Heuristic()

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5)              [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2)              [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2)              [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1)              [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0)              [000115] ------------              *  COMMA     void   $203
N005 (  0,  0)              [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0)              [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0)              [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0)              [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0)              [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0)              [000114] ------------              \--*  NOP       void   $203

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3)              [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2)              [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1)              [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3)              [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2)              [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1)              [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3)              [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2)              [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1)              [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3)              [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2)              [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1)              [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28)              [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21)              [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14)              [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7)              [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4)              [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  2)              [000118] ------------              |  |  |  \--*  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
N006 (  5,  7)              [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4)              [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  2)              [000123] ------------              |  |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N010 (  5,  7)              [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2)              [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7)              [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4)              [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2)              [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36)              [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27)              [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18)              [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9)              [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4)              [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4)              [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9)              [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4)              [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4)              [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9)              [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4)              [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4)              [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9)              [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4)              [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4)              [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

***** BB01
STMT00017 (IL   ???...  ???)
N015 ( 28, 36)              [000181] -A----------              *  COMMA     void   $241
N011 ( 21, 27)              [000175] -A----------              +--*  COMMA     void   $240
N007 ( 14, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N001 (  3,  4) CSE #01 (def)[000162] ------------              |  |  |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N006 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N014 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N013 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11)              [000062] ------------              *  JTRUE     void  
N003 (  7,  9)              [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4)              [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  3,  4)              [000060] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use) $240

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11)              [000075] ------------              *  JTRUE     void  
N003 (  7,  9)              [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4)              [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  3,  4)              [000073] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11)              [000083] ------------              *  JTRUE     void  
N003 (  7,  9)              [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4)              [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  3,  4)              [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12)              [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2)              [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9)              [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4)              [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  3,  4)              [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use) $241

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4)              [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2)              [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1)              [000063] ------------              \--*  CNS_INT   int    0 $40

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0)              [000184] -A------R---              *  ASG       bool  
N004 (  0,  0)              [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0)              [000183] ------------              \--*  PHI       bool  
N001 (  0,  0)              [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0)              [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2 $40

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4)              [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3)              [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

-------------------------------------------------------------------------------------------------------------------


Aggressive CSE Promotion cutoff is 200.000000
Moderate CSE Promotion cutoff is 100.000000
enregCount is 2
Framesize estimate is 0x0020
We have a small frame

Sorted CSE candidates:
CSE #01, {$240, $4  } useCnt=2: [def=100.000000, use=200.000000, cost=  3      ]
        :: N001 (  3,  4) CSE #01 (def)[000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240


Considering CSE #01 {$240, $4  } [def=100.000000, use=200.000000, cost=  3      ]
CSE Expression : 
N001 (  3,  4) CSE #01 (def)[000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

Aggressive CSE Promotion (400.000000 >= 200.000000)
cseRefCnt=400.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000
defCnt=100.000000, useCnt=200.000000, cost=3, size=4
def_cost=1, use_cost=1, extra_no_cost=12, extra_yes_cost=0
CSE cost savings check (612.000000 >= 300.000000) passes

Promoting CSE:

lvaGrabTemp returning 20 (V20 rat0) (a long lifetime temp) called for CSE - aggressive.
CSE #01 is single-def, so associated CSE temp V20 will be in SSA
New refCnts for V20: refCnt =  2, refCntWtd = 2   
New refCnts for V20: refCnt =  3, refCntWtd = 3   
New refCnts for V20: refCnt =  4, refCntWtd = 4   

CSE #01 def at [000162] replaced in BB01 with def of V20

fgMorphTree (before 70):
N015 ( 28, 36)              [000181] -A----------              *  COMMA     void   $241
N011 ( 21, 27)              [000175] -A----------              +--*  COMMA     void   $240
N007 ( 14, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  |  |  \--*  COMMA     float  $240
                            [000188] -A----------              |  |  |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N014 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N013 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 71):
N011 ( 21, 27)              [000175] -A----------              *  COMMA     void   $240
N007 ( 14, 18)              [000169] -A----------              +--*  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  |  \--*  COMMA     float  $240
                            [000188] -A----------              |  |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              |  \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 72):
N007 ( 14, 18)              [000169] -A----------              *  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  \--*  COMMA     float  $240
                            [000188] -A----------              |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (before 73):
N003 (  7,  9)              [000163] -A------R---              *  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              \--*  COMMA     float  $240
                            [000188] -A----------                 +--*  ASG       float  $VN.Void
                            [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 74):
N002 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (after 74):
N002 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (before 75):
                            [000190] -A----------              *  COMMA     float  $240
                            [000188] -A----------              +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 76):
                            [000188] -A----------              *  ASG       float  $VN.Void
                            [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 77):
                            [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (after 77):
                            [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (before 78):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 78):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 76):
                            [000188] -A----------              *  ASG       float  $VN.Void
                            [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 79):
                            [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 79):
                            [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 75):
                            [000190] -A----------              *  COMMA     float  $240
                            [000188] -A----------              +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 73):
N003 (  7,  9)              [000163] -A------R---              *  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              \--*  COMMA     float  $240
                            [000188] -A----------                 +--*  ASG       float  $VN.Void
                            [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 80):
N006 (  7,  9)              [000168] -A------R---              *  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (before 81):
N005 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (after 81):
N005 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (before 82):
N004 (  3,  4) CSE #01 (use)[000167] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (after 82):
N004 (  3,  4) CSE #01 (use)[000167] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (after 80):
N006 (  7,  9)              [000168] -A------R---              *  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (after 72):
N007 ( 14, 18)              [000169] -A----------              *  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  \--*  COMMA     float  $240
                            [000188] -A----------              |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240

fgMorphTree (before 83):
N010 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 84):
N009 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (after 84):
N009 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (before 85):
N008 (  3,  4) CSE #01 (use)[000173] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 85):
N008 (  3,  4) CSE #01 (use)[000173] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 83):
N010 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 71):
N011 ( 21, 27)              [000175] -A----------              *  COMMA     void   $240
N007 ( 14, 18)              [000169] -A----------              +--*  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  |  \--*  COMMA     float  $240
                            [000188] -A----------              |  |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              |  \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 86):
N014 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N013 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 87):
N013 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (after 87):
N013 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (before 88):
N012 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 88):
N012 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 86):
N014 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N013 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 70):
N015 ( 28, 36)              [000181] -A----------              *  COMMA     void   $241
N011 ( 21, 27)              [000175] -A----------              +--*  COMMA     void   $240
N007 ( 14, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N003 (  7,  9)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
                            [000190] -A----------              |  |  |  \--*  COMMA     float  $240
                            [000188] -A----------              |  |  |     +--*  ASG       float  $VN.Void
                            [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                            [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N006 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N004 (  3,  4) CSE #01 (use)[000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N010 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N008 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N014 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N013 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N012 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
optValnumCSE morphed tree:
N019 ( 29, 38)              [000181] -A----------              *  COMMA     void   $241
N015 ( 22, 29)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 15, 20)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  3,  4) CSE #01 (use)[000167] ------------              |  |     \--*  LCL_FLD   float  V03 tmp2         u:5[+4] Fseq[Y] $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241


Working on the replacement of the CSE #01 use at [000167] in BB01

fgMorphTree (before 89):
N019 ( 29, 38)              [000181] -A----------              *  COMMA     void   $241
N015 ( 22, 29)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 15, 20)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 90):
N015 ( 22, 29)              [000175] -A----------              *  COMMA     void   $240
N011 ( 15, 20)              [000169] -A----------              +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 91):
N011 ( 15, 20)              [000169] -A----------              *  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 92):
N007 (  8, 11)              [000163] -A------R---              *  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---                 +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 93):
N006 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (after 93):
N006 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (before 94):
N005 (  4,  6)              [000190] -A----------              *  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 95):
N003 (  3,  4)              [000188] -A------R---              *  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 96):
N002 (  1,  2)              [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (after 96):
N002 (  1,  2)              [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (before 97):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 97):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 95):
N003 (  3,  4)              [000188] -A------R---              *  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 98):
N004 (  1,  2)              [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 98):
N004 (  1,  2)              [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 94):
N005 (  4,  6)              [000190] -A----------              *  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 92):
N007 (  8, 11)              [000163] -A------R---              *  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---                 +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 99):
N010 (  7,  9)              [000168] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 100):
N009 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (after 100):
N009 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (before 101):
                            [000191] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 101):
                            [000191] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 99):
N010 (  7,  9)              [000168] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 91):
N011 ( 15, 20)              [000169] -A----------              *  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 102):
N014 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 103):
N013 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (after 103):
N013 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (before 104):
N012 (  3,  4) CSE #01 (use)[000173] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 104):
N012 (  3,  4) CSE #01 (use)[000173] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 102):
N014 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (after 90):
N015 ( 22, 29)              [000175] -A----------              *  COMMA     void   $240
N011 ( 15, 20)              [000169] -A----------              +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240

fgMorphTree (before 105):
N018 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N017 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 106):
N017 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (after 106):
N017 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (before 107):
N016 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 107):
N016 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 105):
N018 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N017 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 89):
N019 ( 29, 38)              [000181] -A----------              *  COMMA     void   $241
N015 ( 22, 29)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 15, 20)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  7,  9)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
                            [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
optValnumCSE morphed tree:
N019 ( 27, 36)              [000181] -A----------              *  COMMA     void   $241
N015 ( 20, 27)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  3,  4) CSE #01 (use)[000173] ------------              |     \--*  LCL_FLD   float  V03 tmp2         u:5[+8] Fseq[Z] $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241


Working on the replacement of the CSE #01 use at [000173] in BB01

fgMorphTree (before 108):
N019 ( 27, 36)              [000181] -A----------              *  COMMA     void   $241
N015 ( 20, 27)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 109):
N015 ( 20, 27)              [000175] -A----------              *  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 110):
N011 ( 13, 18)              [000169] -A----------              *  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 111):
N007 (  8, 11)              [000163] -A------R---              *  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---                 +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 112):
N006 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (after 112):
N006 (  3,  4)              [000161] D------N----              *  LCL_VAR   float  V16 tmp15        d:1 $240

fgMorphTree (before 113):
N005 (  4,  6)              [000190] -A----------              *  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 114):
N003 (  3,  4)              [000188] -A------R---              *  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 115):
N002 (  1,  2)              [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (after 115):
N002 (  1,  2)              [000187] D------N----              *  LCL_VAR   float  V20 cse0         d:1 $240

fgMorphTree (before 116):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 116):
N001 (  3,  4)              [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (after 114):
N003 (  3,  4)              [000188] -A------R---              *  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240

fgMorphTree (before 117):
N004 (  1,  2)              [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 117):
N004 (  1,  2)              [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 113):
N005 (  4,  6)              [000190] -A----------              *  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 111):
N007 (  8, 11)              [000163] -A------R---              *  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---                 +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----                 |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------                 |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 118):
N010 (  5,  7)              [000168] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 119):
N009 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (after 119):
N009 (  3,  4)              [000164] D------N----              *  LCL_VAR   float  V17 tmp16        d:1 $240

fgMorphTree (before 120):
N008 (  1,  2)              [000191] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 120):
N008 (  1,  2)              [000191] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 118):
N010 (  5,  7)              [000168] -A------R---              *  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 110):
N011 ( 13, 18)              [000169] -A----------              *  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----                 +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 121):
N014 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 122):
N013 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (after 122):
N013 (  3,  4)              [000170] D------N----              *  LCL_VAR   float  V18 tmp17        d:1 $240

fgMorphTree (before 123):
                            [000192] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 123):
                            [000192] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 121):
N014 (  7,  9)              [000174] -A------R---              *  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------              \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (after 109):
N015 ( 20, 27)              [000175] -A----------              *  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----                 +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------                 \--*  LCL_VAR   float  V20 cse0         u:1 $240

fgMorphTree (before 124):
N018 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N017 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (before 125):
N017 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (after 125):
N017 (  3,  4)              [000176] D------N----              *  LCL_VAR   float  V19 tmp18        d:1 $241

fgMorphTree (before 126):
N016 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 126):
N016 (  3,  4)              [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 124):
N018 (  7,  9)              [000180] -A------R---              *  ASG       float  $241
N017 (  3,  4)              [000176] D------N----              +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------              \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

fgMorphTree (after 108):
N019 ( 27, 36)              [000181] -A----------              *  COMMA     void   $241
N015 ( 20, 27)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  7,  9)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
                            [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
optValnumCSE morphed tree:
N019 ( 25, 34)              [000181] -A----------              *  COMMA     void   $241
N015 ( 18, 25)              [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18)              [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11)              [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4)              [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6)              [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4)              [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2)              [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4)              [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2)              [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7)              [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4)              [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2)              [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  5,  7)              [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4)              [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  1,  2)              [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9)              [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4)              [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4)              [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241


*************** Finishing PHASE Optimize Valnum CSEs

*************** Starting PHASE Assertion prop
*************** In optAssertionPropMain()
Blocks/Trees at start of phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void   $203
N005 (  0,  0) [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0) [000114] ------------              \--*  NOP       void   $203

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  2) [000118] ------------              |  |  |  \--*  LCL_VAR   float  V09 tmp8         u:1 (last use) $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

***** BB01
STMT00017 (IL   ???...  ???)
N019 ( 25, 34) [000181] -A----------              *  COMMA     void   $241
N015 ( 18, 25) [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18) [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11) [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6) [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4) [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2) [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4) [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2) [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7) [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2) [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  5,  7) [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  1,  2) [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9) [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  3,  4) [000060] ------------                 \--*  LCL_VAR   float  V17 tmp16        u:1 (last use) $240

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  3,  4) [000073] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  3,  4) [000081] ------------                 \--*  LCL_VAR   float  V18 tmp17        u:1 (last use) $240

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  3,  4) [000089] ------------                 \--*  LCL_VAR   float  V19 tmp18        u:1 (last use) $241

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0 $40

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2 $40

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

-------------------------------------------------------------------------------------------------------------------
GenTreeNode creates assertion:
N002 (  3,  2) [000001] ---XG-------              *  IND       struct <l:$1c1, c:$1c0>
In BB01 New Global Constant Assertion: (128, 0) ($80,$0) Value_Number {InitVal($40)} is not 0 index=#01, mask=0000000000000001
After constant propagation on [000118]:
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  2) [000123] ------------              |  |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241
After constant propagation on [000123]:
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N008 (  1,  2) [000129] ------------              |     \--*  LCL_VAR   float  V10 tmp9         u:1 (last use) $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241
After constant propagation on [000129]:
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              |     \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  2) [000135] ------------                 \--*  LCL_VAR   float  V11 tmp10        u:1 (last use) $241
After constant propagation on [000135]:
STMT00002 (IL   ???...  ???)
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              |     \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
               [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 127):
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 21) [000131] -A----------              +--*  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              |  +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |  |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |  |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              |  \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              |     \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
               [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 128):
N011 ( 15, 21) [000131] -A----------              *  COMMA     void   $240
N007 ( 10, 14) [000125] -A----------              +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 129):
N007 ( 10, 14) [000125] -A----------              *  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 130):
N003 (  5,  7) [000119] -A------R---              *  ASG       float  $240
N002 (  3,  4) [000117] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 131):
N002 (  3,  4) [000117] U------N----              *  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340

fgMorphTree (after 131):
N002 (  3,  4) [000117] U------N----              *  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340

fgMorphTree (before 132):
               [000193] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 132):
               [000193] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 130):
N003 (  5,  7) [000119] -A------R---              *  ASG       float  $240
N002 (  3,  4) [000117] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 133):
N006 (  5,  7) [000124] -A------R---              *  ASG       float  $240
N005 (  3,  4) [000122] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 134):
N005 (  3,  4) [000122] U------N----              *  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341

fgMorphTree (after 134):
N005 (  3,  4) [000122] U------N----              *  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341

fgMorphTree (before 135):
               [000194] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 135):
               [000194] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 133):
N006 (  5,  7) [000124] -A------R---              *  ASG       float  $240
N005 (  3,  4) [000122] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 129):
N007 ( 10, 14) [000125] -A----------              *  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 136):
N010 (  5,  7) [000130] -A------R---              *  ASG       float  $240
N009 (  3,  4) [000128] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 137):
N009 (  3,  4) [000128] U------N----              *  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342

fgMorphTree (after 137):
N009 (  3,  4) [000128] U------N----              *  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342

fgMorphTree (before 138):
               [000195] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 138):
               [000195] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 136):
N010 (  5,  7) [000130] -A------R---              *  ASG       float  $240
N009 (  3,  4) [000128] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 128):
N011 ( 15, 21) [000131] -A----------              *  COMMA     void   $240
               [000197] -A----------              +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N006 (  5,  7) [000124] -A------R---              |  \--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |     \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 139):
N014 (  5,  7) [000136] -A------R---              *  ASG       float  $241
N013 (  3,  4) [000134] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
               [000196] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 140):
N013 (  3,  4) [000134] U------N----              *  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343

fgMorphTree (after 140):
N013 (  3,  4) [000134] U------N----              *  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343

fgMorphTree (before 141):
               [000196] ------------              *  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 141):
               [000196] ------------              *  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 139):
N014 (  5,  7) [000136] -A------R---              *  ASG       float  $241
N013 (  3,  4) [000134] U------N----              +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
               [000196] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 127):
N015 ( 20, 28) [000137] -A----------              *  COMMA     void   $241
               [000199] -A----------              +--*  COMMA     void   $240
N003 (  5,  7) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
               [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
               [000198] -A----------              |  \--*  COMMA     void   $240
N006 (  5,  7) [000124] -A------R---              |     +--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     |  +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
               [000194] ------------              |     |  \--*  CNS_DBL   float  0.00000000000000000 $240
N010 (  5,  7) [000130] -A------R---              |     \--*  ASG       float  $240
N009 (  3,  4) [000128] U------N----              |        +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
               [000195] ------------              |        \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  7) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
               [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241
optVNAssertionPropCurStmt morphed tree:
N015 ( 20, 24) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 18) [000199] -A----------              +--*  COMMA     void   $240
N003 (  5,  6) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  1) [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N010 ( 10, 12) [000198] -A----------              |  \--*  COMMA     void   $240
N006 (  5,  6) [000124] -A------R---              |     +--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     |  +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  1) [000194] ------------              |     |  \--*  CNS_DBL   float  0.00000000000000000 $240
N009 (  5,  6) [000130] -A------R---              |     \--*  ASG       float  $240
N008 (  3,  4) [000128] U------N----              |        +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N007 (  1,  1) [000195] ------------              |        \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  6) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  1) [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

After constant propagation on [000060]:
STMT00011 (IL   ???...  ???)
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
               [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 142):
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
               [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 143):
N003 (  7,  9) [000061] N------N-U--              *  NE        int    $380
N001 (  3,  4) [000057] ------------              +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
               [000200] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 144):
N001 (  3,  4) [000057] ------------              *  LCL_VAR   float  V12 tmp11        u:1 (last use) $304

fgMorphTree (after 144):
N001 (  3,  4) [000057] ------------              *  LCL_VAR   float  V12 tmp11        u:1 (last use) $304

fgMorphTree (before 145):
               [000200] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 145):
               [000200] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 143):
N003 (  7,  9) [000061] N------N-U--              *  NE        int    $380
N001 (  3,  4) [000057] ------------              +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
               [000200] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 142):
N004 (  9, 11) [000062] ------------              *  JTRUE     void  
N003 (  7,  9) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
               [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240
optVNAssertionPropCurStmt morphed tree:
N004 (  7,  8) [000062] ------------              *  JTRUE     void  
N003 (  5,  6) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

GenTreeNode creates assertion:
N004 (  7,  8) [000062] ------------              *  JTRUE     void  
In BB01 New Global Constant Assertion: (772, 576) ($304,$240) V12.01 != 0.000000 index=#02, mask=0000000000000002
GenTreeNode creates assertion:
N004 (  7,  8) [000062] ------------              *  JTRUE     void  
In BB01 New Global Constant Assertion: (772, 576) ($304,$240) V12.01 == 0.000000 index=#03, mask=0000000000000004
After constant propagation on [000073]:
STMT00013 (IL   ???...  ???)
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
               [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 146):
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
               [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 147):
N003 (  7,  9) [000074] N------N-U--              *  NE        int    $381
N001 (  3,  4) [000070] ------------              +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
               [000201] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 148):
N001 (  3,  4) [000070] ------------              *  LCL_VAR   float  V13 tmp12        u:1 (last use) $305

fgMorphTree (after 148):
N001 (  3,  4) [000070] ------------              *  LCL_VAR   float  V13 tmp12        u:1 (last use) $305

fgMorphTree (before 149):
               [000201] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 149):
               [000201] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 147):
N003 (  7,  9) [000074] N------N-U--              *  NE        int    $381
N001 (  3,  4) [000070] ------------              +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
               [000201] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 146):
N004 (  9, 11) [000075] ------------              *  JTRUE     void  
N003 (  7,  9) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
               [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240
optVNAssertionPropCurStmt morphed tree:
N004 (  7,  8) [000075] ------------              *  JTRUE     void  
N003 (  5,  6) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

GenTreeNode creates assertion:
N004 (  7,  8) [000075] ------------              *  JTRUE     void  
In BB02 New Global Constant Assertion: (773, 576) ($305,$240) V13.01 != 0.000000 index=#04, mask=0000000000000008
GenTreeNode creates assertion:
N004 (  7,  8) [000075] ------------              *  JTRUE     void  
In BB02 New Global Constant Assertion: (773, 576) ($305,$240) V13.01 == 0.000000 index=#05, mask=0000000000000010
After constant propagation on [000081]:
STMT00014 (IL   ???...  ???)
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
               [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 150):
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
               [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 151):
N003 (  7,  9) [000082] N------N-U--              *  NE        int    $382
N001 (  3,  4) [000078] ------------              +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
               [000202] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (before 152):
N001 (  3,  4) [000078] ------------              *  LCL_VAR   float  V14 tmp13        u:1 (last use) $306

fgMorphTree (after 152):
N001 (  3,  4) [000078] ------------              *  LCL_VAR   float  V14 tmp13        u:1 (last use) $306

fgMorphTree (before 153):
               [000202] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 153):
               [000202] ------------              *  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 151):
N003 (  7,  9) [000082] N------N-U--              *  NE        int    $382
N001 (  3,  4) [000078] ------------              +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
               [000202] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

fgMorphTree (after 150):
N004 (  9, 11) [000083] ------------              *  JTRUE     void  
N003 (  7,  9) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
               [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240
optVNAssertionPropCurStmt morphed tree:
N004 (  7,  8) [000083] ------------              *  JTRUE     void  
N003 (  5,  6) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

GenTreeNode creates assertion:
N004 (  7,  8) [000083] ------------              *  JTRUE     void  
In BB03 New Global Constant Assertion: (774, 576) ($306,$240) V14.01 != 0.000000 index=#06, mask=0000000000000020
GenTreeNode creates assertion:
N004 (  7,  8) [000083] ------------              *  JTRUE     void  
In BB03 New Global Constant Assertion: (774, 576) ($306,$240) V14.01 == 0.000000 index=#07, mask=0000000000000040
After constant propagation on [000089]:
STMT00015 (IL   ???...  ???)
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
               [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 154):
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
               [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 155):
N004 (  3,  2) [000091] D------N----              *  LCL_VAR   int    V05 tmp4         d:3 $383

fgMorphTree (after 155):
N004 (  3,  2) [000091] D------N----              *  LCL_VAR   int    V05 tmp4         d:3 $383

fgMorphTree (before 156):
N003 ( 10,  9) [000090] ------------              *  EQ        int    $383
N001 (  3,  4) [000086] ------------              +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
               [000203] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (before 157):
N001 (  3,  4) [000086] ------------              *  LCL_VAR   float  V15 tmp14        u:1 (last use) $307

fgMorphTree (after 157):
N001 (  3,  4) [000086] ------------              *  LCL_VAR   float  V15 tmp14        u:1 (last use) $307

fgMorphTree (before 158):
               [000203] ------------              *  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 158):
               [000203] ------------              *  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 156):
N003 ( 10,  9) [000090] ------------              *  EQ        int    $383
N001 (  3,  4) [000086] ------------              +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
               [000203] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

fgMorphTree (after 154):
N005 ( 14, 12) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 ( 10,  9) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
               [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241
optVNAssertionPropCurStmt morphed tree:
N005 ( 12,  9) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 (  8,  6) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

BB01 valueGen = 0000000000000005 => BB05 valueGen = 0000000000000003,
BB02 valueGen = 0000000000000010 => BB05 valueGen = 0000000000000008,
BB03 valueGen = 0000000000000040 => BB05 valueGen = 0000000000000020,
BB04 valueGen = 0000000000000000
BB05 valueGen = 0000000000000000
BB06 valueGen = 0000000000000000
AssertionPropCallback::StartMerge: BB01 in -> 0000000000000000
AssertionPropCallback::EndMerge  : BB01 in -> 0000000000000000

AssertionPropCallback::Changed   : BB01 before out -> 000000000000007F; after out -> 0000000000000005;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 0000000000000003;

AssertionPropCallback::StartMerge: BB02 in -> 000000000000007F
AssertionPropCallback::Merge     : BB02 in -> 000000000000007F, predBlock BB01 out -> 0000000000000005
AssertionPropCallback::EndMerge  : BB02 in -> 0000000000000005

AssertionPropCallback::Changed   : BB02 before out -> 000000000000007F; after out -> 0000000000000015;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 000000000000000D;

AssertionPropCallback::StartMerge: BB05 in -> 000000000000007F
AssertionPropCallback::Merge     : BB05 in -> 000000000000007F, predBlock BB01 out -> 0000000000000003
AssertionPropCallback::Merge     : BB05 in -> 0000000000000003, predBlock BB02 out -> 000000000000000D
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB03 out -> 000000000000007F
AssertionPropCallback::EndMerge  : BB05 in -> 0000000000000001

AssertionPropCallback::Changed   : BB05 before out -> 000000000000007F; after out -> 0000000000000001;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 0000000000000001;

AssertionPropCallback::StartMerge: BB03 in -> 000000000000007F
AssertionPropCallback::Merge     : BB03 in -> 000000000000007F, predBlock BB02 out -> 0000000000000015
AssertionPropCallback::EndMerge  : BB03 in -> 0000000000000015

AssertionPropCallback::Changed   : BB03 before out -> 000000000000007F; after out -> 0000000000000055;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 0000000000000035;

AssertionPropCallback::StartMerge: BB05 in -> 0000000000000001
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB01 out -> 0000000000000003
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB02 out -> 000000000000000D
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB03 out -> 0000000000000035
AssertionPropCallback::EndMerge  : BB05 in -> 0000000000000001

AssertionPropCallback::Unchanged  : BB05 out -> 0000000000000001; 		jumpDest out -> 0000000000000001

AssertionPropCallback::StartMerge: BB06 in -> 000000000000007F
AssertionPropCallback::Merge     : BB06 in -> 000000000000007F, predBlock BB04 out -> 000000000000007F
AssertionPropCallback::Merge     : BB06 in -> 000000000000007F, predBlock BB05 out -> 0000000000000001
AssertionPropCallback::EndMerge  : BB06 in -> 0000000000000001

AssertionPropCallback::Changed   : BB06 before out -> 000000000000007F; after out -> 0000000000000001;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 0000000000000001;

AssertionPropCallback::StartMerge: BB04 in -> 000000000000007F
AssertionPropCallback::Merge     : BB04 in -> 000000000000007F, predBlock BB03 out -> 0000000000000055
AssertionPropCallback::EndMerge  : BB04 in -> 0000000000000055

AssertionPropCallback::Changed   : BB04 before out -> 000000000000007F; after out -> 0000000000000055;
		jumpDest before out -> 000000000000007F; jumpDest after out -> 0000000000000055;

AssertionPropCallback::StartMerge: BB05 in -> 0000000000000001
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB01 out -> 0000000000000003
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB02 out -> 000000000000000D
AssertionPropCallback::Merge     : BB05 in -> 0000000000000001, predBlock BB03 out -> 0000000000000035
AssertionPropCallback::EndMerge  : BB05 in -> 0000000000000001

AssertionPropCallback::Unchanged  : BB05 out -> 0000000000000001; 		jumpDest out -> 0000000000000001

AssertionPropCallback::StartMerge: BB06 in -> 0000000000000001
AssertionPropCallback::Merge     : BB06 in -> 0000000000000001, predBlock BB04 out -> 0000000000000055
AssertionPropCallback::Merge     : BB06 in -> 0000000000000001, predBlock BB05 out -> 0000000000000001
AssertionPropCallback::EndMerge  : BB06 in -> 0000000000000001

AssertionPropCallback::Unchanged  : BB06 out -> 0000000000000001; 		jumpDest out -> 0000000000000001



BB01 valueIn  = 0000000000000000 valueOut = 0000000000000005 => BB05 valueOut= 0000000000000003
BB02 valueIn  = 0000000000000005 valueOut = 0000000000000015 => BB05 valueOut= 000000000000000D
BB03 valueIn  = 0000000000000015 valueOut = 0000000000000055 => BB05 valueOut= 0000000000000035
BB04 valueIn  = 0000000000000055 valueOut = 0000000000000055
BB05 valueIn  = 0000000000000001 valueOut = 0000000000000001
BB06 valueIn  = 0000000000000001 valueOut = 0000000000000001
Propagating 0000000000000000 assertions for BB01, stmt STMT00001, tree [000000], tree -> 0
Propagating 0000000000000000 assertions for BB01, stmt STMT00001, tree [000001], tree -> 1
Propagating 0000000000000001 assertions for BB01, stmt STMT00001, tree [000003], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00001, tree [000005], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000103], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000106], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000107], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000110], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000111], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000114], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00005, tree [000115], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00007, tree [000036], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00007, tree [000037], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00007, tree [000038], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00008, tree [000041], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00008, tree [000042], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00008, tree [000043], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00009, tree [000046], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00009, tree [000047], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00009, tree [000048], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00010, tree [000051], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00010, tree [000052], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00010, tree [000053], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000193], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000117], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000119], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000194], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000122], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000124], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000195], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000128], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000130], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000198], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000199], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000196], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000134], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000136], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00002, tree [000137], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000140], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000139], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000141], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000145], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000142], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000146], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000147], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000151], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000148], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000152], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000153], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000157], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000154], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000158], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00016, tree [000159], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000162], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000187], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000188], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000189], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000190], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000161], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000163], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000191], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000164], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000168], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000169], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000192], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000170], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000174], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000175], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000179], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000176], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000180], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00017, tree [000181], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00011, tree [000057], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00011, tree [000200], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00011, tree [000061], tree -> 0
Propagating 0000000000000001 assertions for BB01, stmt STMT00011, tree [000062], tree -> 2
Propagating 0000000000000005 assertions for BB02, stmt STMT00013, tree [000070], tree -> 0
Propagating 0000000000000005 assertions for BB02, stmt STMT00013, tree [000201], tree -> 0
Propagating 0000000000000005 assertions for BB02, stmt STMT00013, tree [000074], tree -> 0
Propagating 0000000000000005 assertions for BB02, stmt STMT00013, tree [000075], tree -> 4
Propagating 0000000000000015 assertions for BB03, stmt STMT00014, tree [000078], tree -> 0
Propagating 0000000000000015 assertions for BB03, stmt STMT00014, tree [000202], tree -> 0
Propagating 0000000000000015 assertions for BB03, stmt STMT00014, tree [000082], tree -> 0
Propagating 0000000000000015 assertions for BB03, stmt STMT00014, tree [000083], tree -> 6
Propagating 0000000000000055 assertions for BB04, stmt STMT00015, tree [000086], tree -> 0
Propagating 0000000000000055 assertions for BB04, stmt STMT00015, tree [000203], tree -> 0
Propagating 0000000000000055 assertions for BB04, stmt STMT00015, tree [000090], tree -> 0
Propagating 0000000000000055 assertions for BB04, stmt STMT00015, tree [000091], tree -> 0
Propagating 0000000000000055 assertions for BB04, stmt STMT00015, tree [000092], tree -> 0
Propagating 0000000000000001 assertions for BB05, stmt STMT00012, tree [000063], tree -> 0
Propagating 0000000000000001 assertions for BB05, stmt STMT00012, tree [000065], tree -> 0
Propagating 0000000000000001 assertions for BB05, stmt STMT00012, tree [000066], tree -> 0
Propagating 0000000000000001 assertions for BB06, stmt STMT00004, tree [000093], tree -> 0
Propagating 0000000000000001 assertions for BB06, stmt STMT00004, tree [000018], tree -> 0
*************** In fgDebugCheckBBlist

*************** Finishing PHASE Assertion prop

*************** Starting PHASE Optimize index checks
*************** In OptimizeRangeChecks()
Blocks/trees before phase

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void   $203
N005 (  0,  0) [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0) [000114] ------------              \--*  NOP       void   $203

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 24) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 18) [000199] -A----------              +--*  COMMA     void   $240
N003 (  5,  6) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  1) [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N010 ( 10, 12) [000198] -A----------              |  \--*  COMMA     void   $240
N006 (  5,  6) [000124] -A------R---              |     +--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     |  +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  1) [000194] ------------              |     |  \--*  CNS_DBL   float  0.00000000000000000 $240
N009 (  5,  6) [000130] -A------R---              |     \--*  ASG       float  $240
N008 (  3,  4) [000128] U------N----              |        +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N007 (  1,  1) [000195] ------------              |        \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  6) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  1) [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

***** BB01
STMT00017 (IL   ???...  ???)
N019 ( 25, 34) [000181] -A----------              *  COMMA     void   $241
N015 ( 18, 25) [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18) [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11) [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6) [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4) [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2) [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4) [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2) [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7) [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2) [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  5,  7) [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  1,  2) [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9) [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  7,  8) [000062] ------------              *  JTRUE     void  
N003 (  5,  6) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  7,  8) [000075] ------------              *  JTRUE     void  
N003 (  5,  6) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  7,  8) [000083] ------------              *  JTRUE     void  
N003 (  5,  6) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 12,  9) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 (  8,  6) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0 $40

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2 $40

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

-------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Optimize index checks

*************** Starting PHASE Insert GC Polls

*************** Finishing PHASE Insert GC Polls [no changes]

*************** Starting PHASE Determine first cold block

*************** In fgDetermineFirstColdBlock()
No procedure splitting will be done for this method

*************** Finishing PHASE Determine first cold block
Trees before Rationalize IR

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}

***** BB01
STMT00001 (IL 0x000...0x010)
N004 (  7,  5) [000005] -A-XG---R---              *  ASG       struct (copy) $VN.Void
N003 (  3,  2) [000003] D------N----              +--*  LCL_VAR   struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
N002 (  3,  2) [000001] ---XG-------              \--*  IND       struct <l:$1c1, c:$1c0>
N001 (  1,  1) [000000] ------------                 \--*  LCL_VAR   byref  V00 this         u:1 (last use) $80

***** BB01
STMT00005 (IL 0x000...  ???)
N007 (  0,  0) [000115] ------------              *  COMMA     void   $203
N005 (  0,  0) [000111] ------------              +--*  COMMA     void   $202
N003 (  0,  0) [000107] ------------              |  +--*  COMMA     void   $201
N001 (  0,  0) [000103] ------------              |  |  +--*  NOP       void   $200
N002 (  0,  0) [000106] ------------              |  |  \--*  NOP       void   $201
N004 (  0,  0) [000110] ------------              |  \--*  NOP       void   $202
N006 (  0,  0) [000114] ------------              \--*  NOP       void   $203

***** BB01
STMT00007 (IL 0x000...  ???)
N003 (  1,  3) [000038] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000037] D------N----              +--*  LCL_VAR   float  V08 tmp7         d:1 $240
N001 (  1,  1) [000036] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00008 (IL 0x000...  ???)
N003 (  1,  3) [000043] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000042] D------N----              +--*  LCL_VAR   float  V09 tmp8         d:1 $240
N001 (  1,  1) [000041] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00009 (IL 0x000...  ???)
N003 (  1,  3) [000048] -A------R---              *  ASG       float  $240
N002 (  1,  2) [000047] D------N----              +--*  LCL_VAR   float  V10 tmp9         d:1 $240
N001 (  1,  1) [000046] ------------              \--*  CNS_DBL   float  0.00000000000000000 $240

***** BB01
STMT00010 (IL 0x000...  ???)
N003 (  1,  3) [000053] -A------R---              *  ASG       float  $241
N002 (  1,  2) [000052] D------N----              +--*  LCL_VAR   float  V11 tmp10        d:1 $241
N001 (  1,  1) [000051] ------------              \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00002 (IL   ???...  ???)
N015 ( 20, 24) [000137] -A----------              *  COMMA     void   $241
N011 ( 15, 18) [000199] -A----------              +--*  COMMA     void   $240
N003 (  5,  6) [000119] -A------R---              |  +--*  ASG       float  $240
N002 (  3,  4) [000117] U------N----              |  |  +--*  LCL_FLD   float  V03 tmp2         ud:1->2[+0] Fseq[X] $340
N001 (  1,  1) [000193] ------------              |  |  \--*  CNS_DBL   float  0.00000000000000000 $240
N010 ( 10, 12) [000198] -A----------              |  \--*  COMMA     void   $240
N006 (  5,  6) [000124] -A------R---              |     +--*  ASG       float  $240
N005 (  3,  4) [000122] U------N----              |     |  +--*  LCL_FLD   float  V03 tmp2         ud:2->3[+4] Fseq[Y] $341
N004 (  1,  1) [000194] ------------              |     |  \--*  CNS_DBL   float  0.00000000000000000 $240
N009 (  5,  6) [000130] -A------R---              |     \--*  ASG       float  $240
N008 (  3,  4) [000128] U------N----              |        +--*  LCL_FLD   float  V03 tmp2         ud:3->4[+8] Fseq[Z] $342
N007 (  1,  1) [000195] ------------              |        \--*  CNS_DBL   float  0.00000000000000000 $240
N014 (  5,  6) [000136] -A------R---              \--*  ASG       float  $241
N013 (  3,  4) [000134] U------N----                 +--*  LCL_FLD   float  V03 tmp2         ud:4->5[+12] Fseq[W] $343
N012 (  1,  1) [000196] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

***** BB01
STMT00016 (IL   ???...  ???)
N015 ( 28, 36) [000159] -A----------              *  COMMA     void   $307
N011 ( 21, 27) [000153] -A----------              +--*  COMMA     void   $306
N007 ( 14, 18) [000147] -A----------              |  +--*  COMMA     void   $305
N003 (  7,  9) [000141] -A------R---              |  |  +--*  ASG       float  $304
N002 (  3,  4) [000139] D------N----              |  |  |  +--*  LCL_VAR   float  V12 tmp11        d:1 $304
N001 (  3,  4) [000140] ------------              |  |  |  \--*  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
N006 (  7,  9) [000146] -A------R---              |  |  \--*  ASG       float  $305
N005 (  3,  4) [000142] D------N----              |  |     +--*  LCL_VAR   float  V13 tmp12        d:1 $305
N004 (  3,  4) [000145] ------------              |  |     \--*  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
N010 (  7,  9) [000152] -A------R---              |  \--*  ASG       float  $306
N009 (  3,  4) [000148] D------N----              |     +--*  LCL_VAR   float  V14 tmp13        d:1 $306
N008 (  3,  4) [000151] ------------              |     \--*  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
N014 (  7,  9) [000158] -A------R---              \--*  ASG       float  $307
N013 (  3,  4) [000154] D------N----                 +--*  LCL_VAR   float  V15 tmp14        d:1 $307
N012 (  3,  4) [000157] ------------                 \--*  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307

***** BB01
STMT00017 (IL   ???...  ???)
N019 ( 25, 34) [000181] -A----------              *  COMMA     void   $241
N015 ( 18, 25) [000175] -A----------              +--*  COMMA     void   $240
N011 ( 13, 18) [000169] -A----------              |  +--*  COMMA     void   $240
N007 (  8, 11) [000163] -A------R---              |  |  +--*  ASG       float  $240
N006 (  3,  4) [000161] D------N----              |  |  |  +--*  LCL_VAR   float  V16 tmp15        d:1 $240
N005 (  4,  6) [000190] -A----------              |  |  |  \--*  COMMA     float  $240
N003 (  3,  4) [000188] -A------R---              |  |  |     +--*  ASG       float  $VN.Void
N002 (  1,  2) [000187] D------N----              |  |  |     |  +--*  LCL_VAR   float  V20 cse0         d:1 $240
N001 (  3,  4) [000162] ------------              |  |  |     |  \--*  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
N004 (  1,  2) [000189] ------------              |  |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N010 (  5,  7) [000168] -A------R---              |  |  \--*  ASG       float  $240
N009 (  3,  4) [000164] D------N----              |  |     +--*  LCL_VAR   float  V17 tmp16        d:1 $240
N008 (  1,  2) [000191] ------------              |  |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N014 (  5,  7) [000174] -A------R---              |  \--*  ASG       float  $240
N013 (  3,  4) [000170] D------N----              |     +--*  LCL_VAR   float  V18 tmp17        d:1 $240
N012 (  1,  2) [000192] ------------              |     \--*  LCL_VAR   float  V20 cse0         u:1 $240
N018 (  7,  9) [000180] -A------R---              \--*  ASG       float  $241
N017 (  3,  4) [000176] D------N----                 +--*  LCL_VAR   float  V19 tmp18        d:1 $241
N016 (  3,  4) [000179] ------------                 \--*  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241

***** BB01
STMT00011 (IL   ???...  ???)
N004 (  7,  8) [000062] ------------              *  JTRUE     void  
N003 (  5,  6) [000061] N------N-U--              \--*  NE        int    $380
N001 (  3,  4) [000057] ------------                 +--*  LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}

***** BB02
STMT00013 (IL   ???...  ???)
N004 (  7,  8) [000075] ------------              *  JTRUE     void  
N003 (  5,  6) [000074] N------N-U--              \--*  NE        int    $381
N001 (  3,  4) [000070] ------------                 +--*  LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}

***** BB03
STMT00014 (IL   ???...  ???)
N004 (  7,  8) [000083] ------------              *  JTRUE     void  
N003 (  5,  6) [000082] N------N-U--              \--*  NE        int    $382
N001 (  3,  4) [000078] ------------                 +--*  LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------                 \--*  CNS_DBL   float  0.00000000000000000 $240

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}

***** BB04
STMT00015 (IL   ???...  ???)
N005 ( 12,  9) [000092] -A------R---              *  ASG       bool   $383
N004 (  3,  2) [000091] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:3 $383
N003 (  8,  6) [000090] ------------              \--*  EQ        int    $383
N001 (  3,  4) [000086] ------------                 +--*  LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] ------------                 \--*  CNS_DBL   float  1.0000000000000000 $241

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}

***** BB05
STMT00012 (IL   ???...  ???)
N003 (  5,  4) [000066] -A------R---              *  ASG       bool   $40
N002 (  3,  2) [000065] D------N----              +--*  LCL_VAR   int    V05 tmp4         d:2 $40
N001 (  1,  1) [000063] ------------              \--*  CNS_INT   int    0 $40

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}

***** BB06
STMT00018 (IL   ???...  ???)
N005 (  0,  0) [000184] -A------R---              *  ASG       bool  
N004 (  0,  0) [000182] D------N----              +--*  LCL_VAR   bool   V05 tmp4         d:1
N003 (  0,  0) [000183] ------------              \--*  PHI       bool  
N001 (  0,  0) [000186] ------------ pred BB04       +--*  PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------ pred BB05       \--*  PHI_ARG   bool   V05 tmp4         u:2 $40

***** BB06
STMT00004 (IL   ???...  ???)
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
N001 (  4,  3) [000093] ------------              \--*  LCL_VAR   bool   V05 tmp4         u:1 (last use) $440

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Rationalize IR
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N004 (  7,  5) [000005] DA-XG-------              *  STORE_LCL_VAR struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1

rewriting asg(LCL_FLD, X) to STORE_LCL_FLD(X)
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]

rewriting asg(LCL_FLD, X) to STORE_LCL_FLD(X)
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]

rewriting asg(LCL_FLD, X) to STORE_LCL_FLD(X)
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]

rewriting asg(LCL_FLD, X) to STORE_LCL_FLD(X)
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1


*************** Finishing PHASE Rationalize IR
Trees after Rationalize IR

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
               [000204] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] ---XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
                                                  /--*  t1     struct 
N004 (  7,  5) [000005] DA-XG-------              *  STORE_LCL_VAR struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
               [000205] ------------                 IL_OFFSET void   IL offset: 0x0
               [000206] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000036] ------------        t36 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t36    float  
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1
               [000207] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000041] ------------        t41 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t41    float  
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1
               [000208] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000046] ------------        t46 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t46    float  
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1
               [000209] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000051] ------------        t51 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t51    float  
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1
N001 (  1,  1) [000193] ------------       t193 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t193   float  
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]
N004 (  1,  1) [000194] ------------       t194 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t194   float  
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]
N007 (  1,  1) [000195] ------------       t195 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t195   float  
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]
N012 (  1,  1) [000196] ------------       t196 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t196   float  
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1
N001 (  3,  4) [000162] ------------       t162 =    LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                                                  /--*  t162   float  
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1
N004 (  1,  2) [000189] ------------       t189 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t189   float  
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1
N008 (  1,  2) [000191] ------------       t191 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t191   float  
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1
N012 (  1,  2) [000192] ------------       t192 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t192   float  
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1
N016 (  3,  4) [000179] ------------       t179 =    LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
                                                  /--*  t179   float  
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1
N001 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N003 (  5,  6) [000061] N------N-U--        t61 = *  NE        int    $380
                                                  /--*  t61    int    
N004 (  7,  8) [000062] ------------              *  JTRUE     void  

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N001 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N003 (  5,  6) [000074] N------N-U--        t74 = *  NE        int    $381
                                                  /--*  t74    int    
N004 (  7,  8) [000075] ------------              *  JTRUE     void  

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N001 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N003 (  5,  6) [000082] N------N-U--        t82 = *  NE        int    $382
                                                  /--*  t82    int    
N004 (  7,  8) [000083] ------------              *  JTRUE     void  

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] ------------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1
N001 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 (last use) $440
                                                  /--*  t93    bool   
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist

*************** Starting PHASE Do 'simple' lowering

*************** Finishing PHASE Do 'simple' lowering
*************** In fgDebugCheckBBlist
Trees before Lowering nodeinfo

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
               [000204] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] ---XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
                                                  /--*  t1     struct 
N004 (  7,  5) [000005] DA-XG-------              *  STORE_LCL_VAR struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1
               [000205] ------------                 IL_OFFSET void   IL offset: 0x0
               [000206] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000036] ------------        t36 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t36    float  
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1
               [000207] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000041] ------------        t41 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t41    float  
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1
               [000208] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000046] ------------        t46 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t46    float  
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1
               [000209] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000051] ------------        t51 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t51    float  
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1
N001 (  1,  1) [000193] ------------       t193 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t193   float  
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]
N004 (  1,  1) [000194] ------------       t194 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t194   float  
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]
N007 (  1,  1) [000195] ------------       t195 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t195   float  
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]
N012 (  1,  1) [000196] ------------       t196 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t196   float  
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1
N001 (  3,  4) [000162] ------------       t162 =    LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                                                  /--*  t162   float  
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1
N004 (  1,  2) [000189] ------------       t189 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t189   float  
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1
N008 (  1,  2) [000191] ------------       t191 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t191   float  
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1
N012 (  1,  2) [000192] ------------       t192 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t192   float  
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1
N016 (  3,  4) [000179] ------------       t179 =    LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
                                                  /--*  t179   float  
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1
N001 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N003 (  5,  6) [000061] N------N-U--        t61 = *  NE        int    $380
                                                  /--*  t61    int    
N004 (  7,  8) [000062] ------------              *  JTRUE     void  

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N001 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N003 (  5,  6) [000074] N------N-U--        t74 = *  NE        int    $381
                                                  /--*  t74    int    
N004 (  7,  8) [000075] ------------              *  JTRUE     void  

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N001 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N003 (  5,  6) [000082] N------N-U--        t82 = *  NE        int    $382
                                                  /--*  t82    int    
N004 (  7,  8) [000083] ------------              *  JTRUE     void  

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] ------------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1
N001 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 (last use) $440
                                                  /--*  t93    bool   
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Lowering nodeinfo
lowering store lcl var/field (before):
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] ---XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
                                                  /--*  t1     struct 
N004 (  7,  5) [000005] DA-XG-------              *  STORE_LCL_VAR struct<System.Numerics.Quaternion, 16> V02 tmp1         d:1

lowering store lcl var/field (before):
N001 (  1,  1) [000036] ------------        t36 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t36    float  
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1

lowering store lcl var/field (after):
N001 (  1,  1) [000036] ------------        t36 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t36    float  
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1

lowering store lcl var/field (before):
N001 (  1,  1) [000041] ------------        t41 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t41    float  
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1

lowering store lcl var/field (after):
N001 (  1,  1) [000041] ------------        t41 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t41    float  
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1

lowering store lcl var/field (before):
N001 (  1,  1) [000046] ------------        t46 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t46    float  
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1

lowering store lcl var/field (after):
N001 (  1,  1) [000046] ------------        t46 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t46    float  
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1

lowering store lcl var/field (before):
N001 (  1,  1) [000051] ------------        t51 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t51    float  
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1

lowering store lcl var/field (after):
N001 (  1,  1) [000051] ------------        t51 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t51    float  
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1

lowering store lcl var/field (before):
N001 (  1,  1) [000193] ------------       t193 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t193   float  
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]

lowering store lcl var/field (after):
N001 (  1,  1) [000193] ------------       t193 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t193   float  
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]

lowering store lcl var/field (before):
N004 (  1,  1) [000194] ------------       t194 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t194   float  
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]

lowering store lcl var/field (after):
N004 (  1,  1) [000194] ------------       t194 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t194   float  
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]

lowering store lcl var/field (before):
N007 (  1,  1) [000195] ------------       t195 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t195   float  
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]

lowering store lcl var/field (after):
N007 (  1,  1) [000195] ------------       t195 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t195   float  
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]

lowering store lcl var/field (before):
N012 (  1,  1) [000196] ------------       t196 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t196   float  
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]

lowering store lcl var/field (after):
N012 (  1,  1) [000196] ------------       t196 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t196   float  
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]

lowering store lcl var/field (before):
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1

lowering store lcl var/field (after):
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1

lowering store lcl var/field (before):
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1

lowering store lcl var/field (after):
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1

lowering store lcl var/field (before):
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1

lowering store lcl var/field (after):
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1

lowering store lcl var/field (before):
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1

lowering store lcl var/field (after):
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1

lowering store lcl var/field (before):
N001 (  3,  4) [000162] ------------       t162 =    LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                                                  /--*  t162   float  
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1

lowering store lcl var/field (after):
N001 (  3,  4) [000162] ------------       t162 =    LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                                                  /--*  t162   float  
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1

lowering store lcl var/field (before):
N004 (  1,  2) [000189] ------------       t189 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t189   float  
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1

lowering store lcl var/field (after):
N004 (  1,  2) [000189] ------------       t189 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t189   float  
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1

lowering store lcl var/field (before):
N008 (  1,  2) [000191] ------------       t191 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t191   float  
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1

lowering store lcl var/field (after):
N008 (  1,  2) [000191] ------------       t191 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t191   float  
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1

lowering store lcl var/field (before):
N012 (  1,  2) [000192] ------------       t192 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t192   float  
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1

lowering store lcl var/field (after):
N012 (  1,  2) [000192] ------------       t192 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t192   float  
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1

lowering store lcl var/field (before):
N016 (  3,  4) [000179] ------------       t179 =    LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
                                                  /--*  t179   float  
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1

lowering store lcl var/field (after):
N016 (  3,  4) [000179] ------------       t179 =    LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
                                                  /--*  t179   float  
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1

lowering store lcl var/field (before):
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

lowering store lcl var/field (after):
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

lowering store lcl var/field (before):
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

lowering store lcl var/field (after):
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

lowering store lcl var/field (before):
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1

lowering store lcl var/field (after):
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1

lowering GT_RETURN
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2
============Lower has completed modifying nodes.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
               [000204] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] -c-XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
               [000210] Dc-----N----       t210 =    LCL_VAR_ADDR byref  V02 tmp1         
                                                  /--*  t210   byref  
                                                  +--*  t1     struct 
N004 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll)
               [000205] ------------                 IL_OFFSET void   IL offset: 0x0
               [000206] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000036] ------------        t36 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t36    float  
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1
               [000207] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000041] ------------        t41 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t41    float  
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1
               [000208] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000046] ------------        t46 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t46    float  
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1
               [000209] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000051] ------------        t51 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t51    float  
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1
N001 (  1,  1) [000193] ------------       t193 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t193   float  
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X]
N004 (  1,  1) [000194] ------------       t194 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t194   float  
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y]
N007 (  1,  1) [000195] ------------       t195 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t195   float  
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z]
N012 (  1,  1) [000196] ------------       t196 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t196   float  
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W]
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1
N001 (  3,  4) [000162] ------------       t162 =    LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
                                                  /--*  t162   float  
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1
N004 (  1,  2) [000189] ------------       t189 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t189   float  
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1
N008 (  1,  2) [000191] ------------       t191 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t191   float  
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1
N012 (  1,  2) [000192] ------------       t192 =    LCL_VAR   float  V20 cse0         u:1 $240
                                                  /--*  t192   float  
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1
N016 (  3,  4) [000179] ------------       t179 =    LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
                                                  /--*  t179   float  
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1
N001 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N003 (  5,  6) [000061] N------N-U--              *  NE        void   $380
N004 (  7,  8) [000062] ------------              *  JTRUE     void  

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N001 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N003 (  5,  6) [000074] N------N-U--              *  NE        void   $381
N004 (  7,  8) [000075] ------------              *  JTRUE     void  

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N001 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N003 (  5,  6) [000082] N------N-U--              *  NE        void   $382
N004 (  7,  8) [000083] ------------              *  JTRUE     void  

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1
N001 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 (last use) $440
                                                  /--*  t93    bool   
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2

-------------------------------------------------------------------------------------------------------------------

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V00: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  1, refCntWtd = 2   
New refCnts for V08: refCnt =  1, refCntWtd = 1   
New refCnts for V09: refCnt =  1, refCntWtd = 1   
New refCnts for V10: refCnt =  1, refCntWtd = 1   
New refCnts for V11: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  1, refCntWtd = 2   
New refCnts for V03: refCnt =  2, refCntWtd = 4   
New refCnts for V03: refCnt =  3, refCntWtd = 6   
New refCnts for V03: refCnt =  4, refCntWtd = 8   
New refCnts for V02: refCnt =  2, refCntWtd = 4   
New refCnts for V12: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  3, refCntWtd = 6   
New refCnts for V13: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  4, refCntWtd = 8   
New refCnts for V14: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  5, refCntWtd = 10   
New refCnts for V15: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  5, refCntWtd = 10   
New refCnts for V20: refCnt =  1, refCntWtd = 1   
New refCnts for V20: refCnt =  2, refCntWtd = 2   
New refCnts for V16: refCnt =  1, refCntWtd = 1   
New refCnts for V20: refCnt =  3, refCntWtd = 3   
New refCnts for V17: refCnt =  1, refCntWtd = 1   
New refCnts for V20: refCnt =  4, refCntWtd = 4   
New refCnts for V18: refCnt =  1, refCntWtd = 1   
New refCnts for V03: refCnt =  6, refCntWtd = 12   
New refCnts for V19: refCnt =  1, refCntWtd = 1   
New refCnts for V12: refCnt =  2, refCntWtd = 2   
New refCnts for V13: refCnt =  2, refCntWtd = 1.25
New refCnts for V14: refCnt =  2, refCntWtd = 1.25
New refCnts for V15: refCnt =  2, refCntWtd = 1.50
New refCnts for V05: refCnt =  1, refCntWtd = 0.50
New refCnts for V05: refCnt =  2, refCntWtd = 1   
New refCnts for V05: refCnt =  3, refCntWtd = 2   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V00: refCnt =  3, refCntWtd = 3   
*************** In fgLocalVarLiveness()
; Initial local variable assignments
;
;  V00 this            byref  this
;  V01 OutArgs        lclBlk <0>  "OutgoingArgSpace"
;  V02 tmp1           struct <System.Numerics.Quaternion, 16> do-not-enreg[SFB] "impAppendStmt"
;  V03 tmp2           struct <System.Numerics.Quaternion, 16> do-not-enreg[SFB] "struct address for call/obj"
;  V04 tmp3           struct <System.Numerics.Quaternion, 16> "NewObj constructor temp"
;  V05 tmp4             bool  "Inline return value spill temp"
;  V06 tmp5           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
;  V07 tmp6           struct <System.Numerics.Quaternion, 16> "Inlining Arg"
;  V08 tmp7            float  V04.X(offs=0x00) P-INDEP "field V04.X (fldOffset=0x0)"
;  V09 tmp8            float  V04.Y(offs=0x04) P-INDEP "field V04.Y (fldOffset=0x4)"
;  V10 tmp9            float  V04.Z(offs=0x08) P-INDEP "field V04.Z (fldOffset=0x8)"
;  V11 tmp10           float  V04.W(offs=0x0c) P-INDEP "field V04.W (fldOffset=0xc)"
;  V12 tmp11           float  V06.X(offs=0x00) P-INDEP "field V06.X (fldOffset=0x0)"
;  V13 tmp12           float  V06.Y(offs=0x04) P-INDEP "field V06.Y (fldOffset=0x4)"
;  V14 tmp13           float  V06.Z(offs=0x08) P-INDEP "field V06.Z (fldOffset=0x8)"
;  V15 tmp14           float  V06.W(offs=0x0c) P-INDEP "field V06.W (fldOffset=0xc)"
;  V16 tmp15           float  V07.X(offs=0x00) P-INDEP "field V07.X (fldOffset=0x0)"
;  V17 tmp16           float  V07.Y(offs=0x04) P-INDEP "field V07.Y (fldOffset=0x4)"
;  V18 tmp17           float  V07.Z(offs=0x08) P-INDEP "field V07.Z (fldOffset=0x8)"
;  V19 tmp18           float  V07.W(offs=0x0c) P-INDEP "field V07.W (fldOffset=0xc)"
;  V20 cse0            float  "CSE - aggressive"
In fgLocalVarLivenessInit

Local V02 should not be enregistered because: it is a struct

Local V03 should not be enregistered because: it is a struct
Tracked variable (17 out of 21) table:
V03 tmp2          [struct]: refCnt =    6, refCntWtd =  12   
V02 tmp1          [struct]: refCnt =    5, refCntWtd =  10   
V00 this          [ byref]: refCnt =    3, refCntWtd =   3   
V05 tmp4          [  bool]: refCnt =    3, refCntWtd =   2   
V20 cse0          [ float]: refCnt =    4, refCntWtd =   4   
V12 tmp11         [ float]: refCnt =    2, refCntWtd =   2   
V15 tmp14         [ float]: refCnt =    2, refCntWtd =   1.50
V13 tmp12         [ float]: refCnt =    2, refCntWtd =   1.25
V14 tmp13         [ float]: refCnt =    2, refCntWtd =   1.25
V08 tmp7          [ float]: refCnt =    1, refCntWtd =   1   
V09 tmp8          [ float]: refCnt =    1, refCntWtd =   1   
V10 tmp9          [ float]: refCnt =    1, refCntWtd =   1   
V11 tmp10         [ float]: refCnt =    1, refCntWtd =   1   
V16 tmp15         [ float]: refCnt =    1, refCntWtd =   1   
V17 tmp16         [ float]: refCnt =    1, refCntWtd =   1   
V18 tmp17         [ float]: refCnt =    1, refCntWtd =   1   
V19 tmp18         [ float]: refCnt =    1, refCntWtd =   1   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(2)={V03     V00                                                    } + ByrefExposed + GcHeap
     DEF(15)={V03 V02     V20 V12 V15 V13 V14 V08 V09 V10 V11 V16 V17 V18 V19}

BB02 USE(1)={V13}
     DEF(0)={   }

BB03 USE(1)={V14}
     DEF(0)={   }

BB04 USE(1)={    V15}
     DEF(1)={V05    }

BB05 USE(0)={   }
     DEF(1)={V05}

BB06 USE(1)={V05}
     DEF(0)={   }

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (2)={V03 V00            } + ByrefExposed + GcHeap
     OUT(3)={        V15 V13 V14}

BB02 IN (3)={V15 V13 V14}
     OUT(2)={V15     V14}

BB03 IN (2)={V15 V14}
     OUT(1)={V15    }

BB04 IN (1)={    V15}
     OUT(1)={V05    }

BB05 IN (0)={   }
     OUT(1)={V05}

BB06 IN (1)={V05}
     OUT(0)={   }

Removing dead store:
N018 (  7,  9) [000180] DA----------              *  STORE_LCL_VAR float  V19 tmp18        d:1 (last use)
Removing dead LclVar use:
N016 (  3,  4) [000179] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+12] Fseq[W] (last use) $241
Removing dead store:
N014 (  5,  7) [000174] DA----------              *  STORE_LCL_VAR float  V18 tmp17        d:1 (last use)
Removing dead LclVar use:
N012 (  1,  2) [000192] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240
Removing dead store:
N010 (  5,  7) [000168] DA----------              *  STORE_LCL_VAR float  V17 tmp16        d:1 (last use)
Removing dead LclVar use:
N008 (  1,  2) [000191] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240
Removing dead store:
N007 (  8, 11) [000163] DA----------              *  STORE_LCL_VAR float  V16 tmp15        d:1 (last use)
Removing dead LclVar use:
N004 (  1,  2) [000189] ------------              *  LCL_VAR   float  V20 cse0         u:1 $240
Removing dead store:
N003 (  3,  4) [000188] DA----------              *  STORE_LCL_VAR float  V20 cse0         d:1 (last use)
Removing dead LclVar use:
N001 (  3,  4) [000162] ------------              *  LCL_FLD   float  V03 tmp2         u:5[+0] Fseq[X] $240
Removing dead store:
N014 (  5,  6) [000136] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:4->0[+12] Fseq[W] (last use)
Removing dead node:
N012 (  1,  1) [000196] ------------              *  CNS_DBL   float  1.0000000000000000 $241
Removing dead store:
N009 (  5,  6) [000130] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:3->0[+8] Fseq[Z] (last use)
Removing dead node:
N007 (  1,  1) [000195] ------------              *  CNS_DBL   float  0.00000000000000000 $240
Removing dead store:
N006 (  5,  6) [000124] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:2->0[+4] Fseq[Y] (last use)
Removing dead node:
N004 (  1,  1) [000194] ------------              *  CNS_DBL   float  0.00000000000000000 $240
Removing dead store:
N003 (  5,  6) [000119] UA----------              *  STORE_LCL_FLD float  V03 tmp2         ud:1->0[+0] Fseq[X] (last use)
Removing dead node:
N001 (  1,  1) [000193] ------------              *  CNS_DBL   float  0.00000000000000000 $240
Removing dead store:
N003 (  1,  3) [000053] DA----------              *  STORE_LCL_VAR float  V11 tmp10        d:1 (last use)
Removing dead node:
N001 (  1,  1) [000051] ------------              *  CNS_DBL   float  1.0000000000000000 $241
Removing dead store:
N003 (  1,  3) [000048] DA----------              *  STORE_LCL_VAR float  V10 tmp9         d:1 (last use)
Removing dead node:
N001 (  1,  1) [000046] ------------              *  CNS_DBL   float  0.00000000000000000 $240
Removing dead store:
N003 (  1,  3) [000043] DA----------              *  STORE_LCL_VAR float  V09 tmp8         d:1 (last use)
Removing dead node:
N001 (  1,  1) [000041] ------------              *  CNS_DBL   float  0.00000000000000000 $240
Removing dead store:
N003 (  1,  3) [000038] DA----------              *  STORE_LCL_VAR float  V08 tmp7         d:1 (last use)
Removing dead node:
N001 (  1,  1) [000036] ------------              *  CNS_DBL   float  0.00000000000000000 $240
*************** In fgPerBlockLocalVarLiveness()
BB01 USE(1)={    V00                } + ByrefExposed + GcHeap
     DEF(5)={V02     V12 V15 V13 V14}

BB02 USE(1)={V13}
     DEF(0)={   }

BB03 USE(1)={V14}
     DEF(0)={   }

BB04 USE(1)={    V15}
     DEF(1)={V05    }

BB05 USE(0)={   }
     DEF(1)={V05}

BB06 USE(1)={V05}
     DEF(0)={   }

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (1)={V00            } + ByrefExposed + GcHeap
     OUT(3)={    V15 V13 V14}

BB02 IN (3)={V15 V13 V14}
     OUT(2)={V15     V14}

BB03 IN (2)={V15 V14}
     OUT(1)={V15    }

BB04 IN (1)={    V15}
     OUT(1)={V05    }

BB05 IN (0)={   }
     OUT(1)={V05}

BB06 IN (1)={V05}
     OUT(0)={   }


*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V00: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  1, refCntWtd = 2   
New refCnts for V02: refCnt =  2, refCntWtd = 4   
New refCnts for V12: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  3, refCntWtd = 6   
New refCnts for V13: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  4, refCntWtd = 8   
New refCnts for V14: refCnt =  1, refCntWtd = 1   
New refCnts for V02: refCnt =  5, refCntWtd = 10   
New refCnts for V15: refCnt =  1, refCntWtd = 1   
New refCnts for V12: refCnt =  2, refCntWtd = 2   
New refCnts for V13: refCnt =  2, refCntWtd = 1.25
New refCnts for V14: refCnt =  2, refCntWtd = 1.25
New refCnts for V15: refCnt =  2, refCntWtd = 1.50
New refCnts for V05: refCnt =  1, refCntWtd = 0.50
New refCnts for V05: refCnt =  2, refCntWtd = 1   
New refCnts for V05: refCnt =  3, refCntWtd = 2   

*** lvaComputeRefCounts -- implicit counts ***
New refCnts for V00: refCnt =  2, refCntWtd = 2   
New refCnts for V00: refCnt =  3, refCntWtd = 3   

*************** Finishing PHASE Lowering nodeinfo
Trees after Lowering nodeinfo

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
               [000204] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] -c-XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
               [000210] Dc-----N----       t210 =    LCL_VAR_ADDR byref  V02 tmp1         
                                                  /--*  t210   byref  
                                                  +--*  t1     struct 
N004 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll)
               [000205] ------------                 IL_OFFSET void   IL offset: 0x0
               [000206] ------------                 IL_OFFSET void   IL offset: 0x0
               [000207] ------------                 IL_OFFSET void   IL offset: 0x0
               [000208] ------------                 IL_OFFSET void   IL offset: 0x0
               [000209] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1
N001 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N003 (  5,  6) [000061] N------N-U--              *  NE        void   $380
N004 (  7,  8) [000062] ------------              *  JTRUE     void  

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N001 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N003 (  5,  6) [000074] N------N-U--              *  NE        void   $381
N004 (  7,  8) [000075] ------------              *  JTRUE     void  

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N001 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N003 (  5,  6) [000082] N------N-U--              *  NE        void   $382
N004 (  7,  8) [000083] ------------              *  JTRUE     void  

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1
N001 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 (last use) $440
                                                  /--*  t93    bool   
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Trees before Calculate stack level slots

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
               [000204] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 (last use) $80
                                                  /--*  t0     byref  
N002 (  3,  2) [000001] -c-XG-------         t1 = *  IND       struct <l:$1c1, c:$1c0>
               [000210] Dc-----N----       t210 =    LCL_VAR_ADDR byref  V02 tmp1         
                                                  /--*  t210   byref  
                                                  +--*  t1     struct 
N004 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll)
               [000205] ------------                 IL_OFFSET void   IL offset: 0x0
               [000206] ------------                 IL_OFFSET void   IL offset: 0x0
               [000207] ------------                 IL_OFFSET void   IL offset: 0x0
               [000208] ------------                 IL_OFFSET void   IL offset: 0x0
               [000209] ------------                 IL_OFFSET void   IL offset: 0x0
N001 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] $304
                                                  /--*  t140   float  
N003 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1
N004 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] $305
                                                  /--*  t145   float  
N006 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1
N008 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] $306
                                                  /--*  t151   float  
N010 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1
N012 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] (last use) $307
                                                  /--*  t157   float  
N014 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1
N001 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 (last use) $304
N002 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N003 (  5,  6) [000061] N------N-U--              *  NE        void   $380
N004 (  7,  8) [000062] ------------              *  JTRUE     void  

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N001 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 (last use) $305
N002 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N003 (  5,  6) [000074] N------N-U--              *  NE        void   $381
N004 (  7,  8) [000075] ------------              *  JTRUE     void  

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N001 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 (last use) $306
N002 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N003 (  5,  6) [000082] N------N-U--              *  NE        void   $382
N004 (  7,  8) [000083] ------------              *  JTRUE     void  

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N001 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 (last use) $307
N002 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N003 (  8,  6) [000090] ------------        t90 = *  EQ        int    $383
                                                  /--*  t90    int    
N005 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N001 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 $40
                                                  /--*  t63    int    
N003 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1
N001 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 (last use) $440
                                                  /--*  t93    bool   
N002 (  5,  4) [000018] ------------              *  RETURN    int    $3c2

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Calculate stack level slots

*************** Finishing PHASE Calculate stack level slots [no changes]

*************** Starting PHASE Linear scan register alloc
Clearing modified regs.

buildIntervals ========

-----------------
LIVENESS:
-----------------
BB01 use def in out
{V00}
{V02 V12 V13 V14 V15}
{V00}
{V13 V14 V15}
BB02 use def in out
{V13}
{}
{V13 V14 V15}
{V14 V15}
BB03 use def in out
{V14}
{}
{V14 V15}
{V15}
BB04 use def in out
{V15}
{V05}
{V15}
{V05}
BB05 use def in out
{}
{V05}
{}
{V05}
BB06 use def in out
{V05}
{}
{V05}
{}
Interval  0: byref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  0: (V00) byref RefPositions {} physReg:NA Preferences=[allInt]

Local V02 should not be enregistered because: it is a struct
Interval  1: int RefPositions {} physReg:NA Preferences=[allInt]
  Interval  1: (V05) int RefPositions {} physReg:NA Preferences=[allInt]
Interval  2: float RefPositions {} physReg:NA Preferences=[allFloat]
  Interval  2: (V12) float (field) RefPositions {} physReg:NA Preferences=[allFloat]
Interval  3: float RefPositions {} physReg:NA Preferences=[allFloat]
  Interval  3: (V13) float (field) RefPositions {} physReg:NA Preferences=[allFloat]
Interval  4: float RefPositions {} physReg:NA Preferences=[allFloat]
  Interval  4: (V14) float (field) RefPositions {} physReg:NA Preferences=[allFloat]
Interval  5: float RefPositions {} physReg:NA Preferences=[allFloat]
  Interval  5: (V15) float (field) RefPositions {} physReg:NA Preferences=[allFloat]

FP callee save candidate vars: None

floatVarCount = 4; hasLoops = 0, singleExit = 1
TUPLE STYLE DUMP BEFORE LSRA
LSRA Block Sequence: BB01(  1   ) 
BB02(  0.25) 
BB03(  0.25) 
BB04(  0.50) 
BB05(  0.50) 
BB06(  1   ) 

BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
=====
  N000.                    IL_OFFSET IL offset: 0x0
  N001.                    V00(t0*)
  N002. t1              =  IND      ; t0*
  N000.                    LCL_VAR_ADDR V02 tmp1         
  N004.                    STORE_BLK; t1
  N000.                    IL_OFFSET IL offset: 0x0
  N000.                    IL_OFFSET IL offset: 0x0
  N000.                    IL_OFFSET IL offset: 0x0
  N000.                    IL_OFFSET IL offset: 0x0
  N000.                    IL_OFFSET IL offset: 0x0
  N001. t140            =  V02 MEM
  N003.                    V12(t141); t140
  N004. t145            =  V02 MEM
  N006.                    V13(t146); t145
  N008. t151            =  V02 MEM
  N010.                    V14(t152); t151
  N012. t157            =  V02 MEM
  N014.                    V15(t158); t157
  N001.                    V12(t57*)
  N002. t200            =  CNS_DBL   0.00000000000000000
  N003.                    NE       ; t57*,t200
  N004.                    JTRUE    

BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
=====
  N001.                    V13(t70*)
  N002. t201            =  CNS_DBL   0.00000000000000000
  N003.                    NE       ; t70*,t201
  N004.                    JTRUE    

BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
=====
  N001.                    V14(t78*)
  N002. t202            =  CNS_DBL   0.00000000000000000
  N003.                    NE       ; t78*,t202
  N004.                    JTRUE    

BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
=====
  N001.                    V15(t86*)
  N002.                    CNS_DBL   1.0000000000000000
  N003. t90             =  EQ       ; t86*
  N005.                    V05(t92); t90

BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
=====
  N001. t63             =  CNS_INT   0
  N003.                    V05(t66); t63

BB06 [???..???) (return), preds={BB04,BB05} succs={}
=====
  N001.                    V05(t93*)
  N002.                    RETURN   ; t93*




buildIntervals second part ========
Int arg V00 in reg rcx
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed>

NEW BLOCK BB01
<RefPosition #1   @1   RefTypeBB  BB01 regmask=[] minReg=1>

DefList: {  }
N003 (???,???) [000204] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N005 (  1,  1) [000000] ------------              *  LCL_VAR   byref  V00 this         u:1 NA (last use) REG NA $80

DefList: {  }
N007 (  3,  2) [000001] -c-XG-------              *  IND       struct REG NA <l:$1c1, c:$1c0>
Contained
DefList: {  }
N009 (???,???) [000210] Dc-----N----              *  LCL_VAR_ADDR byref  V02 tmp1          NA REG NA
Contained
DefList: {  }
N011 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll) REG NA
Interval  6: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #2   @11  RefTypeDef <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #4   @11  RefTypeUse <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N013 (???,???) [000205] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N015 (???,???) [000206] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N017 (???,???) [000207] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N019 (???,???) [000208] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N021 (???,???) [000209] ------------              *  IL_OFFSET void   IL offset: 0x0 REG NA

DefList: {  }
N023 (  3,  4) [000140] ------------              *  LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] NA REG NA $304
Interval  7: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #5   @24  RefTypeDef <Ivl:7> LCL_FLD BB01 regmask=[allFloat] minReg=1>

DefList: { N023.t140. LCL_FLD }
N025 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1 NA REG NA
<RefPosition #6   @25  RefTypeUse <Ivl:7>  BB01 regmask=[allFloat] minReg=1 last>
Assigning related <V12/L2> to <I7>
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N027 (  3,  4) [000145] ------------              *  LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] NA REG NA $305
Interval  8: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #8   @28  RefTypeDef <Ivl:8> LCL_FLD BB01 regmask=[allFloat] minReg=1>

DefList: { N027.t145. LCL_FLD }
N029 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1 NA REG NA
<RefPosition #9   @29  RefTypeUse <Ivl:8>  BB01 regmask=[allFloat] minReg=1 last>
Assigning related <V13/L3> to <I8>
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N031 (  3,  4) [000151] ------------              *  LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] NA REG NA $306
Interval  9: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #11  @32  RefTypeDef <Ivl:9> LCL_FLD BB01 regmask=[allFloat] minReg=1>

DefList: { N031.t151. LCL_FLD }
N033 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1 NA REG NA
<RefPosition #12  @33  RefTypeUse <Ivl:9>  BB01 regmask=[allFloat] minReg=1 last>
Assigning related <V14/L4> to <I9>
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N035 (  3,  4) [000157] ------------              *  LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] NA (last use) REG NA $307
Interval 10: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #14  @36  RefTypeDef <Ivl:10> LCL_FLD BB01 regmask=[allFloat] minReg=1>

DefList: { N035.t157. LCL_FLD }
N037 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1 NA REG NA
<RefPosition #15  @37  RefTypeUse <Ivl:10>  BB01 regmask=[allFloat] minReg=1 last>
Assigning related <V15/L5> to <I10>
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N039 (  3,  4) [000057] ------------              *  LCL_VAR   float  V12 tmp11        u:1 NA (last use) REG NA $304

DefList: {  }
N041 (  1,  1) [000200] ------------              *  CNS_DBL   float  0.00000000000000000 REG NA $240
Interval 11: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #17  @42  RefTypeDef <Ivl:11> CNS_DBL BB01 regmask=[allFloat] minReg=1>

DefList: { N041.t200. CNS_DBL }
N043 (  5,  6) [000061] N------N-U--              *  NE        void   REG NA $380
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #19  @43  RefTypeUse <Ivl:11>  BB01 regmask=[allFloat] minReg=1 last>

DefList: {  }
N045 (  7,  8) [000062] ------------              *  JTRUE     void   REG NA



CHECKING LAST USES for BB01, liveout={V13 V14 V15}
==============================
use: {V00}
def: {V02 V12 V13 V14 V15}

NEW BLOCK BB02


Setting BB01 as the predecessor for determining incoming variable registers of BB02
<RefPosition #20  @47  RefTypeBB  BB02 regmask=[] minReg=1>

DefList: {  }
N049 (  3,  4) [000070] ------------              *  LCL_VAR   float  V13 tmp12        u:1 NA (last use) REG NA $305

DefList: {  }
N051 (  1,  1) [000201] ------------              *  CNS_DBL   float  0.00000000000000000 REG NA $240
Interval 12: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #21  @52  RefTypeDef <Ivl:12> CNS_DBL BB02 regmask=[allFloat] minReg=1>

DefList: { N051.t201. CNS_DBL }
N053 (  5,  6) [000074] N------N-U--              *  NE        void   REG NA $381
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[allFloat] minReg=1 last>
<RefPosition #23  @53  RefTypeUse <Ivl:12>  BB02 regmask=[allFloat] minReg=1 last>

DefList: {  }
N055 (  7,  8) [000075] ------------              *  JTRUE     void   REG NA



CHECKING LAST USES for BB02, liveout={V14 V15}
==============================
use: {V13}
def: {}

NEW BLOCK BB03


Setting BB02 as the predecessor for determining incoming variable registers of BB03
<RefPosition #24  @57  RefTypeBB  BB03 regmask=[] minReg=1>

DefList: {  }
N059 (  3,  4) [000078] ------------              *  LCL_VAR   float  V14 tmp13        u:1 NA (last use) REG NA $306

DefList: {  }
N061 (  1,  1) [000202] ------------              *  CNS_DBL   float  0.00000000000000000 REG NA $240
Interval 13: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #25  @62  RefTypeDef <Ivl:13> CNS_DBL BB03 regmask=[allFloat] minReg=1>

DefList: { N061.t202. CNS_DBL }
N063 (  5,  6) [000082] N------N-U--              *  NE        void   REG NA $382
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[allFloat] minReg=1 last>
<RefPosition #27  @63  RefTypeUse <Ivl:13>  BB03 regmask=[allFloat] minReg=1 last>

DefList: {  }
N065 (  7,  8) [000083] ------------              *  JTRUE     void   REG NA



CHECKING LAST USES for BB03, liveout={V15}
==============================
use: {V14}
def: {}

NEW BLOCK BB04


Setting BB03 as the predecessor for determining incoming variable registers of BB04
<RefPosition #28  @67  RefTypeBB  BB04 regmask=[] minReg=1>

DefList: {  }
N069 (  3,  4) [000086] ------------              *  LCL_VAR   float  V15 tmp14        u:1 NA (last use) REG NA $307

DefList: {  }
N071 (  1,  1) [000203] -c----------              *  CNS_DBL   float  1.0000000000000000 REG NA $241
Contained
DefList: {  }
N073 (  8,  6) [000090] ------------              *  EQ        int    REG NA $383
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[allFloat] minReg=1 last>
Interval 14: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #30  @74  RefTypeDef <Ivl:14> EQ BB04 regmask=[allInt] minReg=1>

DefList: { N073.t90. EQ }
N075 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3 NA REG NA
<RefPosition #31  @75  RefTypeUse <Ivl:14>  BB04 regmask=[allInt] minReg=1 last>
Assigning related <V05/L1> to <I14>
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[allInt] minReg=1 last>



CHECKING LAST USES for BB04, liveout={V05}
==============================
use: {V15}
def: {V05}

NEW BLOCK BB05


Setting BB01 as the predecessor for determining incoming variable registers of BB05
<RefPosition #33  @77  RefTypeBB  BB05 regmask=[] minReg=1>

DefList: {  }
N079 (  1,  1) [000063] ------------              *  CNS_INT   int    0 REG NA $40
Interval 15: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #34  @80  RefTypeDef <Ivl:15> CNS_INT BB05 regmask=[allInt] minReg=1>

DefList: { N079.t63. CNS_INT }
N081 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2 NA REG NA
<RefPosition #35  @81  RefTypeUse <Ivl:15>  BB05 regmask=[allInt] minReg=1 last>
Assigning related <V05/L1> to <I15>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[allInt] minReg=1 last>



CHECKING LAST USES for BB05, liveout={V05}
==============================
use: {}
def: {V05}

NEW BLOCK BB06


Setting BB04 as the predecessor for determining incoming variable registers of BB06
<RefPosition #37  @83  RefTypeBB  BB06 regmask=[] minReg=1>

DefList: {  }
N085 (  4,  3) [000093] ------------              *  LCL_VAR   bool   V05 tmp4         u:1 NA (last use) REG NA $440

DefList: {  }
N087 (  5,  4) [000018] ------------              *  RETURN    int    REG NA $3c2
<RefPosition #38  @87  RefTypeFixedReg <Reg:rax>  BB06 regmask=[rax] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>



CHECKING LAST USES for BB06, liveout={}
==============================
use: {V05}
def: {}

Linear scan intervals BEFORE VALIDATING INTERVALS:
Interval  0: (V00) byref RefPositions {#0@0 #3@11} physReg:rcx Preferences=[rcx]
Interval  1: (V05) int RefPositions {#32@76 #36@82 #39@87} physReg:NA Preferences=[rax]
Interval  2: (V12) float (field) RefPositions {#7@26 #18@43} physReg:NA Preferences=[allFloat]
Interval  3: (V13) float (field) RefPositions {#10@30 #22@53} physReg:NA Preferences=[allFloat]
Interval  4: (V14) float (field) RefPositions {#13@34 #26@63} physReg:NA Preferences=[allFloat]
Interval  5: (V15) float (field) RefPositions {#16@38 #29@73} physReg:NA Preferences=[allFloat]
Interval  6: float (INTERNAL) RefPositions {#2@11 #4@11} physReg:NA Preferences=[allFloat]
Interval  7: float RefPositions {#5@24 #6@25} physReg:NA Preferences=[allFloat] RelatedInterval <V12/L2>
Interval  8: float RefPositions {#8@28 #9@29} physReg:NA Preferences=[allFloat] RelatedInterval <V13/L3>
Interval  9: float RefPositions {#11@32 #12@33} physReg:NA Preferences=[allFloat] RelatedInterval <V14/L4>
Interval 10: float RefPositions {#14@36 #15@37} physReg:NA Preferences=[allFloat] RelatedInterval <V15/L5>
Interval 11: float (constant) RefPositions {#17@42 #19@43} physReg:NA Preferences=[allFloat]
Interval 12: float (constant) RefPositions {#21@52 #23@53} physReg:NA Preferences=[allFloat]
Interval 13: float (constant) RefPositions {#25@62 #27@63} physReg:NA Preferences=[allFloat]
Interval 14: int RefPositions {#30@74 #31@75} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>
Interval 15: int (constant) RefPositions {#34@80 #35@81} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>

------------
REFPOSITIONS BEFORE VALIDATING INTERVALS: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #2   @11  RefTypeDef <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #4   @11  RefTypeUse <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #5   @24  RefTypeDef <Ivl:7> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #6   @25  RefTypeUse <Ivl:7>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #8   @28  RefTypeDef <Ivl:8> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #9   @29  RefTypeUse <Ivl:8>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #11  @32  RefTypeDef <Ivl:9> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #12  @33  RefTypeUse <Ivl:9>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #14  @36  RefTypeDef <Ivl:10> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #15  @37  RefTypeUse <Ivl:10>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #17  @42  RefTypeDef <Ivl:11> CNS_DBL BB01 regmask=[allFloat] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #19  @43  RefTypeUse <Ivl:11>  BB01 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #20  @47  RefTypeBB  BB02 regmask=[] minReg=1>
<RefPosition #21  @52  RefTypeDef <Ivl:12> CNS_DBL BB02 regmask=[allFloat] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[allFloat] minReg=1 last>
<RefPosition #23  @53  RefTypeUse <Ivl:12>  BB02 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #24  @57  RefTypeBB  BB03 regmask=[] minReg=1>
<RefPosition #25  @62  RefTypeDef <Ivl:13> CNS_DBL BB03 regmask=[allFloat] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[allFloat] minReg=1 last>
<RefPosition #27  @63  RefTypeUse <Ivl:13>  BB03 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #28  @67  RefTypeBB  BB04 regmask=[] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[allFloat] minReg=1 last>
<RefPosition #30  @74  RefTypeDef <Ivl:14> EQ BB04 regmask=[allInt] minReg=1>
<RefPosition #31  @75  RefTypeUse <Ivl:14>  BB04 regmask=[allInt] minReg=1 last>
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[allInt] minReg=1>
<RefPosition #33  @77  RefTypeBB  BB05 regmask=[] minReg=1>
<RefPosition #34  @80  RefTypeDef <Ivl:15> CNS_INT BB05 regmask=[allInt] minReg=1>
<RefPosition #35  @81  RefTypeUse <Ivl:15>  BB05 regmask=[allInt] minReg=1 last>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[allInt] minReg=1>
<RefPosition #37  @83  RefTypeBB  BB06 regmask=[] minReg=1>
<RefPosition #38  @87  RefTypeFixedReg <Reg:rax>  BB06 regmask=[rax] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>
-----------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
-----------------
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[allInt] minReg=1>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[allInt] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>
-----------------
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allFloat] minReg=1 last>
-----------------
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[allFloat] minReg=1 last>
-----------------
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[allFloat] minReg=1 last>
-----------------
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[allFloat] minReg=1 last>
TUPLE STYLE DUMP WITH REF POSITIONS
Incoming Parameters:  V00
BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
=====
  N003.                    IL_OFFSET IL offset: 0x0
  N005.                    V00(L0)
  N007.                    IND      
  N009.                    LCL_VAR_ADDR V02 tmp1          NA
  N011.                    STORE_BLK
        Def:<T6>(#2)
                               Use:<V00/L0>(#3) *
                               Use:<T6>(#4) *
  N013.                    IL_OFFSET IL offset: 0x0
  N015.                    IL_OFFSET IL offset: 0x0
  N017.                    IL_OFFSET IL offset: 0x0
  N019.                    IL_OFFSET IL offset: 0x0
  N021.                    IL_OFFSET IL offset: 0x0
  N023.                    V02 MEM
        Def:<I7>(#5) Pref:<V12/L2>
  N025.                    V12(L2)
                               Use:<I7>(#6) *
        Def:<V12/L2>(#7)
  N027.                    V02 MEM
        Def:<I8>(#8) Pref:<V13/L3>
  N029.                    V13(L3)
                               Use:<I8>(#9) *
        Def:<V13/L3>(#10)
  N031.                    V02 MEM
        Def:<I9>(#11) Pref:<V14/L4>
  N033.                    V14(L4)
                               Use:<I9>(#12) *
        Def:<V14/L4>(#13)
  N035.                    V02 MEM
        Def:<I10>(#14) Pref:<V15/L5>
  N037.                    V15(L5)
                               Use:<I10>(#15) *
        Def:<V15/L5>(#16)
  N039.                    V12(L2)
  N041.                    CNS_DBL   0.00000000000000000
        Def:<I11>(#17)
  N043.                    NE       
                               Use:<V12/L2>(#18) *
                               Use:<I11>(#19) *
  N045.                    JTRUE    

BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
=====
  N049.                    V13(L3)
  N051.                    CNS_DBL   0.00000000000000000
        Def:<I12>(#21)
  N053.                    NE       
                               Use:<V13/L3>(#22) *
                               Use:<I12>(#23) *
  N055.                    JTRUE    

BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
=====
  N059.                    V14(L4)
  N061.                    CNS_DBL   0.00000000000000000
        Def:<I13>(#25)
  N063.                    NE       
                               Use:<V14/L4>(#26) *
                               Use:<I13>(#27) *
  N065.                    JTRUE    

BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
=====
  N069.                    V15(L5)
  N071.                    CNS_DBL   1.0000000000000000
  N073.                    EQ       
                               Use:<V15/L5>(#29) *
        Def:<I14>(#30) Pref:<V05/L1>
  N075.                    V05(L1)
                               Use:<I14>(#31) *
        Def:<V05/L1>(#32)

BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
=====
  N079.                    CNS_INT   0
        Def:<I15>(#34) Pref:<V05/L1>
  N081.                    V05(L1)
                               Use:<I15>(#35) *
        Def:<V05/L1>(#36)

BB06 [???..???) (return), preds={BB04,BB05} succs={}
=====
  N085.                    V05(L1)
  N087.                    RETURN   
                               Use:<V05/L1>(#39) Fixed:rax(#38) *




Linear scan intervals after buildIntervals:
Interval  0: (V00) byref RefPositions {#0@0 #3@11} physReg:rcx Preferences=[rcx]
Interval  1: (V05) int RefPositions {#32@76 #36@82 #39@87} physReg:NA Preferences=[rax]
Interval  2: (V12) float (field) RefPositions {#7@26 #18@43} physReg:NA Preferences=[allFloat]
Interval  3: (V13) float (field) RefPositions {#10@30 #22@53} physReg:NA Preferences=[allFloat]
Interval  4: (V14) float (field) RefPositions {#13@34 #26@63} physReg:NA Preferences=[allFloat]
Interval  5: (V15) float (field) RefPositions {#16@38 #29@73} physReg:NA Preferences=[allFloat]
Interval  6: float (INTERNAL) RefPositions {#2@11 #4@11} physReg:NA Preferences=[allFloat]
Interval  7: float RefPositions {#5@24 #6@25} physReg:NA Preferences=[allFloat] RelatedInterval <V12/L2>
Interval  8: float RefPositions {#8@28 #9@29} physReg:NA Preferences=[allFloat] RelatedInterval <V13/L3>
Interval  9: float RefPositions {#11@32 #12@33} physReg:NA Preferences=[allFloat] RelatedInterval <V14/L4>
Interval 10: float RefPositions {#14@36 #15@37} physReg:NA Preferences=[allFloat] RelatedInterval <V15/L5>
Interval 11: float (constant) RefPositions {#17@42 #19@43} physReg:NA Preferences=[allFloat]
Interval 12: float (constant) RefPositions {#21@52 #23@53} physReg:NA Preferences=[allFloat]
Interval 13: float (constant) RefPositions {#25@62 #27@63} physReg:NA Preferences=[allFloat]
Interval 14: int RefPositions {#30@74 #31@75} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>
Interval 15: int (constant) RefPositions {#34@80 #35@81} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>

*************** In LinearScan::allocateRegisters()

Linear scan intervals before allocateRegisters:
Interval  0: (V00) byref RefPositions {#0@0 #3@11} physReg:rcx Preferences=[rcx]
Interval  1: (V05) int RefPositions {#32@76 #36@82 #39@87} physReg:NA Preferences=[rax]
Interval  2: (V12) float (field) RefPositions {#7@26 #18@43} physReg:NA Preferences=[allFloat]
Interval  3: (V13) float (field) RefPositions {#10@30 #22@53} physReg:NA Preferences=[allFloat]
Interval  4: (V14) float (field) RefPositions {#13@34 #26@63} physReg:NA Preferences=[allFloat]
Interval  5: (V15) float (field) RefPositions {#16@38 #29@73} physReg:NA Preferences=[allFloat]
Interval  6: float (INTERNAL) RefPositions {#2@11 #4@11} physReg:NA Preferences=[allFloat]
Interval  7: float RefPositions {#5@24 #6@25} physReg:NA Preferences=[allFloat] RelatedInterval <V12/L2>
Interval  8: float RefPositions {#8@28 #9@29} physReg:NA Preferences=[allFloat] RelatedInterval <V13/L3>
Interval  9: float RefPositions {#11@32 #12@33} physReg:NA Preferences=[allFloat] RelatedInterval <V14/L4>
Interval 10: float RefPositions {#14@36 #15@37} physReg:NA Preferences=[allFloat] RelatedInterval <V15/L5>
Interval 11: float (constant) RefPositions {#17@42 #19@43} physReg:NA Preferences=[allFloat]
Interval 12: float (constant) RefPositions {#21@52 #23@53} physReg:NA Preferences=[allFloat]
Interval 13: float (constant) RefPositions {#25@62 #27@63} physReg:NA Preferences=[allFloat]
Interval 14: int RefPositions {#30@74 #31@75} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>
Interval 15: int (constant) RefPositions {#34@80 #35@81} physReg:NA Preferences=[allInt] RelatedInterval <V05/L1>

------------
REFPOSITIONS BEFORE ALLOCATION: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #2   @11  RefTypeDef <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #4   @11  RefTypeUse <Ivl:6 internal> STORE_BLK BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #5   @24  RefTypeDef <Ivl:7> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #6   @25  RefTypeUse <Ivl:7>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #8   @28  RefTypeDef <Ivl:8> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #9   @29  RefTypeUse <Ivl:8>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #11  @32  RefTypeDef <Ivl:9> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #12  @33  RefTypeUse <Ivl:9>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #14  @36  RefTypeDef <Ivl:10> LCL_FLD BB01 regmask=[allFloat] minReg=1>
<RefPosition #15  @37  RefTypeUse <Ivl:10>  BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #17  @42  RefTypeDef <Ivl:11> CNS_DBL BB01 regmask=[allFloat] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allFloat] minReg=1 last>
<RefPosition #19  @43  RefTypeUse <Ivl:11>  BB01 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #20  @47  RefTypeBB  BB02 regmask=[] minReg=1>
<RefPosition #21  @52  RefTypeDef <Ivl:12> CNS_DBL BB02 regmask=[allFloat] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[allFloat] minReg=1 last>
<RefPosition #23  @53  RefTypeUse <Ivl:12>  BB02 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #24  @57  RefTypeBB  BB03 regmask=[] minReg=1>
<RefPosition #25  @62  RefTypeDef <Ivl:13> CNS_DBL BB03 regmask=[allFloat] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[allFloat] minReg=1 last>
<RefPosition #27  @63  RefTypeUse <Ivl:13>  BB03 regmask=[allFloat] minReg=1 last regOptional>
<RefPosition #28  @67  RefTypeBB  BB04 regmask=[] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[allFloat] minReg=1 last>
<RefPosition #30  @74  RefTypeDef <Ivl:14> EQ BB04 regmask=[allInt] minReg=1>
<RefPosition #31  @75  RefTypeUse <Ivl:14>  BB04 regmask=[allInt] minReg=1 last>
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[allInt] minReg=1>
<RefPosition #33  @77  RefTypeBB  BB05 regmask=[] minReg=1>
<RefPosition #34  @80  RefTypeDef <Ivl:15> CNS_INT BB05 regmask=[allInt] minReg=1>
<RefPosition #35  @81  RefTypeUse <Ivl:15>  BB05 regmask=[allInt] minReg=1 last>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[allInt] minReg=1>
<RefPosition #37  @83  RefTypeBB  BB06 regmask=[] minReg=1>
<RefPosition #38  @87  RefTypeFixedReg <Reg:rax>  BB06 regmask=[rax] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>

VAR REFPOSITIONS BEFORE ALLOCATION
--- V00  (Interval 0)
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V01
--- V02
--- V03
--- V04
--- V05  (Interval 1)
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[allInt] minReg=1>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[allInt] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>
--- V06
--- V07
--- V08
--- V09
--- V10
--- V11
--- V12  (Interval 2)
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allFloat] minReg=1 last>
--- V13  (Interval 3)
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[allFloat] minReg=1 last>
--- V14  (Interval 4)
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[allFloat] minReg=1 last>
--- V15  (Interval 5)
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[allFloat] minReg=1 last>
--- V16
--- V17
--- V18
--- V19
--- V20



Allocating Registers
--------------------
The following table has one or more rows for each RefPosition that is handled during allocation.
The first column provides the basic information about the RefPosition, with its type (e.g. Def,
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the
action taken during allocation (e.g. Alloc a new register, or Keep an existing one).
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is
active, a 'p' if it is a large vector that has been partially spilled, and 'i'if it is inactive.
Columns are only printed up to the last modifed register, which may increase during allocation,
in which case additional columns will appear.  
Registers which are not marked modified have ---- in their column.

------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
                              |    |V0 a|    |    |    |    |    |    |    |    |    |    |    |    |
 0.#0  V0   Parm   Keep  rcx  |    |V0 a|    |    |    |    |    |    |    |    |    |    |    |    |
 1.#1  BB1 PredBB0            |    |V0 a|    |    |    |    |    |    |    |    |    |    |    |    |
11.#2  I6   Def    Alloc mm0  |    |V0 a|    |    |    |    |    |    |    |I6 a|    |    |    |    |
11.#3  V0   Use *  Keep  rcx  |    |V0 a|    |    |    |    |    |    |    |I6 a|    |    |    |    |
11.#4  I6   Use *  Keep  mm0  |    |V0 a|    |    |    |    |    |    |    |I6 a|    |    |    |    |
24.#5  I7   Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |I7 a|    |    |    |    |
25.#6  I7   Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |I7 a|    |    |    |    |
26.#7  V12  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |V12a|    |    |    |    |
28.#8  I8   Def    Alloc mm1  |    |    |    |    |    |    |    |    |    |V12a|I8 a|    |    |    |
29.#9  I8   Use *  Keep  mm1  |    |    |    |    |    |    |    |    |    |V12a|I8 a|    |    |    |
30.#10 V13  Def    Alloc mm1  |    |    |    |    |    |    |    |    |    |V12a|V13a|    |    |    |
32.#11 I9   Def    Alloc mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|I9 a|    |    |
33.#12 I9   Use *  Keep  mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|I9 a|    |    |
34.#13 V14  Def    Alloc mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
36.#14 I10  Def    Alloc mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|I10a|    |    |
37.#15 I10  Use *  Keep  mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|I10a|    |    |
38.#16 V15  Def    Alloc mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
42.#17 C11  Def    Alloc mm4  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|C11a|    |    |
43.#18 V12  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|C11a|    |    |
43.#19 C11  Use *  Keep  mm4  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|C11a|    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
47.#20 BB2 PredBB1            |    |    |    |    |    |    |    |    |    |    |V13a|V14a|V15a|    |    |    |
52.#21 C12  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |C12a|V13a|V14a|V15a|    |    |    |
53.#22 V13  Use *  Keep  mm1  |    |    |    |    |    |    |    |    |    |C12a|V13a|V14a|V15a|    |    |    |
53.#23 C12  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |C12a|V13a|V14a|V15a|    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
57.#24 BB3 PredBB2            |    |    |    |    |    |    |    |    |    |    |    |V14a|V15a|    |    |    |
62.#25 C13  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |C13a|    |V14a|V15a|    |    |    |
63.#26 V14  Use *  Keep  mm2  |    |    |    |    |    |    |    |    |    |C13a|    |V14a|V15a|    |    |    |
63.#27 C13  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |C13a|    |V14a|V15a|    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
67.#28 BB4 PredBB3            |    |    |    |    |    |    |    |    |    |    |    |    |V15a|    |    |    |
73.#29 V15  Use *  Keep  mm3  |    |    |    |    |    |    |    |    |    |    |    |    |V15a|    |    |    |
74.#30 I14  Def    Alloc rax  |I14a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
75.#31 I14  Use *  Keep  rax  |I14a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
76.#32 V5   Def    Alloc rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
77.#33 BB5 PredBB1            |V5 i|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
80.#34 C15  Def    Alloc rax  |C15a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
81.#35 C15  Use *  Keep  rax  |C15a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
82.#36 V5   Def    Restr rax  |V5 i|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
                   Alloc rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
83.#37 BB6 PredBB4            |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
87.#38 rax  Fixd   Keep  rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
87.#39 V5   Use *  Keep  rax  |    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |

------------
REFPOSITIONS AFTER ALLOCATION: 
------------
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #1   @1   RefTypeBB  BB01 regmask=[] minReg=1>
<RefPosition #2   @11  RefTypeDef <Ivl:6 internal> STORE_BLK BB01 regmask=[mm0] minReg=1>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
<RefPosition #4   @11  RefTypeUse <Ivl:6 internal> STORE_BLK BB01 regmask=[mm0] minReg=1 last>
<RefPosition #5   @24  RefTypeDef <Ivl:7> LCL_FLD BB01 regmask=[mm0] minReg=1>
<RefPosition #6   @25  RefTypeUse <Ivl:7>  BB01 regmask=[mm0] minReg=1 last>
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1>
<RefPosition #8   @28  RefTypeDef <Ivl:8> LCL_FLD BB01 regmask=[mm1] minReg=1>
<RefPosition #9   @29  RefTypeUse <Ivl:8>  BB01 regmask=[mm1] minReg=1 last>
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[mm1] minReg=1>
<RefPosition #11  @32  RefTypeDef <Ivl:9> LCL_FLD BB01 regmask=[mm2] minReg=1>
<RefPosition #12  @33  RefTypeUse <Ivl:9>  BB01 regmask=[mm2] minReg=1 last>
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[mm2] minReg=1>
<RefPosition #14  @36  RefTypeDef <Ivl:10> LCL_FLD BB01 regmask=[mm3] minReg=1>
<RefPosition #15  @37  RefTypeUse <Ivl:10>  BB01 regmask=[mm3] minReg=1 last>
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[mm3] minReg=1>
<RefPosition #17  @42  RefTypeDef <Ivl:11> CNS_DBL BB01 regmask=[mm4] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[mm0] minReg=1 last>
<RefPosition #19  @43  RefTypeUse <Ivl:11>  BB01 regmask=[mm4] minReg=1 last regOptional>
<RefPosition #20  @47  RefTypeBB  BB02 regmask=[] minReg=1>
<RefPosition #21  @52  RefTypeDef <Ivl:12> CNS_DBL BB02 regmask=[mm0] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[mm1] minReg=1 last>
<RefPosition #23  @53  RefTypeUse <Ivl:12>  BB02 regmask=[mm0] minReg=1 last regOptional>
<RefPosition #24  @57  RefTypeBB  BB03 regmask=[] minReg=1>
<RefPosition #25  @62  RefTypeDef <Ivl:13> CNS_DBL BB03 regmask=[mm0] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[mm2] minReg=1 last>
<RefPosition #27  @63  RefTypeUse <Ivl:13>  BB03 regmask=[mm0] minReg=1 last regOptional>
<RefPosition #28  @67  RefTypeBB  BB04 regmask=[] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[mm3] minReg=1 last>
<RefPosition #30  @74  RefTypeDef <Ivl:14> EQ BB04 regmask=[rax] minReg=1>
<RefPosition #31  @75  RefTypeUse <Ivl:14>  BB04 regmask=[rax] minReg=1 last>
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[rax] minReg=1>
<RefPosition #33  @77  RefTypeBB  BB05 regmask=[] minReg=1>
<RefPosition #34  @80  RefTypeDef <Ivl:15> CNS_INT BB05 regmask=[rax] minReg=1>
<RefPosition #35  @81  RefTypeUse <Ivl:15>  BB05 regmask=[rax] minReg=1 last>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[rax] minReg=1>
<RefPosition #37  @83  RefTypeBB  BB06 regmask=[] minReg=1>
<RefPosition #38  @87  RefTypeFixedReg <Reg:rax>  BB06 regmask=[rax] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>

VAR REFPOSITIONS AFTER ALLOCATION
--- V00  (Interval 0)
<RefPosition #0   @0   RefTypeParamDef <Ivl:0 V00>  BB00 regmask=[rcx] minReg=1 fixed regOptional>
<RefPosition #3   @11  RefTypeUse <Ivl:0 V00> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
--- V01
--- V02
--- V03
--- V04
--- V05  (Interval 1)
<RefPosition #32  @76  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB04 regmask=[rax] minReg=1>
<RefPosition #36  @82  RefTypeDef <Ivl:1 V05> STORE_LCL_VAR BB05 regmask=[rax] minReg=1>
<RefPosition #39  @87  RefTypeUse <Ivl:1 V05> LCL_VAR BB06 regmask=[rax] minReg=1 last fixed>
--- V06
--- V07
--- V08
--- V09
--- V10
--- V11
--- V12  (Interval 2)
<RefPosition #7   @26  RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1>
<RefPosition #18  @43  RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[mm0] minReg=1 last>
--- V13  (Interval 3)
<RefPosition #10  @30  RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[mm1] minReg=1>
<RefPosition #22  @53  RefTypeUse <Ivl:3 V13> LCL_VAR BB02 regmask=[mm1] minReg=1 last>
--- V14  (Interval 4)
<RefPosition #13  @34  RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[mm2] minReg=1>
<RefPosition #26  @63  RefTypeUse <Ivl:4 V14> LCL_VAR BB03 regmask=[mm2] minReg=1 last>
--- V15  (Interval 5)
<RefPosition #16  @38  RefTypeDef <Ivl:5 V15> STORE_LCL_VAR BB01 regmask=[mm3] minReg=1>
<RefPosition #29  @73  RefTypeUse <Ivl:5 V15> LCL_VAR BB04 regmask=[mm3] minReg=1 last>
--- V16
--- V17
--- V18
--- V19
--- V20

Active intervals at end of allocation:

-----------------------
RESOLVING BB BOUNDARIES
-----------------------
Resolution Candidates: {V00 V05 V13 V14 V15}
Has Critical Edges

Prior to Resolution

BB01
use def in out
{V00}
{V02 V12 V13 V14 V15}
{V00}
{V13 V14 V15}
Var=Reg beg of BB01: V00=rcx 
Var=Reg end of BB01: V15=mm3 V13=mm1 V14=mm2 

BB02
use def in out
{V13}
{}
{V13 V14 V15}
{V14 V15}
Var=Reg beg of BB02: V15=mm3 V13=mm1 V14=mm2 
Var=Reg end of BB02: V15=mm3 V14=mm2 

BB03
use def in out
{V14}
{}
{V14 V15}
{V15}
Var=Reg beg of BB03: V15=mm3 V14=mm2 
Var=Reg end of BB03: V15=mm3 

BB04
use def in out
{V15}
{V05}
{V15}
{V05}
Var=Reg beg of BB04: V15=mm3 
Var=Reg end of BB04: V05=rax 

BB05
use def in out
{}
{V05}
{}
{V05}
Var=Reg beg of BB05: none
Var=Reg end of BB05: V05=rax 

BB06
use def in out
{V05}
{}
{V05}
{}
Var=Reg beg of BB06: V05=rax 
Var=Reg end of BB06: none


RESOLVING EDGES
  Set V00 argument initial register to rcx
Trees after linear scan register allocator (LSRA)

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
N003 (???,???) [000204] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N005 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 rcx (last use) REG rcx $80
                                                  /--*  t0     byref  
N007 (  3,  2) [000001] -c-XG-------         t1 = *  IND       struct REG NA <l:$1c1, c:$1c0>
N009 (???,???) [000210] Dc-----N----       t210 =    LCL_VAR_ADDR byref  V02 tmp1          NA REG NA
                                                  /--*  t210   byref  
                                                  +--*  t1     struct 
N011 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll) REG NA
N013 (???,???) [000205] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N015 (???,???) [000206] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N017 (???,???) [000207] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N019 (???,???) [000208] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N021 (???,???) [000209] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
N023 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] mm0 REG mm0 $304
                                                  /--*  t140   float  
N025 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1 mm0 REG mm0
N027 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] mm1 REG mm1 $305
                                                  /--*  t145   float  
N029 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1 mm1 REG mm1
N031 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] mm2 REG mm2 $306
                                                  /--*  t151   float  
N033 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1 mm2 REG mm2
N035 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] mm3 (last use) REG mm3 $307
                                                  /--*  t157   float  
N037 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1 mm3 REG mm3
N039 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 mm0 (last use) REG mm0 $304
N041 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 REG mm4 $240
                                                  /--*  t57    float  
                                                  +--*  t200   float  
N043 (  5,  6) [000061] N------N-U--              *  NE        void   REG NA $380
N045 (  7,  8) [000062] ------------              *  JTRUE     void   REG NA

------------ BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
N049 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 mm1 (last use) REG mm1 $305
N051 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 REG mm0 $240
                                                  /--*  t70    float  
                                                  +--*  t201   float  
N053 (  5,  6) [000074] N------N-U--              *  NE        void   REG NA $381
N055 (  7,  8) [000075] ------------              *  JTRUE     void   REG NA

------------ BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
N059 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 mm2 (last use) REG mm2 $306
N061 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 REG mm0 $240
                                                  /--*  t78    float  
                                                  +--*  t202   float  
N063 (  5,  6) [000082] N------N-U--              *  NE        void   REG NA $382
N065 (  7,  8) [000083] ------------              *  JTRUE     void   REG NA

------------ BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
N069 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 mm3 (last use) REG mm3 $307
N071 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 REG NA $241
                                                  /--*  t86    float  
                                                  +--*  t203   float  
N073 (  8,  6) [000090] ------------        t90 = *  EQ        int    REG rax $383
                                                  /--*  t90    int    
N075 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3 rax REG rax

------------ BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
N079 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 REG rax $40
                                                  /--*  t63    int    
N081 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2 rax REG rax

------------ BB06 [???..???) (return), preds={BB04,BB05} succs={}
N001 (  0,  0) [000186] ------------       t186 =    PHI_ARG   bool   V05 tmp4         u:3 rax $383
N002 (  0,  0) [000185] ------------       t185 =    PHI_ARG   bool   V05 tmp4         u:2 rax $40
                                                  /--*  t186   bool   
                                                  +--*  t185   bool   
N003 (  0,  0) [000183] ------------       t183 = *  PHI       bool  
                                                  /--*  t183   bool   
N005 (  0,  0) [000184] DA----------              *  STORE_LCL_VAR bool   V05 tmp4         d:1 rax
N085 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 rax (last use) REG rax $440
                                                  /--*  t93    bool   
N087 (  5,  4) [000018] ------------              *  RETURN    int    REG NA $3c2

-------------------------------------------------------------------------------------------------------------------

Final allocation
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
 0.#0  V0   Parm   Alloc rcx  |    |V0 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |
 1.#1  BB1 PredBB0            |    |V0 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |
11.#2  I6   Def    Alloc mm0  |    |V0 a|    |    |    |    |    |    |    |I6 a|    |    |    |    |    |    |
11.#3  V0   Use *  Keep  rcx  |    |V0 i|    |    |    |    |    |    |    |I6 a|    |    |    |    |    |    |
11.#4  I6   Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |I6 i|    |    |    |    |    |    |
24.#5  I7   Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |I7 a|    |    |    |    |    |    |
25.#6  I7   Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |I7 i|    |    |    |    |    |    |
26.#7  V12  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |V12a|    |    |    |    |    |    |
28.#8  I8   Def    Alloc mm1  |    |    |    |    |    |    |    |    |    |V12a|I8 a|    |    |    |    |    |
29.#9  I8   Use *  Keep  mm1  |    |    |    |    |    |    |    |    |    |V12a|I8 i|    |    |    |    |    |
30.#10 V13  Def    Alloc mm1  |    |    |    |    |    |    |    |    |    |V12a|V13a|    |    |    |    |    |
32.#11 I9   Def    Alloc mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|I9 a|    |    |    |    |
33.#12 I9   Use *  Keep  mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|I9 i|    |    |    |    |
34.#13 V14  Def    Alloc mm2  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|    |    |    |    |
36.#14 I10  Def    Alloc mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|I10a|    |    |    |
37.#15 I10  Use *  Keep  mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|I10i|    |    |    |
38.#16 V15  Def    Alloc mm3  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|    |    |    |
42.#17 C11  Def    Alloc mm4  |    |    |    |    |    |    |    |    |    |V12a|V13a|V14a|V15a|C11a|    |    |
43.#18 V12  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |V12i|V13a|V14a|V15a|C11a|    |    |
43.#19 C11  Use *  Keep  mm4  |    |    |    |    |    |    |    |    |    |    |V13a|V14a|V15a|C11i|    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
47.#20 BB2 PredBB1            |    |    |    |    |    |    |    |    |    |    |V13a|V14a|V15a|    |    |    |
52.#21 C12  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |C12a|V13a|V14a|V15a|    |    |    |
53.#22 V13  Use *  Keep  mm1  |    |    |    |    |    |    |    |    |    |C12a|V13i|V14a|V15a|    |    |    |
53.#23 C12  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |C12i|    |V14a|V15a|    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
57.#24 BB3 PredBB2            |    |    |    |    |    |    |    |    |    |    |    |V14a|V15a|    |    |    |
62.#25 C13  Def    Alloc mm0  |    |    |    |    |    |    |    |    |    |C13a|    |V14a|V15a|    |    |    |
63.#26 V14  Use *  Keep  mm2  |    |    |    |    |    |    |    |    |    |C13a|    |V14i|V15a|    |    |    |
63.#27 C13  Use *  Keep  mm0  |    |    |    |    |    |    |    |    |    |C13i|    |    |V15a|    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
67.#28 BB4 PredBB3            |    |    |    |    |    |    |    |    |    |    |    |    |V15a|    |    |    |
73.#29 V15  Use *  Keep  mm3  |    |    |    |    |    |    |    |    |    |    |    |    |V15i|    |    |    |
74.#30 I14  Def    Alloc rax  |I14a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
75.#31 I14  Use *  Keep  rax  |I14i|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
76.#32 V5   Def    Alloc rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
77.#33 BB5 PredBB1            |    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
80.#34 C15  Def    Alloc rax  |C15a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
81.#35 C15  Use *  Keep  rax  |C15i|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
82.#36 V5   Def    Alloc rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
LocRP# Name Type  Action Reg  |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8  |r9  |mm0 |mm1 |mm2 |mm3 |mm4 |mm6 |mm7 |
------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+
83.#37 BB6 PredBB4            |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
87.#38 rax  Fixd   Keep  rax  |V5 a|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |
87.#39 V5   Use *  Keep  rax  |V5 i|    |    |    |    |    |    |    |    |    |    |    |    |    |    |    |

Recording the maximum number of concurrent spills:

----------
LSRA Stats
----------
Total Tracked Vars:  17
Total Reg Cand Vars: 6
Total number of Intervals: 15
Total number of RefPositions: 39
Total Spill Count: 0    Weighted: 0.000000
Total CopyReg Count: 0   Weighted: 0.000000
Total ResolutionMov Count: 0    Weighted: 0.000000
Total number of split edges: 0
Total Number of spill temps created: 0

TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS
Incoming Parameters:  V00(rcx)
BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05}
=====
  N003.                    IL_OFFSET IL offset: 0x0
  N005.                    V00(rcx*)
  N007. STK             =  IND      ; rcx*
  N009.                    LCL_VAR_ADDR V02 tmp1          NA
  N011.                    STORE_BLK; STK
  N013.                    IL_OFFSET IL offset: 0x0
  N015.                    IL_OFFSET IL offset: 0x0
  N017.                    IL_OFFSET IL offset: 0x0
  N019.                    IL_OFFSET IL offset: 0x0
  N021.                    IL_OFFSET IL offset: 0x0
  N023. mm0             =  V02 MEM
* N025.                    V12(mm0); mm0
  N027. mm1             =  V02 MEM
* N029.                    V13(mm1); mm1
  N031. mm2             =  V02 MEM
* N033.                    V14(mm2); mm2
  N035. mm3             =  V02 MEM
* N037.                    V15(mm3); mm3
  N039.                    V12(mm0*)
  N041. mm4             =  CNS_DBL   0.00000000000000000
  N043.                    NE       ; mm0*,mm4
  N045.                    JTRUE    
Var=Reg end of BB01: V15=mm3 V13=mm1 V14=mm2 

BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05}
=====
Predecessor for variable locations: BB01
Var=Reg beg of BB02: V15=mm3 V13=mm1 V14=mm2 
  N049.                    V13(mm1*)
  N051. mm0             =  CNS_DBL   0.00000000000000000
  N053.                    NE       ; mm1*,mm0
  N055.                    JTRUE    
Var=Reg end of BB02: V15=mm3 V14=mm2 

BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05}
=====
Predecessor for variable locations: BB02
Var=Reg beg of BB03: V15=mm3 V14=mm2 
  N059.                    V14(mm2*)
  N061. mm0             =  CNS_DBL   0.00000000000000000
  N063.                    NE       ; mm2*,mm0
  N065.                    JTRUE    
Var=Reg end of BB03: V15=mm3 

BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06}
=====
Predecessor for variable locations: BB03
Var=Reg beg of BB04: V15=mm3 
  N069.                    V15(mm3*)
  N071.                    CNS_DBL   1.0000000000000000
  N073. rax             =  EQ       ; mm3*
* N075.                    V05(rax); rax
Var=Reg end of BB04: V05=rax 

BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06}
=====
Predecessor for variable locations: BB01
Var=Reg beg of BB05: none
  N079. rax             =  CNS_INT   0
* N081.                    V05(rax); rax
Var=Reg end of BB05: V05=rax 

BB06 [???..???) (return), preds={BB04,BB05} succs={}
=====
Predecessor for variable locations: BB04
Var=Reg beg of BB06: V05=rax 
  N085.                    V05(rax*)
  N087.                    RETURN   ; rax*
Var=Reg end of BB06: none




*************** Finishing PHASE Linear scan register alloc
*************** In genGenerateCode()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..011)-> BB05 ( cond )                     i label target LIR 
BB02 [0004]  1       BB01                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB03 [0005]  1       BB02                  0.25    [000..000)-> BB05 ( cond )                     i internal LIR 
BB04 [0006]  1       BB03                  0.50    [000..000)-> BB06 (always)                     i internal LIR 
BB05 [0007]  3       BB01,BB02,BB03        0.50    [000..000)                                     i internal label target LIR 
BB06 [0008]  2       BB04,BB05             1       [???..???)        (return)                     internal label target LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Generate code
*************** In fgDebugCheckBBlist
Finalizing stack frame
Recording Var Locations at start of BB01
  V00(rcx)
Modified regs: [rax rcx mm0-mm4]
Callee-saved registers pushed: 0 []
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT)
Assign V02 tmp1, size=16, stkOffs=-0x18
--- delta bump 8 for RA
--- delta bump 24 for RSP frame
--- virtual stack offset to actual stack offset delta is 32
-- V00 was 0, now 32
-- V01 was 0, now 32
-- V02 was -24, now 8
; Final local variable assignments
;
;  V00 this         [V00,T02] (  3,  3   )   byref  ->  rcx         this
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [rsp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T01] (  5, 10   )  struct (16) [rsp+0x08]   do-not-enreg[SFB] "impAppendStmt"
;* V03 tmp2         [V03,T00] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SFB] "struct address for call/obj"
;* V04 tmp3         [V04    ] (  0,  0   )  struct (16) zero-ref    "NewObj constructor temp"
;  V05 tmp4         [V05,T03] (  3,  2   )    bool  ->  rax         "Inline return value spill temp"
;* V06 tmp5         [V06    ] (  0,  0   )  struct (16) zero-ref    "Inlining Arg"
;* V07 tmp6         [V07    ] (  0,  0   )  struct (16) zero-ref    "Inlining Arg"
;* V08 tmp7         [V08,T09] (  0,  0   )   float  ->  zero-ref    V04.X(offs=0x00) P-INDEP "field V04.X (fldOffset=0x0)"
;* V09 tmp8         [V09,T10] (  0,  0   )   float  ->  zero-ref    V04.Y(offs=0x04) P-INDEP "field V04.Y (fldOffset=0x4)"
;* V10 tmp9         [V10,T11] (  0,  0   )   float  ->  zero-ref    V04.Z(offs=0x08) P-INDEP "field V04.Z (fldOffset=0x8)"
;* V11 tmp10        [V11,T12] (  0,  0   )   float  ->  zero-ref    V04.W(offs=0x0c) P-INDEP "field V04.W (fldOffset=0xc)"
;  V12 tmp11        [V12,T05] (  2,  2   )   float  ->  mm0         V06.X(offs=0x00) P-INDEP "field V06.X (fldOffset=0x0)"
;  V13 tmp12        [V13,T07] (  2,  1.25)   float  ->  mm1         V06.Y(offs=0x04) P-INDEP "field V06.Y (fldOffset=0x4)"
;  V14 tmp13        [V14,T08] (  2,  1.25)   float  ->  mm2         V06.Z(offs=0x08) P-INDEP "field V06.Z (fldOffset=0x8)"
;  V15 tmp14        [V15,T06] (  2,  1.50)   float  ->  mm3         V06.W(offs=0x0c) P-INDEP "field V06.W (fldOffset=0xc)"
;* V16 tmp15        [V16,T13] (  0,  0   )   float  ->  zero-ref    V07.X(offs=0x00) P-INDEP "field V07.X (fldOffset=0x0)"
;* V17 tmp16        [V17,T14] (  0,  0   )   float  ->  zero-ref    V07.Y(offs=0x04) P-INDEP "field V07.Y (fldOffset=0x4)"
;* V18 tmp17        [V18,T15] (  0,  0   )   float  ->  zero-ref    V07.Z(offs=0x08) P-INDEP "field V07.Z (fldOffset=0x8)"
;* V19 tmp18        [V19,T16] (  0,  0   )   float  ->  zero-ref    V07.W(offs=0x0c) P-INDEP "field V07.W (fldOffset=0xc)"
;* V20 cse0         [V20,T04] (  0,  0   )   float  ->  zero-ref    "CSE - aggressive"
;
; Lcl frame size = 24
Setting stack level from -572662307 to 0

=============== Generating BB01 [000..011) -> BB05 (cond), preds={} succs={BB02,BB05} flags=0x00000000.20030020: i label target LIR 
BB01 IN (1)={V00            } + ByrefExposed + GcHeap
     OUT(3)={    V15 V13 V14}

Recording Var Locations at start of BB01
  V00(rcx)
Change life 0000000000000000 {} -> 0000000000000004 {V00}
							V00 in reg rcx is becoming live  [------]
							Live regs: 00000000 {} => 00000002 {rcx}
							Live regs: (unchanged) 00000002 {rcx}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000002 {rcx}

      L_M51825_BB01:
Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}

Scope info: begin block BB01, IL range [000..011)
Scope info: open scopes =
   0 (V00 this) [000..011)
Added IP mapping: 0x0000 STACK_EMPTY (G_M51825_IG02,ins#0,ofs#0) label
Generating: N003 (???,???) [000204] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
Generating: N005 (  1,  1) [000000] ------------         t0 =    LCL_VAR   byref  V00 this         u:1 rcx (last use) REG rcx $80
                                                              /--*  t0     byref  
Generating: N007 (  3,  2) [000001] -c-XG-------         t1 = *  IND       struct REG NA <l:$1c1, c:$1c0>
Generating: N009 (???,???) [000210] Dc-----N----       t210 =    LCL_VAR_ADDR byref  V02 tmp1          NA REG NA
                                                              /--*  t210   byref  
                                                              +--*  t1     struct 
Generating: N011 (  7,  5) [000005] sA----------              *  STORE_BLK struct<System.Numerics.Quaternion, 16> (copy) (Unroll) REG NA
							V00 in reg rcx is becoming dead  [000000]
							Live regs: 00000002 {rcx} => 00000000 {}
							Live vars: {V00} => {}
							Byref regs: 00000002 {rcx} => 00000000 {}
IN0001:        movups   xmm0, xmmword ptr [rcx]
IN0002:        movups   xmmword ptr [V02 rsp+08H], xmm0
genIPmappingAdd: ignoring duplicate IL offset 0x0
Generating: N013 (???,???) [000205] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
genIPmappingAdd: ignoring duplicate IL offset 0x0
Generating: N015 (???,???) [000206] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
genIPmappingAdd: ignoring duplicate IL offset 0x0
Generating: N017 (???,???) [000207] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
genIPmappingAdd: ignoring duplicate IL offset 0x0
Generating: N019 (???,???) [000208] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
genIPmappingAdd: ignoring duplicate IL offset 0x0
Generating: N021 (???,???) [000209] ------------                 IL_OFFSET void   IL offset: 0x0 REG NA
Generating: N023 (  3,  4) [000140] ------------       t140 =    LCL_FLD   float  V02 tmp1         u:1[+0] Fseq[X] mm0 REG mm0 $304
IN0003:        movss    xmm0, dword ptr [V02 rsp+08H]
                                                              /--*  t140   float  
Generating: N025 (  7,  9) [000141] DA----------              *  STORE_LCL_VAR float  V12 tmp11        d:1 mm0 REG mm0
							V12 in reg mm0 is becoming live  [000141]
							Live regs: 00000000 {} => 00000000 {xmm0}
							Live vars: {} => {V12}
Generating: N027 (  3,  4) [000145] ------------       t145 =    LCL_FLD   float  V02 tmp1         u:1[+4] Fseq[Y] mm1 REG mm1 $305
IN0004:        movss    xmm1, dword ptr [V02+0x4 rsp+0CH]
                                                              /--*  t145   float  
Generating: N029 (  7,  9) [000146] DA----------              *  STORE_LCL_VAR float  V13 tmp12        d:1 mm1 REG mm1
							V13 in reg mm1 is becoming live  [000146]
							Live regs: 00000000 {xmm0} => 00000000 {xmm0 xmm1}
							Live vars: {V12} => {V12 V13}
Generating: N031 (  3,  4) [000151] ------------       t151 =    LCL_FLD   float  V02 tmp1         u:1[+8] Fseq[Z] mm2 REG mm2 $306
IN0005:        movss    xmm2, dword ptr [V02+0x8 rsp+10H]
                                                              /--*  t151   float  
Generating: N033 (  7,  9) [000152] DA----------              *  STORE_LCL_VAR float  V14 tmp13        d:1 mm2 REG mm2
							V14 in reg mm2 is becoming live  [000152]
							Live regs: 00000000 {xmm0 xmm1} => 00000000 {xmm0 xmm1 xmm2}
							Live vars: {V12 V13} => {V12 V13 V14}
Generating: N035 (  3,  4) [000157] ------------       t157 =    LCL_FLD   float  V02 tmp1         u:1[+12] Fseq[W] mm3 (last use) REG mm3 $307
IN0006:        movss    xmm3, dword ptr [V02+0xC rsp+14H]
                                                              /--*  t157   float  
Generating: N037 (  7,  9) [000158] DA----------              *  STORE_LCL_VAR float  V15 tmp14        d:1 mm3 REG mm3
							V15 in reg mm3 is becoming live  [000158]
							Live regs: 00000000 {xmm0 xmm1 xmm2} => 00000000 {xmm0 xmm1 xmm2 xmm3}
							Live vars: {V12 V13 V14} => {V12 V13 V14 V15}
Generating: N039 (  3,  4) [000057] ------------        t57 =    LCL_VAR   float  V12 tmp11        u:1 mm0 (last use) REG mm0 $304
Generating: N041 (  1,  1) [000200] ------------       t200 =    CNS_DBL   float  0.00000000000000000 REG mm4 $240
IN0007:        xorps    xmm4, xmm4
                                                              /--*  t57    float  
                                                              +--*  t200   float  
Generating: N043 (  5,  6) [000061] N------N-U--              *  NE        void   REG NA $380
							V12 in reg mm0 is becoming dead  [000057]
							Live regs: 00000000 {xmm0 xmm1 xmm2 xmm3} => 00000000 {xmm1 xmm2 xmm3}
							Live vars: {V12 V13 V14 V15} => {V13 V14 V15}
IN0008:        ucomiss  xmm0, xmm4
Generating: N045 (  7,  8) [000062] ------------              *  JTRUE     void   REG NA
IN0009:        jp       L_M51825_BB05
IN000a:        jne      L_M51825_BB05

Scope info: end block BB01, IL range [000..011)
Scope info: ending scope, LVnum=0 [000..011)
Scope info: open scopes =
   <none>

=============== Generating BB02 [000..000) -> BB05 (cond), preds={BB01} succs={BB03,BB05} flags=0x00000000.20000060: i internal LIR 
BB02 IN (3)={V15 V13 V14}
     OUT(2)={V15     V14}

Recording Var Locations at start of BB02
  V15(mm3)  V13(mm1)  V14(mm2)
Liveness not changing: 00000000000001C0 {V13 V14 V15}
							Live regs: 00000000 {} => 00000000 {xmm1 xmm2 xmm3}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M51825_BB02:

      G_M51825_IG02:        ; offs=000000H, funclet=00, bbWeight=1   
Label: IG03, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}

Scope info: begin block BB02, IL range [000..000)
Scope info: open scopes =
   <none>
Added IP mapping: NO_MAP STACK_EMPTY (G_M51825_IG03,ins#0,ofs#0) label
Generating: N049 (  3,  4) [000070] ------------        t70 =    LCL_VAR   float  V13 tmp12        u:1 mm1 (last use) REG mm1 $305
Generating: N051 (  1,  1) [000201] ------------       t201 =    CNS_DBL   float  0.00000000000000000 REG mm0 $240
IN000b:        xorps    xmm0, xmm0
                                                              /--*  t70    float  
                                                              +--*  t201   float  
Generating: N053 (  5,  6) [000074] N------N-U--              *  NE        void   REG NA $381
							V13 in reg mm1 is becoming dead  [000070]
							Live regs: 00000000 {xmm1 xmm2 xmm3} => 00000000 {xmm2 xmm3}
							Live vars: {V13 V14 V15} => {V14 V15}
IN000c:        ucomiss  xmm1, xmm0
Generating: N055 (  7,  8) [000075] ------------              *  JTRUE     void   REG NA
IN000d:        jp       L_M51825_BB05
IN000e:        jne      L_M51825_BB05

Scope info: end block BB02, IL range [000..000)
Scope info: open scopes =
   <none>

=============== Generating BB03 [000..000) -> BB05 (cond), preds={BB02} succs={BB04,BB05} flags=0x00000000.20000060: i internal LIR 
BB03 IN (2)={V15 V14}
     OUT(1)={V15    }

Recording Var Locations at start of BB03
  V15(mm3)  V14(mm2)
Liveness not changing: 0000000000000140 {V14 V15}
							Live regs: 00000000 {} => 00000000 {xmm2 xmm3}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M51825_BB03:

Scope info: begin block BB03, IL range [000..000)
Scope info: open scopes =
   <none>
genIPmappingAdd: ignoring duplicate IL offset 0xffffffff
Generating: N059 (  3,  4) [000078] ------------        t78 =    LCL_VAR   float  V14 tmp13        u:1 mm2 (last use) REG mm2 $306
Generating: N061 (  1,  1) [000202] ------------       t202 =    CNS_DBL   float  0.00000000000000000 REG mm0 $240
IN000f:        xorps    xmm0, xmm0
                                                              /--*  t78    float  
                                                              +--*  t202   float  
Generating: N063 (  5,  6) [000082] N------N-U--              *  NE        void   REG NA $382
							V14 in reg mm2 is becoming dead  [000078]
							Live regs: 00000000 {xmm2 xmm3} => 00000000 {xmm3}
							Live vars: {V14 V15} => {V15}
IN0010:        ucomiss  xmm2, xmm0
Generating: N065 (  7,  8) [000083] ------------              *  JTRUE     void   REG NA
IN0011:        jp       L_M51825_BB05
IN0012:        jne      L_M51825_BB05

Scope info: end block BB03, IL range [000..000)
Scope info: open scopes =
   <none>

=============== Generating BB04 [000..000) -> BB06 (always), preds={BB03} succs={BB06} flags=0x00000000.20000060: i internal LIR 
BB04 IN (1)={    V15}
     OUT(1)={V05    }

Recording Var Locations at start of BB04
  V15(mm3)
Liveness not changing: 0000000000000040 {V15}
							Live regs: 00000000 {} => 00000000 {xmm3}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M51825_BB04:

      G_M51825_IG03:        ; offs=000032H, funclet=00, bbWeight=0.25
Label: IG04, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}

Scope info: begin block BB04, IL range [000..000)
Scope info: open scopes =
   <none>
genIPmappingAdd: ignoring duplicate IL offset 0xffffffff
Generating: N069 (  3,  4) [000086] ------------        t86 =    LCL_VAR   float  V15 tmp14        u:1 mm3 (last use) REG mm3 $307
Generating: N071 (  1,  1) [000203] -c----------       t203 =    CNS_DBL   float  1.0000000000000000 REG NA $241
                                                              /--*  t86    float  
                                                              +--*  t203   float  
Generating: N073 (  8,  6) [000090] ------------        t90 = *  EQ        int    REG rax $383
							V15 in reg mm3 is becoming dead  [000086]
							Live regs: 00000000 {xmm3} => 00000000 {}
							Live vars: {V15} => {}
IN0013:        ucomiss  xmm3, dword ptr [reloc @RWD00]
IN0014:        setnp    al
New Basic Block BB07 [0009] created.
IN0015:        jp       L_M51825_BB07
IN0016:        sete     al

      L_M51825_BB07:

      G_M51825_IG04:        ; offs=000056H, funclet=00, bbWeight=0.50
Label: IG05, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0017:        movzx    rax, al
                                                              /--*  t90    int    
Generating: N075 ( 12,  9) [000092] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:3 rax REG rax
							V05 in reg rax is becoming live  [000092]
							Live regs: 00000000 {} => 00000001 {rax}
							Live vars: {} => {V05}

Scope info: end block BB04, IL range [000..000)
Scope info: open scopes =
   <none>
IN0018:        jmp      L_M51825_BB06

=============== Generating BB05 [000..000), preds={BB01,BB02,BB03} succs={BB06} flags=0x00000000.20030060: i internal label target LIR 
BB05 IN (0)={   }
     OUT(1)={V05}

Recording Var Locations at start of BB05
  <none>

Change life 0000000000000008 {V05} -> 0000000000000000 {}
							V05 in reg rax is becoming dead  [------]
							Live regs: (unchanged) 00000000 {}
							Live regs: (unchanged) 00000000 {}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M51825_BB05:

      G_M51825_IG05:        ; offs=000069H, funclet=00, bbWeight=0.50
Label: IG06, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}

Scope info: begin block BB05, IL range [000..000)
Scope info: open scopes =
   <none>
genIPmappingAdd: ignoring duplicate IL offset 0xffffffff
Generating: N079 (  1,  1) [000063] ------------        t63 =    CNS_INT   int    0 REG rax $40
IN0019:        xor      eax, eax
                                                              /--*  t63    int    
Generating: N081 (  5,  4) [000066] DA----------              *  STORE_LCL_VAR int    V05 tmp4         d:2 rax REG rax
							V05 in reg rax is becoming live  [000066]
							Live regs: 00000000 {} => 00000001 {rax}
							Live vars: {} => {V05}

Scope info: end block BB05, IL range [000..000)
Scope info: open scopes =
   <none>

=============== Generating BB06 [???..???) (return), preds={BB04,BB05} succs={} flags=0x00000000.20030040: internal label target LIR 
BB06 IN (1)={V05}
     OUT(0)={   }

Recording Var Locations at start of BB06
  V05(rax)
Liveness not changing: 0000000000000008 {V05}
							Live regs: 00000000 {} => 00000001 {rax}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M51825_BB06:

      G_M51825_IG06:        ; offs=000071H, funclet=00, bbWeight=0.50
Label: IG07, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}

Scope info: begin block BB06, IL range [???..???)
Scope info: ignoring block beginning
genIPmappingAdd: ignoring duplicate IL offset 0xffffffff
Generating: N085 (  4,  3) [000093] ------------        t93 =    LCL_VAR   bool   V05 tmp4         u:1 rax (last use) REG rax $440
                                                              /--*  t93    bool   
Generating: N087 (  5,  4) [000018] ------------              *  RETURN    int    REG NA $3c2
							V05 in reg rax is becoming dead  [000093]
							Live regs: 00000001 {rax} => 00000000 {}
							Live vars: {V05} => {}

Scope info: end block BB06, IL range [???..???)
Scope info: ignoring block end
Added IP mapping: EPILOG STACK_EMPTY (G_M51825_IG07,ins#0,ofs#0) label
Reserving epilog IG for block BB06
*************** After placeholder IG creation
G_M51825_IG01:        ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M51825_IG02:        ; offs=000000H, size=0032H, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}, byref
G_M51825_IG03:        ; offs=000032H, size=0024H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG04:        ; offs=000056H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG05:        ; offs=000069H, size=0008H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG06:        ; offs=000071H, size=0002H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG07:        ; epilog placeholder, next placeholder=<END>, BB06 [0008], epilog <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}
Liveness not changing: 0000000000000000 {}

# compCycleEstimate =    127, compSizeEstimate =   152 System.Numerics.Quaternion:get_IsIdentity():bool:this
; Final local variable assignments
;
;  V00 this         [V00,T02] (  3,  3   )   byref  ->  rcx         this
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [rsp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T01] (  5, 10   )  struct (16) [rsp+0x08]   do-not-enreg[SFB] "impAppendStmt"
;* V03 tmp2         [V03,T00] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SFB] "struct address for call/obj"
;* V04 tmp3         [V04    ] (  0,  0   )  struct (16) zero-ref    "NewObj constructor temp"
;  V05 tmp4         [V05,T03] (  3,  2   )    bool  ->  rax         "Inline return value spill temp"
;* V06 tmp5         [V06    ] (  0,  0   )  struct (16) zero-ref    "Inlining Arg"
;* V07 tmp6         [V07    ] (  0,  0   )  struct (16) zero-ref    "Inlining Arg"
;* V08 tmp7         [V08,T09] (  0,  0   )   float  ->  zero-ref    V04.X(offs=0x00) P-INDEP "field V04.X (fldOffset=0x0)"
;* V09 tmp8         [V09,T10] (  0,  0   )   float  ->  zero-ref    V04.Y(offs=0x04) P-INDEP "field V04.Y (fldOffset=0x4)"
;* V10 tmp9         [V10,T11] (  0,  0   )   float  ->  zero-ref    V04.Z(offs=0x08) P-INDEP "field V04.Z (fldOffset=0x8)"
;* V11 tmp10        [V11,T12] (  0,  0   )   float  ->  zero-ref    V04.W(offs=0x0c) P-INDEP "field V04.W (fldOffset=0xc)"
;  V12 tmp11        [V12,T05] (  2,  2   )   float  ->  mm0         V06.X(offs=0x00) P-INDEP "field V06.X (fldOffset=0x0)"
;  V13 tmp12        [V13,T07] (  2,  1.25)   float  ->  mm1         V06.Y(offs=0x04) P-INDEP "field V06.Y (fldOffset=0x4)"
;  V14 tmp13        [V14,T08] (  2,  1.25)   float  ->  mm2         V06.Z(offs=0x08) P-INDEP "field V06.Z (fldOffset=0x8)"
;  V15 tmp14        [V15,T06] (  2,  1.50)   float  ->  mm3         V06.W(offs=0x0c) P-INDEP "field V06.W (fldOffset=0xc)"
;* V16 tmp15        [V16,T13] (  0,  0   )   float  ->  zero-ref    V07.X(offs=0x00) P-INDEP "field V07.X (fldOffset=0x0)"
;* V17 tmp16        [V17,T14] (  0,  0   )   float  ->  zero-ref    V07.Y(offs=0x04) P-INDEP "field V07.Y (fldOffset=0x4)"
;* V18 tmp17        [V18,T15] (  0,  0   )   float  ->  zero-ref    V07.Z(offs=0x08) P-INDEP "field V07.Z (fldOffset=0x8)"
;* V19 tmp18        [V19,T16] (  0,  0   )   float  ->  zero-ref    V07.W(offs=0x0c) P-INDEP "field V07.W (fldOffset=0xc)"
;* V20 cse0         [V20,T04] (  0,  0   )   float  ->  zero-ref    "CSE - aggressive"
;
; Lcl frame size = 24
*************** Before prolog / epilog generation
G_M51825_IG01:        ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M51825_IG02:        ; offs=000000H, size=0032H, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}, byref
G_M51825_IG03:        ; offs=000032H, size=0024H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG04:        ; offs=000056H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG05:        ; offs=000069H, size=0008H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG06:        ; offs=000071H, size=0002H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG07:        ; epilog placeholder, next placeholder=<END>, BB06 [0008], epilog <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}
Recording Var Locations at start of BB01
  V00(rcx)
*************** In genFnProlog()
Added IP mapping to front: PROLOG STACK_EMPTY (G_M51825_IG01,ins#0,ofs#0) label

__prolog:
IN001a:        sub      rsp, 24
*************** In genFnPrologCalleeRegArgs() for int regs
*************** In genEnregisterIncomingStackArgs()


      G_M51825_IG01:        ; offs=000000H, funclet=00, bbWeight=1   
*************** In genFnEpilog()

__epilog:
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000000 {}, gcRegByrefSetCur=00000000 {}
IN001b:        add      rsp, 24
IN001c:        ret      

      G_M51825_IG07:        ; offs=000073H, funclet=00, bbWeight=1   
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs
*************** After prolog / epilog generation
G_M51825_IG01:        ; func=00, offs=000000H, size=0004H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M51825_IG02:        ; offs=000004H, size=0032H, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}, byref
G_M51825_IG03:        ; offs=000036H, size=0024H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG04:        ; offs=00005AH, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG05:        ; offs=00006DH, size=0008H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG06:        ; offs=000075H, size=0002H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M51825_IG07:        ; offs=000077H, size=0005H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, epilog, nogc
*************** In emitJumpDistBind()
Binding: IN0009: 000000 jp       L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/009]: 002A -> 0075 = 0049
Shrinking jump [D1FFAB1E/009]
Binding: IN000a: 000000 jne      L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/010]: 002C -> 0071 = 0043
Shrinking jump [D1FFAB1E/010]
Adjusted offset of BB03 from 0036 to 002E
Binding: IN000d: 000000 jp       L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/013]: 0034 -> 006D = 0037
Shrinking jump [D1FFAB1E/013]
Binding: IN000e: 000000 jne      L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/014]: 0036 -> 0069 = 0031
Shrinking jump [D1FFAB1E/014]
Binding: IN0011: 000000 jp       L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/017]: 003E -> 0065 = 0025
Shrinking jump [D1FFAB1E/017]
Binding: IN0012: 000000 jne      L_M51825_BB05
Binding L_M51825_BB05 to G_M51825_IG06
Estimate of fwd jump [D1FFAB1E/018]: 0040 -> 0061 = 001F
Shrinking jump [D1FFAB1E/018]
Adjusted offset of BB04 from 005A to 0042
Binding: IN0015: 000000 jp       L_M51825_BB07
Binding L_M51825_BB07 to G_M51825_IG05
Estimate of fwd jump [D1FFAB1E/021]: 004C -> 0055 = 0007
Shrinking jump [D1FFAB1E/021]
Adjusted offset of BB05 from 006D to 0051
Binding: IN0018: 000000 jmp      L_M51825_BB06
Binding L_M51825_BB06 to G_M51825_IG07
Estimate of fwd jump [D1FFAB1E/024]: 0054 -> 005B = 0005
Shrinking jump [D1FFAB1E/024]
Adjusted offset of BB06 from 0075 to 0056
Adjusted offset of BB07 from 0077 to 0058
Total shrinkage =  31, min extra jump size = 4294967295

*************** Finishing PHASE Generate code

*************** Starting PHASE Emit code

Hot  code size = 0x5D bytes
Cold code size = 0x0 bytes
reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x6)
*************** In emitEndCodeGen()
Converting emitMaxStackDepth from bytes (0) to elements (0)

***************************************************************************
Instructions as they come out of the scheduler


G_M51825_IG01:        ; func=00, offs=000000H, size=0004H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN001a: 000000 sub      rsp, 24
						;; bbWeight=1    PerfScore 0.25
G_M51825_IG02:        ; func=00, offs=000004H, size=002AH, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}, byref, isz
       ; byrRegs +[rcx]
IN0001: 000004 movups   xmm0, xmmword ptr [rcx]
IN0002: 000007 movups   xmmword ptr [rsp+08H], xmm0
IN0003: 00000C movss    xmm0, dword ptr [rsp+08H]
IN0004: 000012 movss    xmm1, dword ptr [rsp+0CH]
IN0005: 000018 movss    xmm2, dword ptr [rsp+10H]
IN0006: 00001E movss    xmm3, dword ptr [rsp+14H]
IN0007: 000024 xorps    xmm4, xmm4
IN0008: 000027 ucomiss  xmm0, xmm4
IN0009: 00002A jp       SHORT G_M51825_IG06
IN000a: 00002C jne      SHORT G_M51825_IG06
						;; bbWeight=1    PerfScore 17.33
G_M51825_IG03:        ; func=00, offs=00002EH, size=0014H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz
       ; byrRegs -[rcx]
IN000b: 00002E xorps    xmm0, xmm0
IN000c: 000031 ucomiss  xmm1, xmm0
IN000d: 000034 jp       SHORT G_M51825_IG06
IN000e: 000036 jne      SHORT G_M51825_IG06
IN000f: 000038 xorps    xmm0, xmm0
IN0010: 00003B ucomiss  xmm2, xmm0
IN0011: 00003E jp       SHORT G_M51825_IG06
IN0012: 000040 jne      SHORT G_M51825_IG06
						;; bbWeight=0.25 PerfScore 1.67
G_M51825_IG04:        ; func=00, offs=000042H, size=000FH, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz
IN0013: 000042 ucomiss  xmm3, dword ptr [reloc @RWD00]
IN0014: 000049 setnp    al
IN0015: 00004C jp       SHORT G_M51825_IG05
IN0016: 00004E sete     al
						;; bbWeight=0.50 PerfScore 2.00
G_M51825_IG05:        ; func=00, offs=000051H, size=0005H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz
IN0017: 000051 movzx    rax, al
IN0018: 000054 jmp      SHORT G_M51825_IG07
						;; bbWeight=0.50 PerfScore 1.13
G_M51825_IG06:        ; func=00, offs=000056H, size=0002H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
IN0019: 000056 xor      eax, eax
						;; bbWeight=0.50 PerfScore 0.13
G_M51825_IG07:        ; func=00, offs=000058H, size=0005H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, epilog, nogc
IN001b: 000058 add      rsp, 24
IN001c: 00005C ret      
						;; bbWeight=1    PerfScore 1.25
Emitting data sections: 4 total bytes
  section   0, size  4, RWD 0:	00 00 80 3f  ; float          1
Allocated method code size =   93 , actual size =   93, unused size =    0

; Total bytes of code 93, prolog size 4, PerfScore 33.05, instruction count 28, allocated bytes for code 93 (MethodHash=46a9358e) for method System.Numerics.Quaternion:get_IsIdentity():bool:this
; ============================================================

*************** After end code gen, before unwindEmit()
G_M51825_IG01:        ; func=00, offs=000000H, size=0004H, bbWeight=1    PerfScore 0.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG

IN001a: 000000 sub      rsp, 24

G_M51825_IG02:        ; offs=000004H, size=002AH, bbWeight=1    PerfScore 17.33, gcrefRegs=00000000 {}, byrefRegs=00000002 {rcx}, byref, isz

IN0001: 000004 movups   xmm0, xmmword ptr [rcx]
IN0002: 000007 movups   xmmword ptr [V02 rsp+08H], xmm0
IN0003: 00000C movss    xmm0, dword ptr [V02 rsp+08H]
IN0004: 000012 movss    xmm1, dword ptr [V02+0x4 rsp+0CH]
IN0005: 000018 movss    xmm2, dword ptr [V02+0x8 rsp+10H]
IN0006: 00001E movss    xmm3, dword ptr [V02+0xC rsp+14H]
IN0007: 000024 xorps    xmm4, xmm4
IN0008: 000027 ucomiss  xmm0, xmm4
IN0009: 00002A jp       SHORT G_M51825_IG06
IN000a: 00002C jne      SHORT G_M51825_IG06

G_M51825_IG03:        ; offs=00002EH, size=0014H, bbWeight=0.25 PerfScore 1.67, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz

IN000b: 00002E xorps    xmm0, xmm0
IN000c: 000031 ucomiss  xmm1, xmm0
IN000d: 000034 jp       SHORT G_M51825_IG06
IN000e: 000036 jne      SHORT G_M51825_IG06
IN000f: 000038 xorps    xmm0, xmm0
IN0010: 00003B ucomiss  xmm2, xmm0
IN0011: 00003E jp       SHORT G_M51825_IG06
IN0012: 000040 jne      SHORT G_M51825_IG06

G_M51825_IG04:        ; offs=000042H, size=000FH, bbWeight=0.50 PerfScore 2.00, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz

IN0013: 000042 ucomiss  xmm3, dword ptr [reloc @RWD00]
IN0014: 000049 setnp    al
IN0015: 00004C jp       SHORT G_M51825_IG05
IN0016: 00004E sete     al

G_M51825_IG05:        ; offs=000051H, size=0005H, bbWeight=0.50 PerfScore 1.13, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz

IN0017: 000051 movzx    rax, al
IN0018: 000054 jmp      SHORT G_M51825_IG07

G_M51825_IG06:        ; offs=000056H, size=0002H, bbWeight=0.50 PerfScore 0.13, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref

IN0019: 000056 xor      eax, eax

G_M51825_IG07:        ; offs=000058H, size=0005H, bbWeight=1    PerfScore 1.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, epilog, nogc

IN001b: 000058 add      rsp, 24
IN001c: 00005C ret      


*************** Finishing PHASE Emit code

*************** Starting PHASE Emit GC+EH tables
Unwind Info:
  >> Start offset   : 0x000000 (not in unwind data)
  >>   End offset   : 0xd1ffab1e (not in unwind data)
  Version           : 1
  Flags             : 0x00
  SizeOfProlog      : 0x04
  CountOfUnwindCodes: 1
  FrameRegister     : none (0)
  FrameOffset       : N/A (no FrameRegister) (Value=0)
  UnwindCodes       :
    CodeOffset: 0x04 UnwindOp: UWOP_ALLOC_SMALL (2)     OpInfo: 2 * 8 + 8 = 24 = 0x18
allocUnwindInfo(pHotCode=0x00000000D1FFAB1E, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0x5d, unwindSize=0x6, pUnwindBlock=0x00000000D1FFAB1E, funKind=0 (main function))
*************** In genIPmappingGen()
IP mapping count : 4
IL offs PROLOG : 0x00000000 ( STACK_EMPTY )
IL offs 0x0000 : 0x00000004 ( STACK_EMPTY )
IL offs NO_MAP : 0x0000002E ( STACK_EMPTY )
IL offs EPILOG : 0x00000058 ( STACK_EMPTY )

*************** In genSetScopeInfo()
VarLocInfo count is 1
; Variable debug info: 1 live range(s), 1 var(s) for method System.Numerics.Quaternion:get_IsIdentity():bool:this
  0(   UNKNOWN) : From 00000000h to 00000004h, in rcx
*************** In gcInfoBlockHdrSave()
Set code length to 93.
Set ReturnKind to Scalar.
Set Outgoing stack arg area size to 0.
Defining 0 call sites:

*************** Finishing PHASE Emit GC+EH tables
Method code size: 93

Allocations for System.Numerics.Quaternion:get_IsIdentity():bool:this (MethodHash=46a9358e)
count:       2071, size:     152299, max =       3072
allocateMemory:     196608, nraUsed:     158712

Alloc'd bytes by kind:
                  kind |       size |     pct
  ---------------------+------------+--------
         AssertionProp |       6460 |   4.24%
               ASTNode |      26376 |  17.32%
              InstDesc |       4276 |   2.81%
              ImpStack |        384 |   0.25%
            BasicBlock |       3352 |   2.20%
             fgArgInfo |          0 |   0.00%
       fgArgInfoPtrArr |          0 |   0.00%
              FlowList |        288 |   0.19%
     TreeStatementList |         96 |   0.06%
               SiScope |        272 |   0.18%
       DominatorMemory |        336 |   0.22%
                  LSRA |       3976 |   2.61%
         LSRA_Interval |       1280 |   0.84%
      LSRA_RefPosition |       2560 |   1.68%
          Reachability |         16 |   0.01%
                   SSA |       2272 |   1.49%
           ValueNumber |      14415 |   9.46%
              LvaTable |       5084 |   3.34%
            UnwindInfo |          0 |   0.00%
                hashBv |        240 |   0.16%
                bitset |        656 |   0.43%
          FixedBitVect |         36 |   0.02%
               Generic |       2978 |   1.96%
   LocalAddressVisitor |          0 |   0.00%
         FieldSeqStore |        320 |   0.21%
    ZeroOffsetFieldMap |        160 |   0.11%
          ArrayInfoMap |         40 |   0.03%
          MemoryPhiArg |          0 |   0.00%
                   CSE |       1824 |   1.20%
                    GC |       1312 |   0.86%
       CorTailCallInfo |          0 |   0.00%
              Inlining |       2504 |   1.64%
            ArrayStack |          0 |   0.00%
             DebugInfo |        168 |   0.11%
             DebugOnly |      65777 |  43.19%
               Codegen |       1176 |   0.77%
               LoopOpt |          0 |   0.00%
             LoopHoist |          0 |   0.00%
               Unknown |        345 |   0.23%
            RangeCheck |          0 |   0.00%
              CopyProp |       2272 |   1.49%
           SideEffects |          0 |   0.00%
       ObjectAllocator |          0 |   0.00%
    VariableLiveRanges |          0 |   0.00%
           ClassLayout |         72 |   0.05%
       TailMergeThrows |          0 |   0.00%
             EarlyProp |          0 |   0.00%
              ZeroInit |        976 |   0.64%
                   Pgo |          0 |   0.00%

****** DONE compiling System.Numerics.Quaternion:get_IsIdentity():bool:this