diff --git a/src/coreclr/jit/codegenarm.cpp b/src/coreclr/jit/codegenarm.cpp index 861eac8963611c..e206073b739b26 100644 --- a/src/coreclr/jit/codegenarm.cpp +++ b/src/coreclr/jit/codegenarm.cpp @@ -238,7 +238,9 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre emitAttr attr = emitActualTypeSize(targetType); - if (con->IsIconHandle()) + // TODO-CQ: Currently we cannot do this for all handles because of + // https://github.com/dotnet/runtime/issues/60712 + if (con->ImmedValNeedsReloc(compiler)) { attr = EA_SET_FLG(attr, EA_CNS_RELOC_FLG); } diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index c23a705096caf0..d68da1a1e2a9bf 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -1692,13 +1692,13 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre { case GT_CNS_INT: { - // relocatable values tend to come down as a CNS_INT of native int type - // so the line between these two opcodes is kind of blurry GenTreeIntConCommon* con = tree->AsIntConCommon(); ssize_t cnsVal = con->IconValue(); emitAttr attr = emitActualTypeSize(targetType); - if (con->IsIconHandle()) + // TODO-CQ: Currently we cannot do this for all handles because of + // https://github.com/dotnet/runtime/issues/60712 + if (con->ImmedValNeedsReloc(compiler)) { attr = EA_SET_FLG(attr, EA_CNS_RELOC_FLG); } diff --git a/src/coreclr/jit/codegenxarch.cpp b/src/coreclr/jit/codegenxarch.cpp index df37565b4242ac..4d905dd1e50747 100644 --- a/src/coreclr/jit/codegenxarch.cpp +++ b/src/coreclr/jit/codegenxarch.cpp @@ -466,7 +466,13 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre ssize_t cnsVal = con->IconValue(); emitAttr attr = emitActualTypeSize(targetType); - if (con->IsIconHandle()) + // Currently this cannot be done for all handles due to + // https://github.com/dotnet/runtime/issues/60712. However, it is + // also unclear whether we unconditionally want to use rip-relative + // lea instructions when not necessary. While a mov is larger, on + // many Intel CPUs rip-relative lea instructions have higher + // latency. + if (con->ImmedValNeedsReloc(compiler)) { attr = EA_SET_FLG(attr, EA_CNS_RELOC_FLG); }