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vhdldocgen fails to generate proper latex for VHDL record type (Origin: bugzilla #698998) #5153

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doxygen opened this Issue Jul 2, 2018 · 0 comments

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doxygen commented Jul 2, 2018

status RESOLVED severity normal in component general for ---
Reported in version 1.8.3.1-SVN on platform Other
Assigned to: Dimitri van Heesch

Original attachment names and IDs:

On 2013-04-26 20:48:36 +0000, Steve wrote:

Created attachment 242621
Patch for vhdldocgen.cpp

It looks like VhdlDocGen::writeRecUnitDocu is missing calls to endParameterType and startParameterName resulting in incorrect \item syntax in the latex output. Here is a sample latex error message.

[215] [216]
! Argument of \item has an extra }.

\par
l.197 )\hspace{0.3cm}{\ttfamily [Type]}}}
\label{classgsec__pkg_aadf242...

The error is fixed by running doxygen with the attached patch. I hope it helps.

Thanks,

-Steve

On 2013-05-30 19:48:12 +0000, Dimitri van Heesch wrote:

Thanks, I'll include the patch in the next GIT update.

On 2013-06-21 19:24:49 +0000, Steve wrote:

I grabbed the latest GIT code and tested it out. The problem is indeed fixed. Thanks.

@doxygen doxygen closed this Jul 2, 2018

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