Get msgtst working on bochs

There was a bug in the pic implementation

apps/Makefile.am

@@ -2,17 +2,14 @@ bin_PROGRAMS =
 include apps/bindtst/Makefile.am
 include apps/contst/Makefile.am
 include apps/ethtst/Makefile.am
+include apps/eventtst/Makefile.am
 include apps/helloworld/Makefile.am
 include apps/helloworld_parallel/Makefile.am
 include apps/helloworldcpp/Makefile.am
 include apps/msgtst/Makefile.am
 include apps/primalloctst/Makefile.am
 #include apps/ssactst/Makefile.am
 
-if LRT_ULNX
-include apps/eventtst/Makefile.am
-endif
-
 if LRT_BARE
 if powerpc
 include apps/treetst/Makefile.am

apps/eventtst/eventtst.c

@@ -140,14 +140,17 @@ test_triggerremote(EventTstRef self)
   LRT_RCAssert(rc);
 }
 
+#if 0
 //FIXME: make this compliant with other LRTs
 static EventNo irqEV;
 static int pipes[2];
 static struct IRQ_t irq;
+#endif
 
 static void
 test_irqlocal(EventTstRef self)
 {
+#if 0
   EBBRC rc;
   lrt_printf("EventTst: irqlocaltest started\n");
 
@@ -171,14 +174,15 @@ test_irqlocal(EventTstRef self)
   char c = '.';
   ssize_t ret2 = write(pipes[1], &c, sizeof(c));
   LRT_Assert(ret2 == sizeof(c));
+#endif
 }
 
 /*
- * first runs tests that run to completion, then 
- * starts subsequent tests in context of event 
+ * first runs tests that run to completion, then
+ * starts subsequent tests in context of event
  * initiated by previous tests
  */
-EBBRC 
+EBBRC
 runNextTest(EventTstRef self)
 {
   static int testStage = 0;
@@ -204,7 +208,7 @@ runNextTest(EventTstRef self)
   return EBBRC_OK;
 }
 
-static EBBRC 
+static EBBRC
 EventTst_start(AppRef _self)
 {
   EventTstRef self = (EventTstRef)_self;
@@ -213,7 +217,7 @@ EventTst_start(AppRef _self)
              NumEventLoc());
 
   runNextTest(self);
-  
+
   return EBBRC_OK;
 }
 
@@ -236,19 +240,21 @@ EventTst_triggerRemoteTestEvent(EventTstRef _self)
   rc = COBJ_EBBCALL(theEventMgrPrimId, freeEventNo, remoteEV);
   LRT_RCAssert(rc);
   lrt_printf("EventTst: triggerremotetest succeeded on core %d\n",
-	     MyEventLoc());
+             MyEventLoc());
   runNextTest(_self);
   return EBBRC_OK;
 }
 
 static EBBRC
 EventTst_irqLocalTestEvent(EventTstRef _self)
 {
+#if 0
   char c;
   ssize_t rc = read(pipes[0], &c, sizeof(c));
   LRT_Assert(rc == sizeof(c));
   lrt_printf("EventTst: irqlocaltest succeeded\n");
   runNextTest(_self);
+#endif
   return EBBRC_OK;
 }
 

apps/msgtst/msgtst.c

@@ -47,21 +47,21 @@
 // make call to the message handler
 // figure out number of cores, and send messages between them
 
-static EBBRC 
+static EBBRC
 MsgHandlerTst_msg0(MsgHandlerRef _self)
 {
   // ack that we are handing interrupt
   return EBBRC_OK;
 };
-static EBBRC 
+static EBBRC
 MsgHandlerTst_msg1(MsgHandlerRef _self, uintptr_t a1)
 {
   // ack that we are handing interrupt
   lrt_printf("[%s]", __func__);
   return EBBRC_OK;
 };
 
-static EBBRC 
+static EBBRC
 MsgHandlerTst_msg2(MsgHandlerRef _self, uintptr_t numtosend, uintptr_t id)
 {
   EventLoc nxt = 0;
@@ -75,7 +75,7 @@ MsgHandlerTst_msg2(MsgHandlerRef _self, uintptr_t numtosend, uintptr_t id)
 
   LRT_Assert(numtosend > 0);
   nxt = NextEventLoc(MyEventLoc());
-  
+
   do {
     lrt_printf("msgtst %d -> %d\n", MyEventLoc(), nxt);
     rc = COBJ_EBBCALL(theMsgMgrId, msg2, nxt, sid, numtosend, id);
@@ -84,9 +84,9 @@ MsgHandlerTst_msg2(MsgHandlerRef _self, uintptr_t numtosend, uintptr_t id)
   } while (rc == EBBRC_NOTFOUND);
   return EBBRC_OK;
 };
-static EBBRC 
-MsgHandlerTst_msg3(MsgHandlerRef _self, uintptr_t a1, uintptr_t a2, 
-		   uintptr_t a3)
+static EBBRC
+MsgHandlerTst_msg3(MsgHandlerRef _self, uintptr_t a1, uintptr_t a2,
+                   uintptr_t a3)
 {
   // ack that we are handing interrupt
   lrt_printf("[%s]", __func__);
@@ -96,7 +96,7 @@ MsgHandlerTst_msg3(MsgHandlerRef _self, uintptr_t a1, uintptr_t a2,
 
 CObject(MsgHandlerTst) {
   CObjInterface(MsgHandler) *ft;
-  CObjEBBRootMultiRef theRoot;	
+  CObjEBBRootMultiRef theRoot;
 };
 
 
@@ -122,15 +122,15 @@ InitMsgHandlerTst()
   static MsgHandlerId theMsgHandlerTstId=0;
 
   if (__sync_bool_compare_and_swap(&theMsgHandlerTstId, (MsgHandlerId)0,
-				   (MsgHandlerId)-1)) {
+                                   (MsgHandlerId)-1)) {
     EBBRC rc;
     CObjEBBRootMultiImpRef rootRef;
     EBBId id;
     rc = CObjEBBRootMultiImpCreate(&rootRef, MsgHandlerTst_createRep);
     LRT_RCAssert(rc);
     rc = EBBAllocPrimId(&id);
     LRT_RCAssert(rc);
-    rc = CObjEBBBind(id, rootRef); 
+    rc = CObjEBBBind(id, rootRef);
     LRT_RCAssert(rc);
     theMsgHandlerTstId = (MsgHandlerId)id;
   } else {
@@ -145,31 +145,31 @@ CObject(MsgTst) {
 };
 
 
-EBBRC 
+EBBRC
 MsgTst_start(AppRef _self)
 {
   MsgHandlerId id = InitMsgHandlerTst();
   int numtosend = 100;
   EBBRC rc;
 
-  lrt_printf("MsgTst, core %d number of cores %d\n", MyEventLoc(), 
-	     NumEventLoc());
+  lrt_printf("MsgTst, core %d number of cores %d\n", MyEventLoc(),
+             NumEventLoc());
 
   // initialize the message handler, this will take over the
-  // IPI on this core. 
+  // IPI on this core.
   rc = MsgMgrPrim_Init();
   LRT_RCAssert(rc);
 
   if (MyEventLoc() != 0) {
     lrt_printf("MsgTst, core %d returning to event loop\n", MyEventLoc());
     return EBBRC_OK;
   }
-  
+
   // kick off message send
   COBJ_EBBCALL(theMsgMgrId, msg2, 0, id, numtosend, (uintptr_t)id);
 
   return EBBRC_OK;
-  
+
 }
 
 CObjInterface(App) MsgTst_ftable = {

arch/amd64/pic.h

@@ -27,17 +27,36 @@
 
 #include <arch/amd64/sysio.h>
 
-static const uint16_t PIC_MASTER = 0x20;
-static const uint16_t PIC_SLAVE = 0xa0;
+static const uint16_t PIC_MASTER_COMMAND = 0x20;
+static const uint16_t PIC_MASTER_DATA = 0x21;
+static const uint16_t PIC_SLAVE_COMMAND = 0xa0;
+static const uint16_t PIC_SLAVE_DATA = 0xa1;
 
-static inline void 
+static const uint8_t ICW1_ICW4 = 0x01;
+static const uint8_t ICW1_INIT = 0x10;
+
+static const uint8_t ICW4_8086 = 0x01;
+
+static inline void
 disable_pic()
 {
+  sysOut8(PIC_MASTER_COMMAND, ICW1_ICW4 + ICW1_INIT);
+  sysOut8(PIC_SLAVE_COMMAND, ICW1_ICW4 + ICW1_INIT);
+
+  sysOut8(PIC_MASTER_DATA, 0x10);
+  sysOut8(PIC_SLAVE_DATA, 0x18);
+
+  sysOut8(PIC_MASTER_DATA, 1 << 2);
+  sysOut8(PIC_SLAVE_DATA, 2);
+
+  sysOut8(PIC_MASTER_DATA, ICW4_8086);
+  sysOut8(PIC_SLAVE_DATA, ICW4_8086);
+
   //Disable the pic by masking all irqs
   //OCW 4 to a pic with a0 set (hence the +1 addr) will mask irqs
   //We set all bits to mask all the irqs
-  sysOut8(PIC_MASTER + 1, 0xFF);
-  sysOut8(PIC_SLAVE + 1, 0xFF);  
+  sysOut8(PIC_MASTER_DATA, 0xff);
+  sysOut8(PIC_SLAVE_DATA, 0xff);
 }
 
 #endif

arch/amd64/rtc.h

@@ -25,6 +25,7 @@
 
 #include <stdint.h>
 
+#include <lrt/io.h>
 #include <arch/amd64/sysio.h>
 
 static const uint16_t CMOS_SELECT = 0x70;
@@ -55,14 +56,13 @@ disable_rtc()
   uint8_t status_b = sysIn8(CMOS_REGISTER);
   //Mask off the three interrupts
   status_b &= ~(CMOS_STATUS_B_INT_UPDATE_ENDED |
-		CMOS_STATUS_B_INT_ALARM |
-		CMOS_STATUS_B_INT_PERIODIC);
+                CMOS_STATUS_B_INT_ALARM |
+                CMOS_STATUS_B_INT_PERIODIC);
   sysOut8(CMOS_SELECT, CMOS_STATUS_B);
   sysOut8(CMOS_REGISTER, status_b);
- 
+
   //We read register C to clear out pending interrupts
   sysOut8(CMOS_SELECT, CMOS_STATUS_C);
-  sysIn8(CMOS_REGISTER);
 }
 
 

arch/amd64/segmentation.h

@@ -49,7 +49,7 @@ STATIC_ASSERT(sizeof(segdesc) == 8, "segdesc packing issue");
 
 typedef struct {
   uint16_t limit;
-  segdesc *base __attribute__((packed));
+  volatile segdesc *base __attribute__((packed));
 } gdtr;
 
 STATIC_ASSERT(sizeof(gdtr) == (2 + sizeof(uintptr_t)), "gdtr packing issue");

contrib/dschatz/bochs/comp2sym

@@ -1,2 +1,2 @@
 #!/bin/bash
-nm $1 | grep " T " | awk '{ print $1" "$3 }' > $1.sym
+nm -n $1 | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' | awk '{print $1, $3}' > $1.sym

l0/lrt/bare/arch/amd64/acpi.c

@@ -32,7 +32,8 @@
 #define ACPI_MAX_INIT_TABLES    16
 static ACPI_TABLE_DESC TableArray[ACPI_MAX_INIT_TABLES];
 
-int acpi_get_num_cores()
+int
+acpi_get_num_cores()
 {
   madt *madt_ptr;
   ACPI_STATUS status = AcpiGetTable("APIC", 0, (ACPI_TABLE_HEADER **)&madt_ptr);
@@ -64,7 +65,8 @@ int acpi_get_num_cores()
   return ret;
 }
 
-int acpi_get_bsp()
+int
+acpi_get_bsp()
 {
   madt *madt_ptr;
   ACPI_STATUS status = AcpiGetTable("APIC", 0, (ACPI_TABLE_HEADER **)&madt_ptr);
@@ -92,6 +94,43 @@ int acpi_get_bsp()
   } while (size > 0);
   return -1;
 }
+
+ioapic *
+acpi_get_ioapic_addr()
+{
+  madt *madt_ptr;
+  ACPI_STATUS status = AcpiGetTable("APIC", 0, (ACPI_TABLE_HEADER **)&madt_ptr);
+  LRT_Assert(status == AE_OK);
+
+  uint32_t size = madt_ptr->header.Length - sizeof(madt);
+  uint8_t *ptr = (uint8_t *)(madt_ptr + 1);
+  uint8_t ioapics = 0;
+  ioapic *addr;
+  do {
+    if (*ptr == PROCESSOR_LOCAL_APIC) {
+      lapic_structure *ls = (lapic_structure *)ptr;
+      size -= ls->length;
+      ptr += ls->length;
+    } else if (*ptr == IO_APIC) {
+      ioapic_structure *is = (ioapic_structure *)ptr;
+      size -= is->length;
+      ptr += is->length;
+      addr = (ioapic *)(uintptr_t)is->ioapic_address;
+      ioapics++;
+    } else if (*ptr == INTERRUPT_SOURCE_OVERRIDE) {
+      iso_structure *is = (iso_structure *)ptr;
+      size -= is->length;
+      ptr += is->length;
+    } else {
+      //No definitions for other structures yet!
+      lrt_printf("Found MADT structed unimplimented: %d\n", *ptr);
+      LRT_Assert(0);
+    }
+  } while (size > 0);
+  LRT_Assert(ioapics == 1);
+  return addr;
+}
+
 void
 acpi_init()
 {

l0/lrt/bare/arch/amd64/acpi.h

@@ -23,8 +23,11 @@
  * THE SOFTWARE.
  */
 
+#include <arch/amd64/ioapic.h>
+
 void acpi_init(void);
 int acpi_get_num_cores(void);
 int acpi_get_bsp(void);
+ioapic *acpi_get_ioapic_addr(void);
 
 #endif