Educational load/store instruction set architecture processor simulator
Verilog C C++ Other
Latest commit 37d280a Mar 20, 2013 root wip
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cdlsim more work on the second go around with the RTL version. Oct 26, 2011
cdltwo working on call and stack examples Mar 20, 2013
cpld/pico/machx02 kinda messed up the lattice fpga was not a machx02, the machx02 is a … Oct 13, 2011
drafts preserving a doc version of the instruction set, exploring different … Aug 24, 2011
fpga adding cdltwo based Lattice Brevia fpga board example Oct 27, 2011
vbcc lsasim project, educational load/store architecture processor simulator Aug 11, 2011
verilator updated docs related to the verilator simulation Sep 3, 2011
LEARNASM.txt wip Mar 20, 2013
Makefile more c and v flag fixes to lsa-sim Aug 16, 2011
README use README.txt Aug 11, 2011
README.cdl.txt lsasim project, educational load/store architecture processor simulator Aug 11, 2011
README.txt lsasim project, educational load/store architecture processor simulator Aug 11, 2011
README.vbcc.txt lsasim project, educational load/store architecture processor simulator Aug 11, 2011
README.verilator.txt updated docs related to the verilator simulation Sep 3, 2011
lsa-as.c more work on the second go around with the RTL version. Oct 26, 2011
lsa-diss.c lsasim project, educational load/store architecture processor simulator Aug 11, 2011
lsa-isa.txt working on documentation, created a docbook version of the LEARNASM l… Aug 24, 2011
lsa-sim.c cannot make up my mind about c and v flags Aug 17, 2011
lsa.cdl lsasim project, educational load/store architecture processor simulator Aug 11, 2011
test.s lsasim project, educational load/store architecture processor simulator Aug 11, 2011

README

see README.txt