diff --git a/common/h/mnemonics/x86_entryIDs.h b/common/h/mnemonics/x86_entryIDs.h
index 09ce17f766..a9fcc00536 100644
--- a/common/h/mnemonics/x86_entryIDs.h
+++ b/common/h/mnemonics/x86_entryIDs.h
@@ -78,7 +78,8 @@ e_cmovnae = e_cmovb,
 e_cmovbe,
 e_cmove,
 e_cmovne,
-e_cmovng,
+e_cmovle,
+e_cmovng = e_cmovle,
 e_cmovnge,
 e_cmovnl,
 e_cmovno,
diff --git a/common/src/arch-x86.C b/common/src/arch-x86.C
index d9aebbbdf0..14caeb2e7e 100644
--- a/common/src/arch-x86.C
+++ b/common/src/arch-x86.C
@@ -920,7 +920,7 @@ COMMON_EXPORT dyn_hash_map<entryID, std::string> entryNames_IAPI = map_list_of
   (e_cmovae, "cmovae")
   (e_cmova, "cmova")
   (e_cmovne, "cmovne")
-  (e_cmovng, "cmovng")
+  (e_cmovle, "cmovle")
   (e_cmovnge, "cmovnge")
   (e_cmovnl, "cmovnl")
   (e_cmovno, "cmovno")
@@ -2069,7 +2069,7 @@ void ia32_instruction::initFlagTable(dyn_hash_map<entryID, flagInfo>& flagTable_
   flagTable_[e_cmovae] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmova] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovne] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
-  flagTable_[e_cmovng] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
+  flagTable_[e_cmovle] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovnge] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovnl] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
   flagTable_[e_cmovno] = flagInfo(list_of(x86::of)(x86::sf)(x86::zf)(x86::pf)(x86::cf), vector<Dyninst::MachRegister>());
@@ -2620,7 +2620,7 @@ static ia32_entry twoByteMap[256] = {
   { e_No_Entry,  t_sse_vex_mult, SSEVEX4B, false, { Zz, Zz, Zz }, 0, 0, 0 },
   { e_cmovnge, t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_cmovnl,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
-  { e_cmovng,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
+  { e_cmovle,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   { e_cmovnl,  t_done, 0, true, { Gv, Ev, Zz }, 0, s1RW2R | (fCOND << FPOS), 0 },
   /* 50 */
   { e_No_Entry, t_sse, SSE50, true, { Zz, Zz, Zz }, 0, 0, 0 },
diff --git a/dataflowAPI/src/convertOpcodes.C b/dataflowAPI/src/convertOpcodes.C
index 0a9db3e267..190191bf7a 100644
--- a/dataflowAPI/src/convertOpcodes.C
+++ b/dataflowAPI/src/convertOpcodes.C
@@ -254,7 +254,7 @@ X86InstructionKind RoseInsnX86Factory::convertKind(entryID opcode, prefixEntryID
             return x86_cmova;
         case e_cmovne:
             return x86_cmovne;
-        case e_cmovng:
+        case e_cmovle:
             return x86_cmovle;
         case e_cmovnge:
             return x86_cmovl;