diff --git a/compiler/x/amd64/codegen/RealRegisterMaskEnum.hpp b/compiler/x/amd64/codegen/RealRegisterMaskEnum.hpp index bd0b1b665e..3cacb60015 100644 --- a/compiler/x/amd64/codegen/RealRegisterMaskEnum.hpp +++ b/compiler/x/amd64/codegen/RealRegisterMaskEnum.hpp @@ -55,20 +55,20 @@ // XMMR // - xmm0Mask = 0x00000001 << XMMRMaskOffset, - xmm1Mask = 0x00000002 << XMMRMaskOffset, - xmm2Mask = 0x00000004 << XMMRMaskOffset, - xmm3Mask = 0x00000008 << XMMRMaskOffset, - xmm4Mask = 0x00000010 << XMMRMaskOffset, - xmm5Mask = 0x00000020 << XMMRMaskOffset, - xmm6Mask = 0x00000040 << XMMRMaskOffset, - xmm7Mask = 0x00000080 << XMMRMaskOffset, - xmm8Mask = 0x00000100 << XMMRMaskOffset, - xmm9Mask = 0x00000200 << XMMRMaskOffset, - xmm10Mask = 0x00000400 << XMMRMaskOffset, - xmm11Mask = 0x00000800 << XMMRMaskOffset, - xmm12Mask = 0x00001000 << XMMRMaskOffset, - xmm13Mask = 0x00002000 << XMMRMaskOffset, - xmm14Mask = 0x00004000 << XMMRMaskOffset, - xmm15Mask = 0x00008000 << XMMRMaskOffset, - AvailableXMMRMask = 0x0000FFFF << XMMRMaskOffset, + xmm0Mask = 0x00000001, + xmm1Mask = 0x00000002, + xmm2Mask = 0x00000004, + xmm3Mask = 0x00000008, + xmm4Mask = 0x00000010, + xmm5Mask = 0x00000020, + xmm6Mask = 0x00000040, + xmm7Mask = 0x00000080, + xmm8Mask = 0x00000100, + xmm9Mask = 0x00000200, + xmm10Mask = 0x00000400, + xmm11Mask = 0x00000800, + xmm12Mask = 0x00001000, + xmm13Mask = 0x00002000, + xmm14Mask = 0x00004000, + xmm15Mask = 0x00008000, + AvailableXMMRMask = 0x0000FFFF, diff --git a/compiler/x/codegen/OMRCodeGenerator.cpp b/compiler/x/codegen/OMRCodeGenerator.cpp index f78a3a3ea0..0ee4d0f178 100644 --- a/compiler/x/codegen/OMRCodeGenerator.cpp +++ b/compiler/x/codegen/OMRCodeGenerator.cpp @@ -1209,6 +1209,10 @@ void OMR::X86::CodeGenerator::saveBetterSpillPlacements(TR::Instruction * branch void OMR::X86::CodeGenerator::removeBetterSpillPlacementCandidate(TR::RealRegister * realReg) { + // This mechanism only supports GPR's due to interference between GPR and vector register masks + if (realReg->getKind() != TR_GPR) + return; + // Remove the given real register as a candidate for better spill placement // of any virtual registers. // @@ -1250,6 +1254,11 @@ OMR::X86::CodeGenerator::findBetterSpillPlacement( { TR::Instruction * placement; TR_BetterSpillPlacement * info; + + // This mechanism only supports GPR's due to interference between GPR and vector register masks + if (virtReg->getKind() != TR_GPR) + return NULL; + for (info = _betterSpillPlacements; info; info = info->_next) { if (info->_virtReg == virtReg) diff --git a/compiler/x/i386/codegen/RealRegisterMaskEnum.hpp b/compiler/x/i386/codegen/RealRegisterMaskEnum.hpp index 105ed54cbb..e50784bbfa 100644 --- a/compiler/x/i386/codegen/RealRegisterMaskEnum.hpp +++ b/compiler/x/i386/codegen/RealRegisterMaskEnum.hpp @@ -47,12 +47,12 @@ // XMMR // - xmm0Mask = 0x00000001 << XMMRMaskOffset, - xmm1Mask = 0x00000002 << XMMRMaskOffset, - xmm2Mask = 0x00000004 << XMMRMaskOffset, - xmm3Mask = 0x00000008 << XMMRMaskOffset, - xmm4Mask = 0x00000010 << XMMRMaskOffset, - xmm5Mask = 0x00000020 << XMMRMaskOffset, - xmm6Mask = 0x00000040 << XMMRMaskOffset, - xmm7Mask = 0x00000080 << XMMRMaskOffset, - AvailableXMMRMask = 0x000000FF << XMMRMaskOffset, + xmm0Mask = 0x00000001, + xmm1Mask = 0x00000002, + xmm2Mask = 0x00000004, + xmm3Mask = 0x00000008, + xmm4Mask = 0x00000010, + xmm5Mask = 0x00000020, + xmm6Mask = 0x00000040, + xmm7Mask = 0x00000080, + AvailableXMMRMask = 0x000000FF,