From 39f3c86c61ec478720bac9fca8f17ccedb8f052b Mon Sep 17 00:00:00 2001
From: Xiuwen Cai <50469933+xiuwencai@users.noreply.github.com>
Date: Thu, 28 Dec 2023 13:17:58 +0800
Subject: [PATCH] Add error handling in lock initialization in the Xtensa port
 (#340)

* Add error handling in lock initialization.

* Update release data and version.
---
 ports/xtensa/xcc/src/tx_clib_lock.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ports/xtensa/xcc/src/tx_clib_lock.c b/ports/xtensa/xcc/src/tx_clib_lock.c
index 072cbd52d..b95bf12b8 100644
--- a/ports/xtensa/xcc/src/tx_clib_lock.c
+++ b/ports/xtensa/xcc/src/tx_clib_lock.c
@@ -35,6 +35,10 @@
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
 /*  12-31-2020     Cadence Design Systems   Initial Version 6.1.3         */
+/*  12-31-2023     Xiuwen Cai               Modified comment(s), and      */
+/*                                            added error handling in     */
+/*                                            lock initialization,        */
+/*                                            resulting in version 6.4.0  */
 /*                                                                        */
 /**************************************************************************/
 
@@ -155,6 +159,8 @@ _Mtxinit (_Rmtx * mtx)
 
     if (lcnt >= XT_NUM_CLIB_LOCKS) {
         /* Fatal error */
+        *mtx = NULL;
+        return;
     }
 
     lock = &(xclib_locks[lcnt]);