diff --git a/compiler/aarch64/codegen/OMRTreeEvaluator.cpp b/compiler/aarch64/codegen/OMRTreeEvaluator.cpp index 84146fd2b95..e5329f30fcd 100644 --- a/compiler/aarch64/codegen/OMRTreeEvaluator.cpp +++ b/compiler/aarch64/codegen/OMRTreeEvaluator.cpp @@ -6938,7 +6938,7 @@ arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *cg, bool isArrayCmpLe generateCompareInstruction(cg, node, src1Reg, src2Reg, true); if (!isLengthGreaterThan15) { - auto ccmpLengthInstr = generateConditionalCompareImmInstruction(cg, node, lengthReg, 0, 4, TR::CC_NE, /* is64bit */ isArrayCmpLen); /* 4 for Z flag */ + auto ccmpLengthInstr = generateConditionalCompareImmInstruction(cg, node, lengthReg, 0, 4, TR::CC_NE, /* is64bit */ true); /* 4 for Z flag */ if (debugObj) { debugObj->addInstructionComment(ccmpLengthInstr, "Compares lengthReg with 0 if src1 and src2 are not the same array. Otherwise, sets EQ flag."); @@ -6960,14 +6960,14 @@ arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *cg, bool isArrayCmpLe TR::Register *data4Reg = srm->findOrCreateScratchRegister(); if (!isLengthGreaterThan15) { - generateCompareImmInstruction(cg, node, lengthReg, 16, /* is64bit */ isArrayCmpLen); + generateCompareImmInstruction(cg, node, lengthReg, 16, /* is64bit */ true); auto branchToLessThan16LabelInstr = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, lessThan16Label, TR::CC_CC); if (debugObj) { debugObj->addInstructionComment(branchToLessThan16LabelInstr, "Jumps to lessThan16Label if length < 16."); } } - generateTrg1Src1ImmInstruction(cg, isArrayCmpLen ? TR::InstOpCode::subimmx : TR::InstOpCode::subimmw, node, lengthReg, lengthReg, 16); + generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::subimmx, node, lengthReg, lengthReg, 16); TR::LabelSymbol *loop16Label = generateLabelSymbol(cg); { @@ -6984,29 +6984,22 @@ arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *cg, bool isArrayCmpLe } generateConditionalCompareInstruction(cg, node, data3Reg, data4Reg, 0, TR::CC_EQ, true); auto branchToNotEqual16LabelInstr2 = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, notEqual16Label, TR::CC_NE); - auto subtractLengthInstr = generateTrg1Src1ImmInstruction(cg, (isLengthGreaterThan15 || isArrayCmpLen) ? TR::InstOpCode::subsimmx : TR::InstOpCode::subsimmw, node, lengthReg, lengthReg, 16); + auto subtractLengthInstr = generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::subsimmx, node, lengthReg, lengthReg, 16); auto branchBacktoLoop16LabelInstr = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, loop16Label, TR::CC_CS); if (debugObj) { debugObj->addInstructionComment(loop16LabelInstr, "loop16Label"); debugObj->addInstructionComment(branchToNotEqual16LabelInstr2, "Jumps to notEqual16Label if mismatch is found in the 16-byte data"); debugObj->addInstructionComment(branchBacktoLoop16LabelInstr, "Jumps to loop16Label if the remaining length >= 16 and no mismatch is found so far."); - if (isLengthGreaterThan15) - { - debugObj->addInstructionComment(subtractLengthInstr, "Treats length reg as a 64-bit reg as it is used as the 2nd source reg for 64-bit add later."); - } } } if (isLengthGreaterThan15) { generateCompareImmInstruction(cg, node, lengthReg, -16, true); - auto branchToDoneLabelInstr3 = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, isArrayCmpLen ? done0Label : doneLabel, TR::CC_EQ); + auto branchToDoneLabelInstr3 = generateConditionalBranchInstruction(cg, TR::InstOpCode::b_cond, node, done0Label, TR::CC_EQ); auto adjustSrc1RegInstr = generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, src1Reg, src1Reg, lengthReg); generateTrg1Src2Instruction(cg, TR::InstOpCode::addx, node, src2Reg, src2Reg, lengthReg); - if (isArrayCmpLen) - loadConstant64(cg, node, 0, lengthReg); - else - loadConstant32(cg, node, 0, lengthReg); + loadConstant64(cg, node, 0, lengthReg); auto branchBacktoLoop16LabelInstr = generateLabelInstruction(cg, TR::InstOpCode::b, node, loop16Label); if (debugObj) { @@ -7025,16 +7018,8 @@ arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *cg, bool isArrayCmpLe else { TR::Instruction *branchToDoneLabelInstr3; - if (isArrayCmpLen) - { - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addimmx, node, lengthReg, lengthReg, 16); - branchToDoneLabelInstr3 = generateCompareBranchInstruction(cg, TR::InstOpCode::cbzx, node, lengthReg, done0Label); - } - else - { - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addimmw, node, lengthReg, lengthReg, 16); - branchToDoneLabelInstr3 = generateCompareBranchInstruction(cg, TR::InstOpCode::cbzw, node, lengthReg, doneLabel); - } + generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addimmx, node, lengthReg, lengthReg, 16); + branchToDoneLabelInstr3 = generateCompareBranchInstruction(cg, TR::InstOpCode::cbzx, node, lengthReg, isArrayCmpLen? done0Label : doneLabel); auto branchToLessThan16Label2 = generateLabelInstruction(cg, TR::InstOpCode::b, node, lessThan16Label); @@ -7092,7 +7077,7 @@ arraycmpEvaluatorHelper(TR::Node *node, TR::CodeGenerator *cg, bool isArrayCmpLe auto branchToDone0LabelInstr = generateLabelInstruction(cg, TR::InstOpCode::b, node, done0Label); auto lessThan16LabelInstr = generateLabelInstruction(cg, TR::InstOpCode::label, node, lessThan16Label); - generateTrg1Src1ImmInstruction(cg, isArrayCmpLen ? TR::InstOpCode::subsimmx : TR::InstOpCode::subsimmw, node, lengthReg, lengthReg, 1); + generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::subsimmx, node, lengthReg, lengthReg, 1); generateTrg1MemInstruction(cg, TR::InstOpCode::ldrbpost, node, data1Reg, TR::MemoryReference::createWithDisplacement(cg, src1Reg, 1)); generateTrg1MemInstruction(cg, TR::InstOpCode::ldrbpost, node, data2Reg, TR::MemoryReference::createWithDisplacement(cg, src2Reg, 1)); generateConditionalCompareInstruction(cg, node, data1Reg, data2Reg, 0, TR::CC_HI); diff --git a/compiler/il/OMROpcodes.enum b/compiler/il/OMROpcodes.enum index 9df76ef887c..f1eb7c1faf1 100644 --- a/compiler/il/OMROpcodes.enum +++ b/compiler/il/OMROpcodes.enum @@ -7196,7 +7196,7 @@ OPCODE_MACRO(\ /* .properties4 = */ 0, \ /* .dataType = */ TR::Int32, \ /* .typeProperties = */ ILTypeProp::Size_4 | ILTypeProp::Integer, \ - /* .childProperties = */ THREE_CHILD(TR::Address, TR::Address, TR::Int32), \ + /* .childProperties = */ THREE_CHILD(TR::Address, TR::Address, TR::Int64), \ /* .swapChildrenOpCode = */ TR::BadILOp, \ /* .reverseBranchOpCode = */ TR::BadILOp, \ /* .booleanCompareOpCode = */ TR::BadILOp, \ diff --git a/compiler/optimizer/LoopReducer.cpp b/compiler/optimizer/LoopReducer.cpp index a6e220fdd82..16cfdc2c747 100644 --- a/compiler/optimizer/LoopReducer.cpp +++ b/compiler/optimizer/LoopReducer.cpp @@ -2143,7 +2143,14 @@ TR_LoopReducer::generateArraycmp(TR_RegionStructure * whileLoop, TR_InductionVar // arraycmpLoop.getFirstAddress()->updateAiaddSubTree(arraycmpLoop.getFirstIndVarNode(), &arraycmpLoop); arraycmpLoop.getSecondAddress()->updateAiaddSubTree(arraycmpLoop.getSecondIndVarNode(), &arraycmpLoop); - TR::Node * imul = arraycmpLoop.updateIndVarStore(arraycmpLoop.getFirstIndVarNode(), indVarStoreNode, arraycmpLoop.getFirstAddress()); + TR::Node * mul = arraycmpLoop.updateIndVarStore(arraycmpLoop.getFirstIndVarNode(), indVarStoreNode, arraycmpLoop.getFirstAddress()); + if (!comp()->target().is64Bit()) + { + // updateIndVarStore returns an imul on 32 bit, extend as arraycmp takes 64 bit length + mul = TR::Node::create(TR::i2l, 1, mul); + // extending the imul is technically unneccessary since the length of an array on 32 bit cannot exceed 32 bit range + mul->setUnneededConversion(true); + } arraycmpLoop.getFirstAddress()->updateMultiply(arraycmpLoop.getFirstMultiplyNode()); arraycmpLoop.getFirstAddress()->updateMultiply(arraycmpLoop.getSecondMultiplyNode()); @@ -2159,7 +2166,7 @@ TR_LoopReducer::generateArraycmp(TR_RegionStructure * whileLoop, TR_InductionVar TR_ASSERT(arraycmpLoop.getSecondLoad()->getOpCode().isLoadVar(),"secondLoad %s (%p) is not a loadVar for arraycmp reduction\n", arraycmpLoop.getSecondLoad()->getOpCode().getName(),arraycmpLoop.getSecondLoad()); - TR::Node * arraycmp = TR::Node::create(TR::arraycmp, 3, firstBase, secondBase, imul); + TR::Node * arraycmp = TR::Node::create(TR::arraycmp, 3, firstBase, secondBase, mul); TR::SymbolReference *arraycmpSymRef = comp()->getSymRefTab()->findOrCreateArrayCmpSymbol(); arraycmp->setSymbolReference(arraycmpSymRef); diff --git a/compiler/p/codegen/OMRTreeEvaluator.cpp b/compiler/p/codegen/OMRTreeEvaluator.cpp index 232167eebf0..6c0ebccdd3e 100644 --- a/compiler/p/codegen/OMRTreeEvaluator.cpp +++ b/compiler/p/codegen/OMRTreeEvaluator.cpp @@ -5472,7 +5472,7 @@ static TR::Register *inlineArrayCmpP10(TR::Node *node, TR::CodeGenerator *cg, bo bool is64bit = cg->comp()->target().is64Bit(); - if (isArrayCmpLen && !is64bit) + if (!is64bit) { pairReg = tempReg; tempReg = tempReg->getLowOrder(); @@ -5482,13 +5482,13 @@ static TR::Register *inlineArrayCmpP10(TR::Node *node, TR::CodeGenerator *cg, bo startLabel->setStartInternalControlFlow(); generateTrg1ImmInstruction(cg, TR::InstOpCode::li, node, indexReg, 0); - generateTrg1Src1ImmInstruction(cg, (is64bit && isArrayCmpLen) ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg, tempReg, 16); + generateTrg1Src1ImmInstruction(cg, is64bit ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg, tempReg, 16); // We don't need length anymore as we can calculate the appropriate index by using indexReg and the remainder generateTrg1Src1Imm2Instruction(cg, TR::InstOpCode::rlwinm, node, returnReg, tempReg, 0, 0xF); generateConditionalBranchInstruction(cg, TR::InstOpCode::blt, node, residueStartLabel, condReg); - if (is64bit && isArrayCmpLen) + if (is64bit) { generateShiftRightLogicalImmediateLong(cg, node, tempReg, tempReg, 4); } @@ -5641,7 +5641,7 @@ static TR::Register *inlineArrayCmp(TR::Node *node, TR::CodeGenerator *cg, bool } byteLenRegister = cg->evaluate(lengthNode); - if (isArrayCmpLen && !is64bit) + if (!is64bit) { byteLenRegister = byteLenRegister->getLowOrder(); } @@ -5660,13 +5660,13 @@ static TR::Register *inlineArrayCmp(TR::Node *node, TR::CodeGenerator *cg, bool condReg2 = cg->allocateRegister(TR_CCR); mid2Label = generateLabelSymbol(cg); - generateTrg1Src1ImmInstruction(cg, (is64bit && isArrayCmpLen) ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, byteLen); + generateTrg1Src1ImmInstruction(cg, is64bit ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, byteLen); generateConditionalBranchInstruction(cg, TR::InstOpCode::blt, node, mid2Label, condReg2); generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi2, node, src1AddrReg, src1AddrReg, -1*byteLen); generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi2, node, src2AddrReg, src2AddrReg, -1*byteLen); - if (is64bit && isArrayCmpLen) + if (is64bit) { generateShiftRightLogicalImmediateLong(cg, node, tempReg, byteLenRemainingRegister, (byteLen == 8) ? 3 : 2); } @@ -5728,17 +5728,17 @@ static TR::Register *inlineArrayCmp(TR::Node *node, TR::CodeGenerator *cg, bool generateTrg1Instruction(cg, TR::InstOpCode::mfctr, node, byteLenRemainingRegister); - generateTrg1Src1ImmInstruction(cg, (is64bit && isArrayCmpLen) ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, 0); + generateTrg1Src1ImmInstruction(cg, is64bit ? TR::InstOpCode::cmpi8 : TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, 0); generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, byteLenRemainingRegister, byteLenRemainingRegister, tempReg); - if (is64bit && isArrayCmpLen) + if (is64bit) generateShiftLeftImmediateLong(cg, node, byteLenRemainingRegister, byteLenRemainingRegister, (byteLen == 8) ? 3 : 2); else generateShiftLeftImmediate(cg, node, byteLenRemainingRegister, byteLenRemainingRegister, (byteLen == 8) ? 3 : 2); generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, midLabel, condReg2); - generateTrg1Src2Instruction(cg, (is64bit && isArrayCmpLen) ? TR::InstOpCode::cmp8 : TR::InstOpCode::cmpl4, node, condReg2, byteLenRemainingRegister, byteLenRegister); + generateTrg1Src2Instruction(cg, is64bit ? TR::InstOpCode::cmp8 : TR::InstOpCode::cmpl4, node, condReg2, byteLenRemainingRegister, byteLenRegister); generateLabelInstruction(cg, TR::InstOpCode::label, node, midLabel); generateTrg1Src2Instruction(cg, TR::InstOpCode::subf, node, byteLenRemainingRegister, byteLenRemainingRegister, byteLenRegister); generateLabelInstruction(cg, TR::InstOpCode::label, node, mid2Label); @@ -5778,7 +5778,7 @@ static TR::Register *inlineArrayCmp(TR::Node *node, TR::CodeGenerator *cg, bool } else { - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, 0); + generateTrg1Src1ImmInstruction(cg, is64bit ? TR::InstOpCode::cmpli8 : TR::InstOpCode::cmpli4, node, condReg2, byteLenRemainingRegister, 0); generateConditionalBranchInstruction(cg, TR::InstOpCode::bne, node, result2Label, condReg2); generateTrg1ImmInstruction(cg, TR::InstOpCode::li, node, ccReg, 0); generateLabelInstruction(cg, TR::InstOpCode::b, node, residueEndLabel); diff --git a/compiler/x/codegen/OMRTreeEvaluator.cpp b/compiler/x/codegen/OMRTreeEvaluator.cpp index afd5567392a..0a0df6dc992 100644 --- a/compiler/x/codegen/OMRTreeEvaluator.cpp +++ b/compiler/x/codegen/OMRTreeEvaluator.cpp @@ -1151,7 +1151,15 @@ TR::Register *OMR::X86::TreeEvaluator::SSE2ArraycmpEvaluator(TR::Node *node, TR: TR::Register *s1Reg = cg->gprClobberEvaluate(s1AddrNode, TR::InstOpCode::MOVRegReg()); TR::Register *s2Reg = cg->gprClobberEvaluate(s2AddrNode, TR::InstOpCode::MOVRegReg()); - TR::Register *strLenReg = cg->gprClobberEvaluate(lengthNode, TR::InstOpCode::MOVRegReg()); + TR::Register *strLenReg = cg->longClobberEvaluate(lengthNode); + + if (cg->comp()->target().is32Bit() && strLenReg->getRegisterPair()) + { + // On 32-bit, the length is guaranteed to fit into the bottom 32 bits + cg->stopUsingRegister(strLenReg->getHighOrder()); + strLenReg = strLenReg->getLowOrder(); + } + TR::Register *deltaReg = cg->allocateRegister(TR_GPR); TR::Register *equalTestReg = cg->allocateRegister(TR_GPR); TR::Register *s2ByteVer1Reg = cg->allocateRegister(TR_GPR); diff --git a/compiler/z/codegen/OMRTreeEvaluator.cpp b/compiler/z/codegen/OMRTreeEvaluator.cpp index fe6042cda15..08e20f2ed2c 100644 --- a/compiler/z/codegen/OMRTreeEvaluator.cpp +++ b/compiler/z/codegen/OMRTreeEvaluator.cpp @@ -10759,7 +10759,9 @@ OMR::Z::TreeEvaluator::arraycmpHelper(TR::Node *node, bool lengthCanBeZero = true; bool lenMinusOne = false; - bool needs64BitOpCode = false; + + // Length is specified to be 64 bits, however on 32 bit target the length is guaranteed to fit in 32 bits + bool needs64BitOpCode = cg->comp()->target().is64Bit(); TR::LabelSymbol *cFlowRegionStart = generateLabelSymbol(cg); TR::LabelSymbol *cFlowRegionEnd = generateLabelSymbol(cg); @@ -10770,15 +10772,6 @@ OMR::Z::TreeEvaluator::arraycmpHelper(TR::Node *node, TR::RegisterPair *source1Pair = NULL; TR::RegisterPair *source2Pair = NULL; - if (lengthNode) - { - needs64BitOpCode = lengthNode->getSize() > 4; - } - else - { - needs64BitOpCode = cg->comp()->target().is64Bit(); - } - if (maxLenIn256) { source1Reg = cg->evaluate(source1Node); diff --git a/fvtest/compilertriltest/ArrayTest.cpp b/fvtest/compilertriltest/ArrayTest.cpp index 73314381f7f..1e2c0a0d4a0 100644 --- a/fvtest/compilertriltest/ArrayTest.cpp +++ b/fvtest/compilertriltest/ArrayTest.cpp @@ -32,7 +32,7 @@ static const int32_t returnValueForArraycmpEqual = 0; * @details Used for arraycmp test with the arrays with same data. * The parameter is the length parameter for the arraycmp evaluator. */ -class ArraycmpEqualTest : public TRTest::JitTest, public ::testing::WithParamInterface {}; +class ArraycmpEqualTest : public TRTest::JitTest, public ::testing::WithParamInterface {}; /** * @brief TestFixture class for arraycmp test * @@ -40,7 +40,7 @@ class ArraycmpEqualTest : public TRTest::JitTest, public ::testing::WithParamInt * The first parameter is the length parameter for the arraycmp evaluator. * The second parameter is the offset of the mismatched element in the arrays. */ -class ArraycmpNotEqualTest : public TRTest::JitTest, public ::testing::WithParamInterface> {}; +class ArraycmpNotEqualTest : public TRTest::JitTest, public ::testing::WithParamInterface> {}; TEST_P(ArraycmpEqualTest, ArraycmpSameArray) { SKIP_ON_ARM(MissingImplementation); @@ -58,7 +58,7 @@ TEST_P(ArraycmpEqualTest, ArraycmpSameArray) { " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iconst %d)))))", + " (lconst %" OMR_PRId64 ")))))", length ); auto trees = parseString(inputTrees); @@ -87,7 +87,7 @@ TEST_P(ArraycmpEqualTest, ArraycmpEqualConstLen) { " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iconst %d)))))", + " (lconst %" OMR_PRId64 ")))))", length ); auto trees = parseString(inputTrees); @@ -111,13 +111,13 @@ TEST_P(ArraycmpEqualTest, ArraycmpEqualVariableLen) { auto length = GetParam(); char inputTrees[1024] = {0}; std::snprintf(inputTrees, sizeof(inputTrees), - "(method return=Int32 args=[Address, Address, Int32]" + "(method return=Int32 args=[Address, Address, Int64]" " (block" " (ireturn" " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iload parm=2)))))" + " (lload parm=2)))))" ); auto trees = parseString(inputTrees); @@ -129,11 +129,11 @@ TEST_P(ArraycmpEqualTest, ArraycmpEqualVariableLen) { std::vector s1(length, 0x5c); std::vector s2(length, 0x5c); - auto entry_point = compiler.getEntryPoint(); + auto entry_point = compiler.getEntryPoint(); EXPECT_EQ(returnValueForArraycmpEqual, entry_point(&s1[0], &s2[0], length)); } -INSTANTIATE_TEST_CASE_P(ArraycmpTest, ArraycmpEqualTest, ::testing::Range(1, 128)); +INSTANTIATE_TEST_CASE_P(ArraycmpTest, ArraycmpEqualTest, ::testing::Range(static_cast(1), static_cast(128))); TEST_P(ArraycmpNotEqualTest, ArraycmpGreaterThanConstLen) { SKIP_ON_ARM(MissingImplementation); @@ -149,7 +149,7 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpGreaterThanConstLen) { " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iconst %d)))))", + " (lconst %" OMR_PRId64 ")))))", length ); auto trees = parseString(inputTrees); @@ -176,13 +176,13 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpGreaterThanVariableLen) { auto offset = std::get<1>(GetParam()); char inputTrees[1024] = {0}; std::snprintf(inputTrees, sizeof(inputTrees), - "(method return=Int32 args=[Address, Address, Int32]" + "(method return=Int32 args=[Address, Address, Int64]" " (block" " (ireturn" " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iload parm=2)))))" + " (lload parm=2)))))" ); auto trees = parseString(inputTrees); @@ -196,7 +196,7 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpGreaterThanVariableLen) { std::vector s2(length, 0x5c); s1[offset] = 0x81; - auto entry_point = compiler.getEntryPoint(); + auto entry_point = compiler.getEntryPoint(); EXPECT_EQ(returnValueForArraycmpGreaterThan, entry_point(&s1[0], &s2[0], length)); } @@ -214,7 +214,7 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpLessThanConstLen) { " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iconst %d)))))", + " (lconst %" OMR_PRId64 ")))))", length ); auto trees = parseString(inputTrees); @@ -241,13 +241,13 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpLessThanVariableLen) { auto offset = std::get<1>(GetParam()); char inputTrees[1024] = {0}; std::snprintf(inputTrees, sizeof(inputTrees), - "(method return=Int32 args=[Address, Address, Int32]" + "(method return=Int32 args=[Address, Address, Int64]" " (block" " (ireturn" " (arraycmp address=0 args=[Address, Address]" " (aload parm=0)" " (aload parm=1)" - " (iload parm=2)))))" + " (lload parm=2)))))" ); auto trees = parseString(inputTrees); @@ -261,13 +261,12 @@ TEST_P(ArraycmpNotEqualTest, ArraycmpLessThanVariableLen) { std::vector s2(length, 0x5c); s1[offset] = 0x21; - auto entry_point = compiler.getEntryPoint(); + auto entry_point = compiler.getEntryPoint(); EXPECT_EQ(returnValueForArraycmpLessThan, entry_point(&s1[0], &s2[0], length)); } -template -static std::vector> createArraycmpNotEqualParam() { - std::vector> v; +static std::vector> createArraycmpNotEqualParam() { + std::vector> v; /* Small arrays */ for (int i = 1; i < 32; i++) { for (int j = 0; j < i; j++) { @@ -290,7 +289,7 @@ static std::vector> createArraycmpNotEqualParam() { } return v; } -INSTANTIATE_TEST_CASE_P(ArraycmpTest, ArraycmpNotEqualTest, ::testing::ValuesIn(createArraycmpNotEqualParam())); +INSTANTIATE_TEST_CASE_P(ArraycmpTest, ArraycmpNotEqualTest, ::testing::ValuesIn(createArraycmpNotEqualParam())); /** @@ -467,4 +466,4 @@ TEST_P(ArraycmplenNotEqualTest, ArraycmpLenNotEqualVariableLen) { EXPECT_EQ(offset, entry_point(&s1[0], &s2[0], length)); } -INSTANTIATE_TEST_CASE_P(ArraycmplenTest, ArraycmplenNotEqualTest, ::testing::ValuesIn(createArraycmpNotEqualParam())); +INSTANTIATE_TEST_CASE_P(ArraycmplenTest, ArraycmplenNotEqualTest, ::testing::ValuesIn(createArraycmpNotEqualParam()));