This was contributed by Simon Cook and Edward Jones at Embecosm.

Instruction encodings are tidier and some missing instructions were
added. The assembly syntax has been altered (registers prefixed with '$'
and memsrc operands in square brackets) which avoids name conflicts with
symbols and makes differentiating between memsrc operands and
expressions easier.

relocations.

Immediate operands have been replaced with custom operands, and new
memsrc operands have been added for the short load and store
instructions. Operands now check that their immediates fit within their
defined range.

Fixups are now emitted for all instructions and now have accompanying
relocations. If a fixup cannot be resolved in the compiler then the
corresponding instruction will be relaxed to a longer equivalent.

unsupported ops

Uses repeated adds/subs to move the stack pointer. For large stack
frames this will become very inefficient.

They are likely to be removed in the future and their encoding is
currently invalid.

These types are the same as the immediate types, however they cannot
encode expressions and therefore cannot produce fixups.

An imm16 may take values in the range [-32768, 65535].

Conditional and unconditional branches and jumps should always assemble
long. This means that the immediate fields should be large enough for
any fixup. These instructions will be relaxed in the linker at a later
point.

Short jumps do not have any immediate field, so they can always be
assembled safely.

Memsrc10 is a ten bit signed offset for load and store instructions,
replacing memsrc6. It reuses the opcodes bits of the second instruction
word to encode a longer immediate.

A new fixup and relocation has been added for the 10 bit offset field.
The field encodes in the same bits as the ABS10 relocation, the only
difference is that it may be signed.

Short branch instructions should never be generated or assembled, and
short ALU ops cannot encode fixups in their immediate fields as they do
not accept arbitrary expression.

The TokenFactor was only provided the chain of the first store

Initial frame pointer support has been added, with the frame pointer
currently statically defined as R2.

Tell LLVM that branches are not PC relative to avoid them from being
resolved in the compiler. These have more complex bit-fields and are
instead resolved in the linker.

Complexity has been added in order to select short instructions in
preference to long. 123 was chosen as the AddedComplexity value so that
it is easy to identify, as it does not seem to be possible to
parameterize it.

Some of the tests produce correct code sequences, but the code sequences
are not optimal. These were previously marked as FIXMEs, but I am
remarking as TODOs as they are still functionally correct.

CodeGen tests have been updated to reflect the desired prioritization
when selecting instructions. The AddedComplexity of the instructions
has been tweaked such that they are the minimal values which cause all
of the tests to pass.

These files have been reorganized to make them easier to read.