From 05c1d1cc1a2ce53078cf5474d6df5530dd88111d Mon Sep 17 00:00:00 2001 From: Haydn Trigg Date: Wed, 27 May 2026 16:56:54 +0930 Subject: [PATCH 1/3] Strip trailing int3 instructions (alignment padding) for x64 --- objdiff-core/src/arch/x86.rs | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/objdiff-core/src/arch/x86.rs b/objdiff-core/src/arch/x86.rs index 004a3375..36da45af 100644 --- a/objdiff-core/src/arch/x86.rs +++ b/objdiff-core/src/arch/x86.rs @@ -181,6 +181,12 @@ impl Arch for ArchX86 { branch_dest, }); } + // Strip trailing int3 instructions (alignment padding) for x64 + if matches!(self.arch, Architecture::X86_64) { + while out.last().map(|i| i.opcode == iced_x86::Mnemonic::Int3 as u16).unwrap_or(false) { + out.pop(); + } + } Ok(out) } From 1f10a3ea71421f16b5364fb7928739a697679dee Mon Sep 17 00:00:00 2001 From: Haydn Trigg Date: Tue, 2 Jun 2026 11:39:29 +0930 Subject: [PATCH 2/3] Improve strip trailing int3 instructions --- objdiff-core/src/arch/x86.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/objdiff-core/src/arch/x86.rs b/objdiff-core/src/arch/x86.rs index 36da45af..6b191b20 100644 --- a/objdiff-core/src/arch/x86.rs +++ b/objdiff-core/src/arch/x86.rs @@ -183,7 +183,7 @@ impl Arch for ArchX86 { } // Strip trailing int3 instructions (alignment padding) for x64 if matches!(self.arch, Architecture::X86_64) { - while out.last().map(|i| i.opcode == iced_x86::Mnemonic::Int3 as u16).unwrap_or(false) { + while out.last().map_or(false, |i| i.opcode == iced_x86::Mnemonic::Int3 as u16) { out.pop(); } } From 79f8e0efd1dd13371e514d6e222908adf6df609f Mon Sep 17 00:00:00 2001 From: Haydn Trigg Date: Tue, 2 Jun 2026 11:51:29 +0930 Subject: [PATCH 3/3] Improve strip trailing int3 instructions again --- objdiff-core/src/arch/x86.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/objdiff-core/src/arch/x86.rs b/objdiff-core/src/arch/x86.rs index 6b191b20..d6098598 100644 --- a/objdiff-core/src/arch/x86.rs +++ b/objdiff-core/src/arch/x86.rs @@ -183,7 +183,7 @@ impl Arch for ArchX86 { } // Strip trailing int3 instructions (alignment padding) for x64 if matches!(self.arch, Architecture::X86_64) { - while out.last().map_or(false, |i| i.opcode == iced_x86::Mnemonic::Int3 as u16) { + while out.last().is_some_and(|i| i.opcode == iced_x86::Mnemonic::Int3 as u16) { out.pop(); } }