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pgraph/hwtest: Nailed down Kelvin+ nop/sync methods.
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17 additions
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5 deletions.
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+1
−0
hwtest/pgraph_mthd.h
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+14
−1
hwtest/pgraph_mthd_misc.cc
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+2
−4
nvhw/pgraph_class.c
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@@ -88,6 +88,7 @@ class MthdNop : public SingleMthdTest { |
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class MthdSync : public SingleMthdTest { |
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void emulate_mthd() override {} |
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bool is_valid_val() override; |
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bool is_valid_mthd() override { return !sync; } |
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using SingleMthdTest::SingleMthdTest; |
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}; |
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@@ -119,6 +119,9 @@ class MthdNopTest : public MthdTest { |
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bool is_valid_val() override { |
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if (sync) |
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return val < 4; |
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if (pgraph_3d_class(&exp) >= PGRAPH_3D_KELVIN) { |
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return val == 0; |
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} |
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return true; |
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} |
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void emulate_mthd_pre() override { |
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@@ -176,7 +179,7 @@ void MthdNop::adjust_orig_mthd() { |
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} |
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void MthdNop::emulate_mthd_pre() { |
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if (sync) { |
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if (sync && pgraph_3d_class(&exp) < PGRAPH_3D_KELVIN) { |
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trapbit = 0; |
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} |
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} |
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@@ -196,6 +199,16 @@ void MthdNop::emulate_mthd() { |
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bool MthdNop::is_valid_val() { |
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if (sync) |
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return val < 4; |
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if (pgraph_3d_class(&exp) >= PGRAPH_3D_KELVIN) { |
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return val == 0; |
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} |
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return true; |
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} |
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bool MthdSync::is_valid_val() { |
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if (pgraph_3d_class(&exp) >= PGRAPH_3D_KELVIN) { |
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return val == 0; |
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} |
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return true; |
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} |
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@@ -30,12 +30,12 @@ bool nv04_pgraph_is_syncable_class(struct pgraph_state *state) { |
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int cls = pgraph_class(state); |
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bool alt = extr(state->debug_d, 16, 1) && state->chipset.card_type >= 0x10; |
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switch (cls) { |
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case 0x8a: |
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case 0x88: |
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return state->chipset.card_type >= 0x10; |
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case 0x62: |
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case 0x7b: |
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case 0x89: |
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case 0x8a: |
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case 0x56: |
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return state->chipset.card_type >= 0x10 && !alt; |
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case 0x79: |
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@@ -159,8 +159,6 @@ bool nv04_pgraph_is_sync_class(struct pgraph_state *state) { |
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} |
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bool nv04_pgraph_is_sync(struct pgraph_state *state) { |
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int cls = pgraph_class(state); |
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bool alt = extr(state->debug_d, 16, 1) && state->chipset.card_type >= 0x10; |
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if (state->chipset.card_type < 0x10) |
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return false; |
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if (nv04_pgraph_is_nv11p(&state->chipset)) { |
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@@ -170,7 +168,7 @@ bool nv04_pgraph_is_sync(struct pgraph_state *state) { |
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} |
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} else if (nv04_pgraph_is_nv15p(&state->chipset)) { |
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if (nv04_pgraph_is_syncable_class(state)) { |
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if (extr(state->ctx_switch_a, 26, 1) && (cls != 0x8a || !alt)) |
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if (extr(state->ctx_switch_a, 26, 1)) |
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return true; |
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} |
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} |
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