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hwdocs: Use :titlesonly: in all toctrees.

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1 parent a31c198 commit 98ebf104de38426468bb55dd6e39f8477a1b377b @koriakin koriakin committed Jan 30, 2014
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2 hwdocs/bus/index.rst
@@ -4,7 +4,7 @@ PCI/PCIE/AGP bus interface and card management logic
Contents:
.. toctree::
- :maxdepth: 2
+ :titlesonly:
pmc
ptimer
View
8 hwdocs/display/index.rst
@@ -4,6 +4,8 @@ Display subsystem
Contents:
.. toctree::
- nv01/index
- nv03/index
- nv50/index
+ :titlesonly:
+
+ nv01/index
+ nv03/index
+ nv50/index
View
6 hwdocs/display/nv01/index.rst
@@ -4,5 +4,7 @@ NV01 display subsystem
Contents:
.. toctree::
- pfb
- pdac
+ :titlesonly:
+
+ pfb
+ pdac
View
14 hwdocs/display/nv03/index.rst
@@ -4,9 +4,11 @@ NV03:NV50 display subsystem
Contents:
.. toctree::
- vga
- pcrtc
- pramdac
- pvideo
- ptv
- vga-stack
+ :titlesonly:
+
+ vga
+ pcrtc
+ pramdac
+ pvideo
+ ptv
+ vga-stack
View
15 hwdocs/display/nv50/index.rst
@@ -4,11 +4,12 @@ NV50- display subsystem
Contents:
.. toctree::
+ :titlesonly:
- pdisplay
- pdisplay-daemon
- vga
- vga-mutex
- punk1c3
- pcodec
- pkfuse
+ pdisplay
+ pdisplay-daemon
+ vga
+ vga-mutex
+ punk1c3
+ pcodec
+ pkfuse
View
1 hwdocs/falcon/index.rst
@@ -4,6 +4,7 @@ falcon microprocessor
Contents:
.. toctree::
+ :titlesonly:
intro
isa
View
40 hwdocs/fifo/index.rst
@@ -3,31 +3,17 @@ PFIFO: command submission to execution engines
Contents:
-.. rubric:: FIFO, user perspective
-
-.. toctree::
- :maxdepth: 2
-
- intro
- pio
- dma-pusher
- puller
- classes
-
-.. rubric:: FIFO, kernel perspective
-
.. toctree::
- :maxdepth: 2
-
- nv01-pfifo
- nv04-pfifo
- nv50-pfifo
- nvc0-pfifo
- nvc0-psubfifo
-
-.. rubric:: Other FIFO engines
-
-.. toctree::
- :maxdepth: 2
-
- pcopy
+ :titlesonly:
+
+ intro
+ pio
+ dma-pusher
+ puller
+ classes
+ nv01-pfifo
+ nv04-pfifo
+ nv50-pfifo
+ nvc0-pfifo
+ nvc0-psubfifo
+ pcopy
View
23 hwdocs/graph/2d/index.rst
@@ -5,15 +5,16 @@
Contents:
.. toctree::
+ :titlesonly:
- intro
- pattern
- ctxobj
- solid
- ifc
- blit
- ifm
- nv01-tex
- gdi
- sifm
- dvd
+ intro
+ pattern
+ ctxobj
+ solid
+ ifc
+ blit
+ ifm
+ nv01-tex
+ gdi
+ sifm
+ dvd
View
5 hwdocs/graph/celsius/index.rst
@@ -4,6 +4,7 @@ NV10 Celsius graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- 3d
+ pgraph
+ 3d
View
5 hwdocs/graph/curie/index.rst
@@ -4,6 +4,7 @@ NV40 Curie graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- 3d
+ pgraph
+ 3d
View
3 hwdocs/graph/fermi/ctxctl/index.rst
@@ -4,5 +4,6 @@ NVC0 context switching units
Contents:
.. toctree::
+ :titlesonly:
- intro
+ intro
View
13 hwdocs/graph/fermi/index.rst
@@ -4,10 +4,11 @@ NVC0 Fermi graphics and compute engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- macro
- ctxctl/index
- 3d
- isa
- compute
+ pgraph
+ macro
+ ctxctl/index
+ 3d
+ isa
+ compute
View
27 hwdocs/graph/index.rst
@@ -4,17 +4,18 @@ PGRAPH: 2d/3d graphics and compute engine
Contents:
.. toctree::
+ :titlesonly:
- intro
- m2mf
- 2d/index
- nv01/index
- riva/index
- tnt/index
- celsius/index
- kelvin/index
- rankine/index
- curie/index
- tesla/index
- fermi/index
- kepler/index
+ intro
+ m2mf
+ 2d/index
+ nv01/index
+ riva/index
+ tnt/index
+ celsius/index
+ kelvin/index
+ rankine/index
+ curie/index
+ tesla/index
+ fermi/index
+ kepler/index
View
5 hwdocs/graph/kelvin/index.rst
@@ -4,6 +4,7 @@ NV20 Kelvin graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- 3d
+ pgraph
+ 3d
View
5 hwdocs/graph/kepler/index.rst
@@ -4,6 +4,7 @@ NVE4 Kepler graphics and compute engine
Contents:
.. toctree::
+ :titlesonly:
- 3d
- compute
+ 3d
+ compute
View
3 hwdocs/graph/nv01/index.rst
@@ -4,5 +4,6 @@ NV01 graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
+ pgraph
View
3 hwdocs/graph/rankine/index.rst
@@ -4,5 +4,6 @@ NV30 Rankine graphics engine
Contents:
.. toctree::
+ :titlesonly:
- 3d
+ 3d
View
7 hwdocs/graph/riva/index.rst
@@ -4,7 +4,8 @@ NV03 graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- pdma
- 3d
+ pgraph
+ pdma
+ 3d
View
11 hwdocs/graph/tesla/index.rst
@@ -4,9 +4,10 @@ NV50 Tesla graphics and compute engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- ctxctl
- 3d
- isa
- compute
+ pgraph
+ ctxctl
+ 3d
+ isa
+ compute
View
5 hwdocs/graph/tnt/index.rst
@@ -4,6 +4,7 @@ NV04 graphics engine
Contents:
.. toctree::
+ :titlesonly:
- pgraph
- 3d
+ pgraph
+ 3d
View
2 hwdocs/index.rst
@@ -4,7 +4,7 @@ nVidia hardware documentation
Contents:
.. toctree::
- :maxdepth: 2
+ :titlesonly:
intro
chipsets
View
15 hwdocs/io/index.rst
@@ -4,11 +4,12 @@ GPU external device I/O units
Contents:
.. toctree::
+ :titlesonly:
- pstraps
- prom
- pnvio
- nv10-gpio
- nv50-gpio
- nv01-peeprom
- pmedia
+ pstraps
+ prom
+ pnvio
+ nv10-gpio
+ nv50-gpio
+ nv01-peeprom
+ pmedia
View
63 hwdocs/memory/index.rst
@@ -4,35 +4,36 @@ Memory access and structure
Contents:
.. toctree::
+ :titlesonly:
- vram
- nv01-vram
- nv01-pdma
- nv01-surface
- nv03-vram
- nv03-dmaobj
- nv03-pfb
- nv04-vram
- nv04-dmaobj
- nv10-pfb
- peephole
- nv40-pfb
- nv44-pfb
- nv44-host-mem
- nv50-surface
- nv50-vm
- nv50-host-mem
- nv50-vram
- nv50-comp
- nv50-p2p
- nv50-remap
- nv50-pfb
- nvc0-vm
- nvc0-host-mem
- nvc0-vram
- nvc0-comp
- nvc0-p2p
- pffb
- pmfb
- pbfb
- pxbar
+ vram
+ nv01-vram
+ nv01-pdma
+ nv01-surface
+ nv03-vram
+ nv03-dmaobj
+ nv03-pfb
+ nv04-vram
+ nv04-dmaobj
+ nv10-pfb
+ peephole
+ nv40-pfb
+ nv44-pfb
+ nv44-host-mem
+ nv50-surface
+ nv50-vm
+ nv50-host-mem
+ nv50-vram
+ nv50-comp
+ nv50-p2p
+ nv50-remap
+ nv50-pfb
+ nvc0-vm
+ nvc0-host-mem
+ nvc0-vram
+ nvc0-comp
+ nvc0-p2p
+ pffb
+ pmfb
+ pbfb
+ pxbar
View
215 hwdocs/memory/nv50-vm.rst
@@ -78,61 +78,176 @@ VM users
VM is used by several clients, which are identified by VM client id:
-==== ========== =========== ================ ============
-Id Present on Name Engines Description
-==== ========== =========== ================ ============
-0 all STRMOUT PGRAPH :ref:`PGRAPH streamout writes <nv50-pgraph-strmout>`
-3 all DISPATCH PGRAPH :ref:`PGRAPH context save/restore, NOTIFY, QUERY, COND, and m2mf <nv50-pgraph-dispatch>`
-4 all PFIFO_WRITE PFIFO, PFIFO_BG, :ref:`non-blocking write accesses by PFIFO, for FIFOs and BARs <nv50-pfifo-vm>`
- PEEPHOLE, BAR
-5 all CCACHE PGRAPH :ref:`PGRAPH c[], code, TIC, and TSC accesses <nv50-pgraph-ccache>`
-6 VP1-VP2 PVPE PMPEG, PME, PVP1 :ref:`VM front-end for PMPEG + PME [NV50 only] + PVP1 [NV50 only] <pvpe>`
-6 VP3 PPPP PPPP :ref:`pppp`
-7 all CLIPID PGRAPH :ref:`PGRAPH window clip id reads/writes <nv50-pgraph-clipid>`
-8 all PFIFO_READ PFIFO, PFIFO_BG :ref:`reads by PFIFO, for FIFOs and BARs <nv50-pfifo-vm>`
- PEEPHOLE, BAR
-9 all VFETCH PGRAPH :ref:`PGRAPH vertex array fetch <nv50-pgraph-vfetch>`
-0xa all TEXTURE PGRAPH :ref:`PGRAPH texture fetches <nv50-pgraph-texture>`
-0xb all ROP PGRAPH :ref:`PGRAPH raster output and CUDA global/local memory accesses <nv50-pgraph-rop>`
-0xc VP2 PVP2 PVP2 :ref:`pvp2`
-0xc VP3- PVDEC PVDEC :ref:`pvdec`
-0xd VP2 PBSP PBSP :ref:`pbsp`
-0xd VP3- PVLD PVLD :ref:`pvld`
-0xe VP2 PCRYPT2 PCRYPT2 :ref:`pcrypt2`
-0xe VP3 PCRYPT3 PCRYPT3 :ref:`pcrypt3`
-0xf NV84- PCOUNTER PCOUNTER :ref:`pcounter`
-0x11 NVA3- PDAEMON PDAEMON :ref:`pdaemon`
-0x13 NVA3- PCOPY PCOPY :ref:`pcopy`
-0x14 NVAF- PVCOMP PVCOMP :ref:`pvcomp`
-==== ========== =========== ================ ============
+.. enum:: nv50-vm-client
+
+ .. value:: 0x00 STRMOUT
+ :engine: PGRAPH
+ :ref: nv50-vm-client-strmout
+
+ PGRAPH streamout writes
+
+ .. value:: 0x03 DISPATCH
+ :engine: PGRAPH
+ :ref: nv50-vm-client-dispatch
+
+ PGRAPH context save/restore, NOTIFY, QUERY, COND, and m2mf
+
+ .. value:: 0x04 PFIFO_WRITE
+ :engine: PFIFO PFIFO_BG PEEPHOLE BAR
+ :ref: nv50-vm-client-pfifo-write
+
+ Non-blocking write accesses by PFIFO, for FIFOs and BARs
+
+ .. value:: 0x05 CCACHE
+ :engine: PGRAPH
+ :ref: nv50-vm-client-ccache
+
+ PGRAPH c[], code, TIC, and TSC accesses
+
+ .. value:: 0x06 PVPE VP1,VP2
+ :engine: PMPEG PME PVP1
+ :ref: nv50-vm-client-pvpe
+
+ VM front-end for PMPEG + PME [NV50 only] + PVP1 [NV50 only]
+
+ .. value:: 0x06 PPPP VP3,VP4
+ :engine: PPPP
+ :ref: nv50-vm-client-pppp
+
+ .. value:: 0x07 CLIPID
+ :engine: PGRAPH
+ :ref: nv50-vm-client-clipid
+
+ PGRAPH window clip id reads/writes
+
+ .. value:: 0x08 PFIFO_READ
+ :engine: PFIFO PFIFO_BG PEEPHOLE BAR
+ :ref: nv50-vm-client-pfifo-read
+
+ Reads by PFIFO, for FIFOs and BARs
+
+ .. value:: 0x09 VFETCH
+ :engine: PGRAPH
+ :ref: nv50-vm-client-vfetch
+
+ PGRAPH vertex array fetch
+
+ .. value:: 0x0a TEXTURE
+ :engine: PGRAPH
+ :ref: nv50-vm-client-texture
+
+ PGRAPH texture fetches
+
+ .. value:: 0x0b PROP
+ :engine: PGRAPH
+ :ref: nv50-vm-client-prop
+
+ PGRAPH raster output and CUDA global/local memory accesses
+
+ .. value:: 0x0c PVP2 VP2
+ :engine: PVP2
+ :ref: pvp2
+
+ .. value:: 0x0c PVDEC VP3,VP4
+ :engine: PVDEC
+ :ref: pvdec
+
+ .. value:: 0x0d PBSP VP2
+ :engine: PBSP
+ :ref: pbsp
+
+ .. value:: 0x0d PVLD VP3,VP4
+ :engine: PVLD
+ :ref: pvld
+
+ .. value:: 0x0e PCRYPT2 VP2
+ :engine: PCRYPT2
+ :ref: nv50-vm-client-pcrypt2
+
+ .. value:: 0x0e PCRYPT3 VP3
+ :engine: PCRYPT3
+ :ref: pcrypt3
+
+ .. value:: 0x0f PCOUNTER NV84:
+ :engine: PCOUNTER
+ :ref: nv50-vm-client-pcounter
+
+ .. value:: 0x11 PDAEMON NVA3:
+ :engine: PDAEMON
+ :ref: pdaemon
+
+ .. value:: 0x13 PCOPY NVA3:
+ :engine: PCOPY
+ :ref: pcopy
+
+ .. value:: 0x14 PVCOMP NVAF:
+ :engine: PVCOMP
+ :ref: pvcomp
A related concept is VM engine, which is a group of clients that share TLBs
and stay on the same channel at any single moment. It's possible for a client
to be part of several VM engines. The engines are:
-==== ========== =============== ============
-Id Present on Name Description
-==== ========== =============== ============
-0 all PGRAPH :ref:`nv50-pgraph`
-1 VP1 PVP1 :ref:`pvp1`
-1 VP2 PVP2 :ref:`pvp2`
-1 VP3- PVDEC :ref:`pvdec`
-4 all PEEPHOLE :ref:`peephole`
-5 all PFIFO :ref:`nv50-pfifo`
-6 all BAR :ref:`nv50-host-mem`
-7 VP1 PME :ref:`pme`
-7 NVAF- PVCOMP :ref:`pvcomp`
-8 VP1-VP2 PMPEG :ref:`pmpeg`
-8 VP3- PPPP :ref:`pppp`
-9 VP2 PBSP :ref:`pbsp`
-9 VP3- PVLD :ref:`pvld`
-0xa VP2 PCRYPT2 :ref:`pcrypt2`
-0xa VP3 PCRYPT3 :ref:`pcrypt3`
-0xb NV84- PCOUNTER :ref:`pcounter`
-0xc NV84- PFIFO_BG :ref:`handles background semaphore acquire polling <nv50-pfifo-bg>`
-0xd NVA3- PCOPY :ref:`pcopy`
-0xe NVA3- PDAEMON :ref:`pdaemon`
-==== ========== =============== ============
+.. enum:: nv50-vm-engine
+
+ .. value:: 0x0 PGRAPH
+ :ref: nv50-vm-engine-pgraph
+
+ .. value:: 0x1 PVP1 VP1
+ :ref: pvp1
+
+ .. value:: 0x1 PVP2 VP2
+ :ref: pvp2
+
+ .. value:: 0x1 PVDEC VP3,VP4
+ :ref: pvdec
+
+ .. value:: 0x4 PEEPHOLE
+ :ref: nv50-vm-engine-peephole
+
+ .. value:: 0x5 PFIFO
+ :ref: nv50-vm-engine-pfifo
+
+ .. value:: 0x6 BAR
+ :ref: nv50-vm-engine-bar
+
+ .. value:: 0x7 PME VP1
+ :ref: pme
+
+ .. value:: 0x7 PVCOMP NVAF:
+ :ref: pvcomp
+
+ .. value:: 0x8 PMPEG VP1,VP2
+ :ref: pmpeg
+
+ .. value:: 0x8 PPPP VP3,VP4
+ :ref: pppp
+
+ .. value:: 0x9 PBSP VP2
+ :ref: pbsp
+
+ .. value:: 0x9 PVLD VP3,VP4
+ :ref: pvld
+
+ .. value:: 0xa PCRYPT2 VP2
+ :ref: pcrypt2
+
+ .. value:: 0xa PCRYPT3 VP3
+ :ref: pcrypt3
+
+ .. value:: 0xb PCOUNTER NV84:
+ :ref: pcounter
+
+ .. value:: 0xc PFIFO_BG NV84:
+ :ref: nv50-vm-engine-pfifo-bg
+
+ Handles background semaphore acquire polling.
+
+ .. value:: 0xd PCOPY NVA3:
+ :ref: pcopy
+
+ .. value:: 0xe PDAEMON NVA3:
+ :ref: pdaemon
Client+engine combination doesn't, however, fully identify the source of the
access - to disambiguate that, DMA slot ids are used. The set of DMA slot
View
10 hwdocs/pcounter/index.rst
@@ -4,7 +4,9 @@ Performance counters
Contents:
.. toctree::
- intro
- nv10
- nv40
- nvc0
+ :titlesonly:
+
+ intro
+ nv10
+ nv40
+ nvc0
View
1 hwdocs/pm/clock.rst
@@ -15,6 +15,7 @@ the card type.
Contents:
.. toctree::
+ :titlesonly:
nv01-clock
nv40-clock
View
1 hwdocs/pm/index.rst
@@ -4,6 +4,7 @@ Power, thermal, and clock management
Contents:
.. toctree::
+ :titlesonly:
clock
pdaemon/index
View
1 hwdocs/pm/pdaemon/index.rst
@@ -7,6 +7,7 @@ PDAEMON: card management microprocesor
Contents:
.. toctree::
+ :titlesonly:
falcon
io
View
13 hwdocs/vdec/index.rst
@@ -4,10 +4,11 @@ Video decoding, encoding, and processing
Contents:
.. toctree::
+ :titlesonly:
- vpe/index
- vuc/index
- vp2/index
- vp3/index
- pvcomp
- pvenc
+ vpe/index
+ vuc/index
+ vp2/index
+ vp3/index
+ pvcomp
+ pvenc
View
15 hwdocs/vdec/vp2/index.rst
@@ -5,14 +5,15 @@ VP2 video decoding
Contents:
.. toctree::
+ :titlesonly:
- xtensa
- pvp2
- pbsp
- vld
- mbring
- macro
- pcrypt2
+ xtensa
+ pvp2
+ pbsp
+ vld
+ mbring
+ macro
+ pcrypt2
Introduction
View
11 hwdocs/vdec/vp3/index.rst
@@ -5,12 +5,13 @@ VP3/VP4/VP5 video decoding
Contents:
.. toctree::
+ :titlesonly:
- pvld
- pvdec
- pppp
- pcrypt3
- mbring
+ pvld
+ pvdec
+ pppp
+ pcrypt3
+ mbring
Introduction
View
9 hwdocs/vdec/vpe/index.rst
@@ -5,11 +5,12 @@ VPE video decoding and encoding
Contents:
.. toctree::
+ :titlesonly:
- pvpe
- pmpeg
- pme
- pvp1
+ pvpe
+ pmpeg
+ pme
+ pvp1
Introduction
View
13 hwdocs/vdec/vuc/index.rst
@@ -8,10 +8,11 @@ VP2/VP3 vµc processor
Contents:
.. toctree::
+ :titlesonly:
- intro
- isa
- mvsurf
- vreg
- vpring
- perf
+ intro
+ isa
+ mvsurf
+ vreg
+ vpring
+ perf

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