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  • 3 commits
  • 4 files changed
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  • 1 contributor
Showing with 216 additions and 19 deletions.
  1. +19 −0 rnn/demmt.c
  2. +4 −0 rnn/demmt.h
  3. +191 −17 rnn/demmt_objects.c
  4. +2 −2 rnn/demmt_pushbuf.c
View
19 rnn/demmt.c
@@ -53,6 +53,11 @@ static int print_gpu_addresses = 0;
struct rnndomain *domain;
struct rnndb *rnndb;
+static struct rnndb *rnndb_nv50_texture;
+struct rnndeccontext *nv50_texture_ctx;
+struct rnndomain *tsc_domain;
+struct rnndomain *tic_domain;
+
int chipset;
int ib_supported;
int guess_invalid_pushbuf = 1;
@@ -1230,6 +1235,20 @@ int main(int argc, char *argv[])
rnn_prepdb(rnndb);
domain = rnn_finddomain(rnndb, "NV01_SUBCHAN");
+ rnndb_nv50_texture = rnn_newdb();
+ rnn_parsefile(rnndb_nv50_texture, "graph/nv50_texture.xml");
+ rnn_prepdb(rnndb_nv50_texture);
+
+ nv50_texture_ctx = rnndec_newcontext(rnndb_nv50_texture);
+ nv50_texture_ctx->colors = colors;
+
+ struct rnnvalue *v = NULL;
+ struct rnnenum *chs = rnn_findenum(rnndb, "chipset");
+ FINDARRAY(chs->vals, v, v->value == chipset);
+ rnndec_varadd(nv50_texture_ctx, "chipset", v ? v->name : "NV01");
+ tic_domain = rnn_finddomain(rnndb_nv50_texture, "TIC");
+ tsc_domain = rnn_finddomain(rnndb_nv50_texture, "TSC");
+
if (filename)
{
close(0);
View
4 rnn/demmt.h
@@ -50,6 +50,10 @@ extern struct buffer *gpu_only_buffers_list;
extern struct rnndomain *domain;
extern struct rnndb *rnndb;
+extern struct rnndeccontext *nv50_texture_ctx;
+extern struct rnndomain *tsc_domain;
+extern struct rnndomain *tic_domain;
+
extern int chipset;
extern int ib_supported;
extern int guess_invalid_pushbuf;
View
208 rnn/demmt_objects.c
@@ -24,6 +24,7 @@
#include "demmt.h"
#include "dis.h"
+#include "rnndec.h"
#include <stdlib.h>
static struct buffer *find_buffer_by_gpu_address(uint64_t addr)
@@ -64,7 +65,7 @@ static struct
int data_offset;
} nv50_2d = { 0, 0, NULL, 0, 0 };
-static void decode_nv50_2d(int mthd, uint32_t data)
+static void decode_nv50_2d(struct pushbuf_decode_state *pstate, int mthd, uint32_t data)
{
if (mthd == 0x0220) // DST_ADDRESS_HIGH
{
@@ -103,14 +104,50 @@ static void decode_nv50_2d(int mthd, uint32_t data)
}
}
+static void decode_tsc(uint32_t tsc, int idx, uint32_t *data)
+{
+ struct rnndecaddrinfo *ai = rnndec_decodeaddr(nv50_texture_ctx, tsc_domain, idx * 4, 1);
+
+ char *dec_addr = ai->name;
+ char *dec_val = rnndec_decodeval(nv50_texture_ctx, ai->typeinfo, data[idx], ai->width);
+
+ fprintf(stdout, "TSC[%d]: 0x%08x %s = %s\n", tsc, data[idx], dec_addr, dec_val);
+
+ free(ai);
+ free(dec_val);
+ free(dec_addr);
+}
+
+static void decode_tic(uint32_t tic, int idx, uint32_t *data)
+{
+ struct rnndecaddrinfo *ai = rnndec_decodeaddr(nv50_texture_ctx, tic_domain, idx * 4, 1);
+
+ char *dec_addr = ai->name;
+ char *dec_val = rnndec_decodeval(nv50_texture_ctx, ai->typeinfo, data[idx], ai->width);
+
+ fprintf(stdout, "TIC[%d]: 0x%08x %s = %s\n", tic, data[idx], dec_addr, dec_val);
+
+ free(ai);
+ free(dec_val);
+ free(dec_addr);
+}
+
static struct
{
uint64_t vp_address;
struct buffer *vp_buffer;
+
uint64_t fp_address;
struct buffer *fp_buffer;
+
uint64_t gp_address;
struct buffer *gp_buffer;
+
+ uint64_t tsc_address;
+ struct buffer *tsc_buffer;
+
+ uint64_t tic_address;
+ struct buffer *tic_buffer;
} nv50_3d = { 0, NULL, 0, NULL, 0, NULL };
static const struct disisa *isa_nv50 = NULL;
@@ -161,7 +198,7 @@ static void nv50_3d_disassemble(struct buffer *buf, const char *mode, uint32_t s
}
}
-static void decode_nv50_3d(int mthd, uint32_t data)
+static void decode_nv50_3d(struct pushbuf_decode_state *pstate, int mthd, uint32_t data)
{
if (mthd == 0x0f7c) // VP_ADDRESS_HIGH
nv50_3d.vp_address = ((uint64_t)data) << 32;
@@ -193,27 +230,83 @@ static void decode_nv50_3d(int mthd, uint32_t data)
nv50_3d_disassemble(nv50_3d.fp_buffer, "fp", data);
else if (mthd == 0x1410) // GP_START_ID
nv50_3d_disassemble(nv50_3d.gp_buffer, "gp", data);
+ else if (mthd == 0x155c) // TSC_ADDRESS_HIGH
+ nv50_3d.tsc_address = ((uint64_t)data) << 32;
+ else if (mthd == 0x1560) // TSC_ADDRESS_LOW
+ {
+ nv50_3d.tsc_address |= data;
+ nv50_3d.tsc_buffer = find_buffer_by_gpu_address(nv50_3d.tsc_address);
+ mmt_debug("tsc address: 0x%08lx, buffer found: %d\n", nv50_3d.tsc_address, nv50_3d.tsc_buffer ? 1 : 0);
+ }
+ else if (mthd == 0x1574) // TIC_ADDRESS_HIGH
+ nv50_3d.tic_address = ((uint64_t)data) << 32;
+ else if (mthd == 0x1578) // TIC_ADDRESS_LOW
+ {
+ nv50_3d.tic_address |= data;
+ nv50_3d.tic_buffer = find_buffer_by_gpu_address(nv50_3d.tic_address);
+ mmt_debug("tic address: 0x%08lx, buffer found: %d\n", nv50_3d.tic_address, nv50_3d.tic_buffer ? 1 : 0);
+ }
+ else if (mthd >= 0x1444 && mthd < 0x1448 + 0x8 * 3)
+ {
+ int i;
+ for (i = 0; i < 3; ++i)
+ {
+ if (nv50_3d.tsc_buffer && mthd == 0x1444 + i * 0x8) // BIND_TSC[i]
+ {
+ int j, tsc = (data >> 12) & 0xff;
+ mmt_debug("bind tsc[%d]: 0x%08x\n", i, tsc);
+ uint32_t *tsc_data = (uint32_t *)&nv50_3d.tsc_buffer->data[8 * tsc];
+
+ for (j = 0; j < 8; ++j)
+ decode_tsc(tsc, j, tsc_data);
+
+ break;
+ }
+ if (nv50_3d.tic_buffer && mthd == 0x1448 + i * 0x8) // BIND_TIC[i]
+ {
+ int j, tic = (data >> 9) & 0x1ffff;
+ mmt_debug("bind tic[%d]: 0x%08x\n", i, tic);
+ uint32_t *tic_data = (uint32_t *)&nv50_3d.tic_buffer->data[8 * tic];
+
+ for (j = 0; j < 8; ++j)
+ decode_tic(tic, j, tic_data);
+
+ break;
+ }
+ }
+ }
}
static const struct disisa *isa_nvc0 = NULL;
+static const struct disisa *isa_macro = NULL;
static struct
{
uint64_t code_address;
struct buffer *code_buffer;
-} nvc0_nvc1_3d = { 0, NULL };
-static void decode_nvc0_nvc1_3d(int mthd, uint32_t data)
+ struct buffer *macro_buffer;
+ int last_macro_code_pos;
+ int cur_macro_code_pos;
+
+ uint64_t tsc_address;
+ struct buffer *tsc_buffer;
+
+ uint64_t tic_address;
+ struct buffer *tic_buffer;
+} nvc0_3d = { 0, NULL };
+
+static void decode_nvc0_3d(struct pushbuf_decode_state *pstate, int mthd, uint32_t data)
{
if (mthd == 0x1608) // CODE_ADDRESS_HIGH
- nvc0_nvc1_3d.code_address = ((uint64_t)data) << 32;
+ nvc0_3d.code_address = ((uint64_t)data) << 32;
else if (mthd == 0x160c) // CODE_ADDRESS_LOW
{
- nvc0_nvc1_3d.code_address |= data;
- nvc0_nvc1_3d.code_buffer = find_buffer_by_gpu_address(nvc0_nvc1_3d.code_address);
- mmt_debug("code address: 0x%08lx, buffer found: %d\n", nvc0_nvc1_3d.code_address, nvc0_nvc1_3d.code_buffer ? 1 : 0);
+ nvc0_3d.code_address |= data;
+ nvc0_3d.code_buffer = find_buffer_by_gpu_address(nvc0_3d.code_address);
+ mmt_debug("code address: 0x%08lx, buffer found: %d\n", nvc0_3d.code_address, nvc0_3d.code_buffer ? 1 : 0);
}
- else if (nvc0_nvc1_3d.code_buffer && mthd >= 0x2000 && mthd < 0x2000 + 0x40 * 6 && (mthd & 0x4) == 4) // SP
+ else if (nvc0_3d.code_buffer && mthd >= 0x2000 && mthd < 0x2000 + 0x40 * 6 && (mthd & 0x4) == 4) // SP
{
int i;
for (i = 0; i < 6; ++i)
@@ -221,21 +314,21 @@ static void decode_nvc0_nvc1_3d(int mthd, uint32_t data)
{
mmt_debug("start id[%d]: 0x%08x\n", i, data);
struct region *reg;
- for (reg = nvc0_nvc1_3d.code_buffer->written_regions; reg != NULL; reg = reg->next)
+ for (reg = nvc0_3d.code_buffer->written_regions; reg != NULL; reg = reg->next)
{
if (reg->start == data)
{
uint32_t x;
fprintf(stdout, "HEADER:\n");
for (x = reg->start; x < reg->start + 20 * 4; x += 4)
- fprintf(stdout, "0x%08x\n", *(uint32_t *)(nvc0_nvc1_3d.code_buffer->data + x));
+ fprintf(stdout, "0x%08x\n", *(uint32_t *)(nvc0_3d.code_buffer->data + x));
fprintf(stdout, "CODE:\n");
if (MMT_DEBUG)
{
uint32_t x;
for (x = reg->start + 20 * 4; x < reg->end; x += 4)
- mmt_debug("0x%08x ", *(uint32_t *)(nvc0_nvc1_3d.code_buffer->data + x));
+ mmt_debug("0x%08x ", *(uint32_t *)(nvc0_3d.code_buffer->data + x));
mmt_debug("%s\n", "");
}
@@ -243,7 +336,7 @@ static void decode_nvc0_nvc1_3d(int mthd, uint32_t data)
isa_nvc0 = ed_getisa("nvc0");
struct varinfo *var = varinfo_new(isa_nvc0->vardata);
- envydis(isa_nvc0, stdout, nvc0_nvc1_3d.code_buffer->data + reg->start + 20 * 4, 0,
+ envydis(isa_nvc0, stdout, nvc0_3d.code_buffer->data + reg->start + 20 * 4, 0,
reg->end - reg->start - 20 * 4, var, 0, NULL, 0, colors);
varinfo_del(var);
break;
@@ -252,6 +345,86 @@ static void decode_nvc0_nvc1_3d(int mthd, uint32_t data)
break;
}
}
+ else if (mthd == 0x0114) // GRAPH.MACRO_CODE_POS
+ {
+ struct buffer *buf = nvc0_3d.macro_buffer;
+ if (buf == NULL)
+ {
+ nvc0_3d.macro_buffer = buf = calloc(1, sizeof(struct buffer));
+ buf->id = -1;
+ buf->length = 0x2000;
+ buf->data = calloc(buf->length, 1);
+ }
+ nvc0_3d.last_macro_code_pos = data * 4;
+ nvc0_3d.cur_macro_code_pos = data * 4;
+ }
+ else if (mthd == 0x0118) // GRAPH.MACRO_CODE_DATA
+ {
+ struct buffer *buf = nvc0_3d.macro_buffer;
+ if (nvc0_3d.cur_macro_code_pos >= buf->length)
+ mmt_log("not enough space for more macro code, truncating%s\n", "");
+ else
+ {
+ buffer_register_write(buf, nvc0_3d.cur_macro_code_pos, 4, &data);
+ nvc0_3d.cur_macro_code_pos += 4;
+ if (pstate->size == 0)
+ {
+ if (!isa_macro)
+ isa_macro = ed_getisa("macro");
+ struct varinfo *var = varinfo_new(isa_macro->vardata);
+
+ envydis(isa_macro, stdout, buf->data + nvc0_3d.last_macro_code_pos, 0,
+ (nvc0_3d.cur_macro_code_pos - nvc0_3d.last_macro_code_pos) / 4,
+ var, 0, NULL, 0, colors);
+ varinfo_del(var);
+ }
+ }
+ }
+ else if (mthd == 0x155c) // TSC_ADDRESS_HIGH
+ nvc0_3d.tsc_address = ((uint64_t)data) << 32;
+ else if (mthd == 0x1560) // TSC_ADDRESS_LOW
+ {
+ nvc0_3d.tsc_address |= data;
+ nvc0_3d.tsc_buffer = find_buffer_by_gpu_address(nvc0_3d.tsc_address);
+ mmt_debug("tsc address: 0x%08lx, buffer found: %d\n", nvc0_3d.tsc_address, nvc0_3d.tsc_buffer ? 1 : 0);
+ }
+ else if (mthd == 0x1574) // TIC_ADDRESS_HIGH
+ nvc0_3d.tic_address = ((uint64_t)data) << 32;
+ else if (mthd == 0x1578) // TIC_ADDRESS_LOW
+ {
+ nvc0_3d.tic_address |= data;
+ nvc0_3d.tic_buffer = find_buffer_by_gpu_address(nvc0_3d.tic_address);
+ mmt_debug("tic address: 0x%08lx, buffer found: %d\n", nvc0_3d.tic_address, nvc0_3d.tic_buffer ? 1 : 0);
+ }
+ else if (mthd >= 0x2400 && mthd < 0x2404 + 0x20 * 5)
+ {
+ int i;
+ for (i = 0; i < 5; ++i)
+ {
+ if (nvc0_3d.tsc_buffer && mthd == 0x2400 + i * 0x20) // BIND_TSC[i]
+ {
+ int j, tsc = (data >> 12) & 0xfff;
+ mmt_debug("bind tsc[%d]: 0x%08x\n", i, tsc);
+ uint32_t *tsc_data = (uint32_t *)&nvc0_3d.tsc_buffer->data[32 * tsc];
+
+ for (j = 0; j < 8; ++j)
+ decode_tsc(tsc, j, tsc_data);
+
+ break;
+ }
+ if (nvc0_3d.tic_buffer && mthd == 0x2404 + i * 0x20) // BIND_TIC[i]
+ {
+ int j, tic = (data >> 9) & 0x1ffff;
+ mmt_debug("bind tic[%d]: 0x%08x\n", i, tic);
+ uint32_t *tic_data = (uint32_t *)&nvc0_3d.tic_buffer->data[32 * tic];
+
+ for (j = 0; j < 8; ++j)
+ decode_tic(tic, j, tic_data);
+
+ break;
+ }
+ }
+ }
}
static struct
@@ -261,7 +434,7 @@ static struct
int data_offset;
} nvc0_m2mf = { 0, NULL, 0 };
-static void decode_nvc0_m2mf(int mthd, uint32_t data)
+static void decode_nvc0_m2mf(struct pushbuf_decode_state *pstate, int mthd, uint32_t data)
{
if (mthd == 0x0238) // OFFSET_OUT_HIGH
{
@@ -299,7 +472,7 @@ static void decode_nvc0_m2mf(int mthd, uint32_t data)
static const struct gpu_object
{
uint32_t class_;
- void (*fun)(int, uint32_t);
+ void (*fun)(struct pushbuf_decode_state *, int, uint32_t);
}
objs[] =
{
@@ -310,8 +483,9 @@ objs[] =
{ 0x8597, decode_nv50_3d },
{ 0x8697, decode_nv50_3d },
{ 0x9039, decode_nvc0_m2mf },
- { 0x9097, decode_nvc0_nvc1_3d },
- { 0x9197, decode_nvc0_nvc1_3d },
+ { 0x9097, decode_nvc0_3d },
+ { 0x9197, decode_nvc0_3d },
+ { 0x9297, decode_nvc0_3d },
{ 0, NULL}
};
View
4 rnn/demmt_pushbuf.c
@@ -44,7 +44,7 @@ struct obj
uint32_t class;
char *name;
struct rnndeccontext *ctx;
- void (*decoder)(int, uint32_t);
+ void (*decoder)(struct pushbuf_decode_state *, int, uint32_t);
};
static struct obj *subchans[8] = { NULL };
@@ -412,7 +412,7 @@ static uint64_t pushbuf_print(struct pushbuf_decode_state *pstate, struct buffer
{
struct obj *obj = subchans[pstate->subchan];
if (obj && obj->decoder)
- obj->decoder(mthd, cmd);
+ obj->decoder(pstate, mthd, cmd);
}
cur += 4;

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