From ef3d2008fc87811e971c36e24bff9382d8126ef4 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 7 Sep 2022 11:39:59 +0800 Subject: [PATCH 01/12] esp_adc: remove blank file `adc_lock.c` and `adc_lock.h` are removed. Content in these two files are moved to `adc_share_hw_ctrl.c` and `adc_share_hw_ctrl.h`, in commit 4f80c0f2. `adc_lock.c` and `adc_lock.h` are left due to auto-solving conflicts. This commit removes these two blank files. --- components/esp_adc/adc_lock.c | 0 components/esp_adc/include/esp_private/adc_lock.h | 0 2 files changed, 0 insertions(+), 0 deletions(-) delete mode 100644 components/esp_adc/adc_lock.c delete mode 100644 components/esp_adc/include/esp_private/adc_lock.h diff --git a/components/esp_adc/adc_lock.c b/components/esp_adc/adc_lock.c deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/components/esp_adc/include/esp_private/adc_lock.h b/components/esp_adc/include/esp_private/adc_lock.h deleted file mode 100644 index e69de29bb2d..00000000000 From d0591f5aa90daa4bdbbd9c363b302e8f3e99e208 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 7 Sep 2022 15:01:41 +0800 Subject: [PATCH 02/12] efuse: remove PVT_LOW field on esp32c2 PVT_LOW doesn't exist on ESP32C2 --- components/efuse/esp32c2/esp_efuse_table.c | 11 +---------- components/efuse/esp32c2/esp_efuse_table.csv | 1 - components/efuse/esp32c2/include/esp_efuse_table.h | 3 +-- 3 files changed, 2 insertions(+), 13 deletions(-) diff --git a/components/efuse/esp32c2/esp_efuse_table.c b/components/efuse/esp32c2/esp_efuse_table.c index 695b5898013..8d67539c883 100644 --- a/components/efuse/esp32c2/esp_efuse_table.c +++ b/components/efuse/esp32c2/esp_efuse_table.c @@ -9,7 +9,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table 5bc3d3149d5d4c75461337fa415d6533 +// md5_digest_table ce4e849361b72f5095735d37756740aa // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -176,10 +176,6 @@ static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = { {EFUSE_BLK2, 60, 2}, // BLK_VERSION_MAJOR, }; -static const esp_efuse_desc_t PVT_LOW[] = { - {EFUSE_BLK2, 91, 5}, // EFUSE_PVT_LOW, -}; - static const esp_efuse_desc_t KEY0[] = { {EFUSE_BLK3, 0, 256}, // [256bit FE key] or [128bit FE key and 128key SB key] or [user data], }; @@ -444,11 +440,6 @@ const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[] = { NULL }; -const esp_efuse_desc_t* ESP_EFUSE_PVT_LOW[] = { - &PVT_LOW[0], // EFUSE_PVT_LOW - NULL -}; - const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = { &KEY0[0], // [256bit FE key] or [128bit FE key and 128key SB key] or [user data] NULL diff --git a/components/efuse/esp32c2/esp_efuse_table.csv b/components/efuse/esp32c2/esp_efuse_table.csv index fc3826c9038..9db3f20b015 100644 --- a/components/efuse/esp32c2/esp_efuse_table.csv +++ b/components/efuse/esp32c2/esp_efuse_table.csv @@ -71,7 +71,6 @@ BLK_VERSION_MAJOR, EFUSE_BLK2, 60, 2, BLK_VERSION_MAJOR # EFUSE_RD_BLK2_DATA2_REG - PVT_LOW, EFUSE_BLK2, 91, 5, EFUSE_PVT_LOW ################ diff --git a/components/efuse/esp32c2/include/esp_efuse_table.h b/components/efuse/esp32c2/include/esp_efuse_table.h index 9d348f19713..30afde76325 100644 --- a/components/efuse/esp32c2/include/esp_efuse_table.h +++ b/components/efuse/esp32c2/include/esp_efuse_table.h @@ -10,7 +10,7 @@ extern "C" { #include "esp_efuse.h" -// md5_digest_table 5bc3d3149d5d4c75461337fa415d6533 +// md5_digest_table ce4e849361b72f5095735d37756740aa // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[]; extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[]; extern const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[]; -extern const esp_efuse_desc_t* ESP_EFUSE_PVT_LOW[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_256BIT[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_128BIT[]; From e736abdc0335281202455cccd53bb5a91a550572 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 7 Sep 2022 15:04:07 +0800 Subject: [PATCH 03/12] efuse: added adc calibration efuse fields on esp32c2 --- components/efuse/esp32c2/esp_efuse_table.c | 47 ++++++++++++++++++- components/efuse/esp32c2/esp_efuse_table.csv | 5 ++ .../efuse/esp32c2/include/esp_efuse_table.h | 7 ++- 3 files changed, 57 insertions(+), 2 deletions(-) diff --git a/components/efuse/esp32c2/esp_efuse_table.c b/components/efuse/esp32c2/esp_efuse_table.c index 8d67539c883..c1d712e1483 100644 --- a/components/efuse/esp32c2/esp_efuse_table.c +++ b/components/efuse/esp32c2/esp_efuse_table.c @@ -9,7 +9,7 @@ #include #include "esp_efuse_table.h" -// md5_digest_table ce4e849361b72f5095735d37756740aa +// md5_digest_table ceedae45d1a885ced865a05eeca7d7ee // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -196,6 +196,26 @@ static const esp_efuse_desc_t OCODE[] = { {EFUSE_BLK2, 62, 7}, // OCode, }; +static const esp_efuse_desc_t TEMP_CALIB[] = { + {EFUSE_BLK2, 69, 9}, // Temperature calibration data, +}; + +static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0[] = { + {EFUSE_BLK2, 78, 8}, // ADC1 init code at atten0, +}; + +static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN3[] = { + {EFUSE_BLK2, 86, 5}, // ADC1 init code at atten3, +}; + +static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN0[] = { + {EFUSE_BLK2, 91, 8}, // ADC1 calibration voltage at atten0, +}; + +static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN3[] = { + {EFUSE_BLK2, 99, 6}, // ADC1 calibration voltage at atten3, +}; + static const esp_efuse_desc_t DIG_DBIAS_HVT[] = { {EFUSE_BLK2, 105, 5}, // BLOCK2 digital dbias when hvt, }; @@ -465,6 +485,31 @@ const esp_efuse_desc_t* ESP_EFUSE_OCODE[] = { NULL }; +const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[] = { + &TEMP_CALIB[0], // Temperature calibration data + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[] = { + &ADC1_INIT_CODE_ATTEN0[0], // ADC1 init code at atten0 + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[] = { + &ADC1_INIT_CODE_ATTEN3[0], // ADC1 init code at atten3 + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[] = { + &ADC1_CAL_VOL_ATTEN0[0], // ADC1 calibration voltage at atten0 + NULL +}; + +const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[] = { + &ADC1_CAL_VOL_ATTEN3[0], // ADC1 calibration voltage at atten3 + NULL +}; + const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[] = { &DIG_DBIAS_HVT[0], // BLOCK2 digital dbias when hvt NULL diff --git a/components/efuse/esp32c2/esp_efuse_table.csv b/components/efuse/esp32c2/esp_efuse_table.csv index 9db3f20b015..ee34254c171 100644 --- a/components/efuse/esp32c2/esp_efuse_table.csv +++ b/components/efuse/esp32c2/esp_efuse_table.csv @@ -82,6 +82,11 @@ KEY0.SB_128BIT, EFUSE_BLK3, 128, 128, [128bit SB # AUTO CONFIG DIG&RTC DBIAS# ################ OCODE, EFUSE_BLK2, 62, 7, OCode +TEMP_CALIB, EFUSE_BLK2, 69, 9, Temperature calibration data +ADC1_INIT_CODE_ATTEN0, EFUSE_BLK2, 78, 8, ADC1 init code at atten0 +ADC1_INIT_CODE_ATTEN3, EFUSE_BLK2, 86, 5, ADC1 init code at atten3 +ADC1_CAL_VOL_ATTEN0, EFUSE_BLK2, 91, 8, ADC1 calibration voltage at atten0 +ADC1_CAL_VOL_ATTEN3, EFUSE_BLK2, 99, 6, ADC1 calibration voltage at atten3 DIG_DBIAS_HVT, EFUSE_BLK2, 105, 5, BLOCK2 digital dbias when hvt DIG_LDO_SLP_DBIAS2, EFUSE_BLK2, 110, 7, BLOCK2 DIG_LDO_DBG0_DBIAS2 DIG_LDO_SLP_DBIAS26, EFUSE_BLK2, 117, 8, BLOCK2 DIG_LDO_DBG0_DBIAS26 diff --git a/components/efuse/esp32c2/include/esp_efuse_table.h b/components/efuse/esp32c2/include/esp_efuse_table.h index 30afde76325..23f580c7d4a 100644 --- a/components/efuse/esp32c2/include/esp_efuse_table.h +++ b/components/efuse/esp32c2/include/esp_efuse_table.h @@ -10,7 +10,7 @@ extern "C" { #include "esp_efuse.h" -// md5_digest_table ce4e849361b72f5095735d37756740aa +// md5_digest_table ceedae45d1a885ced865a05eeca7d7ee // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY. // If you want to change some fields, you need to change esp_efuse_table.csv file // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file. @@ -61,6 +61,11 @@ extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_256BIT[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_FE_128BIT[]; extern const esp_efuse_desc_t* ESP_EFUSE_KEY0_SB_128BIT[]; extern const esp_efuse_desc_t* ESP_EFUSE_OCODE[]; +extern const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[]; +extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[]; +extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[]; +extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[]; +extern const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIG_LDO_SLP_DBIAS2[]; extern const esp_efuse_desc_t* ESP_EFUSE_DIG_LDO_SLP_DBIAS26[]; From ccfbba59940a93a4b419b32fc56be0de1fa44d0e Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:10:46 +0800 Subject: [PATCH 04/12] esp_adc: support adc calibration on esp32c2 --- .../efuse/esp32c2/esp_efuse_rtc_calib.c | 94 ++++++++++++- .../esp32c2/include/esp_efuse_rtc_calib.h | 34 +++++ .../esp_adc/esp32c2/adc_cali_line_fitting.c | 133 ++++++++++++++++++ .../esp32c2/include/adc_cali_schemes.h | 2 +- components/hal/adc_hal_common.c | 6 +- components/hal/esp32c2/include/hal/adc_ll.h | 57 +++----- .../esp32c2/include/soc/Kconfig.soc_caps.in | 4 + components/soc/esp32c2/include/soc/soc_caps.h | 3 + 8 files changed, 288 insertions(+), 45 deletions(-) create mode 100644 components/esp_adc/esp32c2/adc_cali_line_fitting.c diff --git a/components/efuse/esp32c2/esp_efuse_rtc_calib.c b/components/efuse/esp32c2/esp_efuse_rtc_calib.c index 0c5c9756194..79c3409ddfc 100644 --- a/components/efuse/esp32c2/esp_efuse_rtc_calib.c +++ b/components/efuse/esp32c2/esp_efuse_rtc_calib.c @@ -5,14 +5,102 @@ */ #include +#include "esp_log.h" #include "esp_efuse.h" #include "esp_efuse_table.h" +#include "esp_efuse_rtc_calib.h" +#include "hal/adc_types.h" int esp_efuse_rtc_calib_get_ver(void) { - uint32_t result = 0; - esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MINOR, &result, ESP_EFUSE_BLK_VERSION_MINOR[0]->bit_count); // IDF-5366 - return result; + uint32_t blk_ver_major = 0; + esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MAJOR, &blk_ver_major, ESP_EFUSE_BLK_VERSION_MAJOR[0]->bit_count); // IDF-5366 + + uint32_t cali_version = (blk_ver_major == 0) ? ESP_EFUSE_ADC_CALIB_VER : 0; + if (!cali_version) { + ESP_LOGW("eFuse", "calibration efuse version does not match, set default version to 0"); + } + + return cali_version; +} + +uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten) +{ + assert(version == ESP_EFUSE_ADC_CALIB_VER); + assert(atten <= ADC_ATTEN_DB_11); + (void) adc_unit; + + if (atten == ADC_ATTEN_DB_2_5 || atten == ADC_ATTEN_DB_6) { + /** + * - ESP32C2 only supports HW calibration on ADC_ATTEN_DB_0 and ADC_ATTEN_DB_11 + * - For other attenuation, we just return default value, which is 0. + */ + return 0; + } + + int32_t adc_icode_diff_atten0 = 0; + int32_t adc_icode_diff_atten3 = 0; + int efuse_icode_bits = 0; + + efuse_icode_bits = esp_efuse_get_field_size(ESP_EFUSE_ADC1_INIT_CODE_ATTEN0); + ESP_ERROR_CHECK(esp_efuse_read_field_blob(ESP_EFUSE_ADC1_INIT_CODE_ATTEN0, &adc_icode_diff_atten0, efuse_icode_bits)); + adc_icode_diff_atten0 = ((adc_icode_diff_atten0 & BIT(7)) != 0) ? -(adc_icode_diff_atten0 & 0x7f): adc_icode_diff_atten0; + + efuse_icode_bits = esp_efuse_get_field_size(ESP_EFUSE_ADC1_INIT_CODE_ATTEN3); + ESP_ERROR_CHECK(esp_efuse_read_field_blob(ESP_EFUSE_ADC1_INIT_CODE_ATTEN3, &adc_icode_diff_atten3, efuse_icode_bits)); + + ESP_EARLY_LOGV("eFuse", "adc_icode_diff_atten0: 0d%"PRId32", adc_icode_diff_atten3: 0d%"PRId32, adc_icode_diff_atten0, adc_icode_diff_atten3); + + uint32_t init_code = 0; + if (atten == ADC_ATTEN_DB_0) { + init_code = adc_icode_diff_atten0 + 2160; + } else { + //ADC_ATTEN_DB_11 + init_code = adc_icode_diff_atten3 + adc_icode_diff_atten0 + 2160; + } + + return init_code; +} + +esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, int atten, uint32_t *out_digi, uint32_t *out_vol_mv) +{ + assert(version == ESP_EFUSE_ADC_CALIB_VER); + assert(atten <= ADC_ATTEN_DB_11); + (void) adc_unit; + + if (atten == ADC_ATTEN_DB_2_5 || atten == ADC_ATTEN_DB_6) { + /** + * - ESP32C2 only supports SW calibration on ADC_ATTEN_DB_0 and ADC_ATTEN_DB_11 + * - For other attenuation, we need to return an error, informing upper layer SW calibration driver + * to deal with the error. + */ + return ESP_ERR_INVALID_ARG; + } + + int32_t adc_vol_diff_atten0 = 0; + int32_t adc_vol_diff_atten3 = 0; + int efuse_vol_bits = 0; + + efuse_vol_bits = esp_efuse_get_field_size(ESP_EFUSE_ADC1_CAL_VOL_ATTEN0); + ESP_ERROR_CHECK(esp_efuse_read_field_blob(ESP_EFUSE_ADC1_CAL_VOL_ATTEN0, &adc_vol_diff_atten0, efuse_vol_bits)); + adc_vol_diff_atten0 = ((adc_vol_diff_atten0 & BIT(7)) != 0) ? -(adc_vol_diff_atten0 & 0x7f): adc_vol_diff_atten0; + + efuse_vol_bits = esp_efuse_get_field_size(ESP_EFUSE_ADC1_CAL_VOL_ATTEN3); + ESP_ERROR_CHECK(esp_efuse_read_field_blob(ESP_EFUSE_ADC1_CAL_VOL_ATTEN3, &adc_vol_diff_atten3, efuse_vol_bits)); + adc_vol_diff_atten3 = ((adc_vol_diff_atten3 & BIT(5)) != 0) ? -(adc_vol_diff_atten3 & 0x1f): adc_vol_diff_atten3; + + ESP_EARLY_LOGV("eFuse", "adc_vol_diff_atten0: 0d%"PRId32", adc_vol_diff_atten3: 0d%"PRId32, adc_vol_diff_atten0, adc_vol_diff_atten3); + + if (atten == ADC_ATTEN_DB_0) { + *out_digi = adc_vol_diff_atten0 + 1540; + *out_vol_mv = 400; + } else { + //ADC_ATTEN_DB_11 + *out_digi = adc_vol_diff_atten0 + 1540 - adc_vol_diff_atten3 - 123; + *out_vol_mv = 1370; + } + + return ESP_OK; } esp_err_t esp_efuse_rtc_calib_get_tsens_val(float* tsens_cal) diff --git a/components/efuse/esp32c2/include/esp_efuse_rtc_calib.h b/components/efuse/esp32c2/include/esp_efuse_rtc_calib.h index d33bc76613f..f4e42f29967 100644 --- a/components/efuse/esp32c2/include/esp_efuse_rtc_calib.h +++ b/components/efuse/esp32c2/include/esp_efuse_rtc_calib.h @@ -11,6 +11,40 @@ extern "C" { #endif +//This is the ADC calibration value version burnt in efuse +#define ESP_EFUSE_ADC_CALIB_VER 1 + +/** + * @brief Get the RTC calibration efuse version + * + * @return Version of the stored efuse + */ +int esp_efuse_rtc_calib_get_ver(void); + +/** + * @brief Get the init code in the efuse, for the corresponding attenuation. + * + * @param version Version of the stored efuse + * @param adc_unit ADC unit + * @param atten Attenuation of the init code + * @return The init code stored in efuse + */ +uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten); + +/** + * @brief Get the calibration digits stored in the efuse, and the corresponding voltage. + * + * @param version Version of the stored efuse + * @param adc_unit ADC unit + * @param atten Attenuation to use + * @param out_digi Output buffer of the digits + * @param out_vol_mv Output of the voltage, in mV + * @return + * - ESP_ERR_INVALID_ARG: If `ADC_ATTEN_DB_2_5` or `ADC_ATTEN_DB_6` is used + * - ESP_OK: if success + */ +esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, int atten, uint32_t *out_digi, uint32_t *out_vol_mv); + /** * @brief Get the temperature sensor calibration number delta_T stored in the efuse. * diff --git a/components/esp_adc/esp32c2/adc_cali_line_fitting.c b/components/esp_adc/esp32c2/adc_cali_line_fitting.c new file mode 100644 index 00000000000..f7f172fe648 --- /dev/null +++ b/components/esp_adc/esp32c2/adc_cali_line_fitting.c @@ -0,0 +1,133 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include "esp_types.h" +#include "esp_err.h" +#include "esp_log.h" +#include "esp_check.h" +#include "esp_heap_caps.h" +#include "esp_efuse_rtc_calib.h" +#include "soc/soc_caps.h" +#include "esp_adc/adc_cali_scheme.h" +#include "adc_cali_interface.h" + + +/** + * This file contains Line Fitting Calibration Scheme for ESP32C2. + * + * If ESP EFuse Line Fitting Calibration Scheme on future chips are similar to the scheme in this file, we can: + * + * 1. Rename this file to `adc_cali_line_fitting_v2.c`, as the Line Fitting Scheme on ESP32 and ESP32S2 are different to this. + * 2. Move this file to common directory + * 3. Still support `ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED` + * 4. Add a new internal maccro `ADC_CALI_SCHEME_LINE_FITTING_V2_SUPPORTED` + * 5. Only build this file, when `ADC_CALI_SCHEME_LINE_FITTING_V2_SUPPORTED == true` + */ + + +// coeff_a is actually a float number +// it is scaled to put them into uint32_t so that the headers do not have to be changed +static const int coeff_a_scaling = 65536; +const static char *TAG = "adc_cali"; + +typedef struct { + adc_unit_t unit_id; + adc_atten_t atten; + uint32_t coeff_a; ///< Gradient of ADC-Voltage characteristics + uint32_t coeff_b; ///< Offset of ADC-Voltage characteristics +} cali_chars_line_fitting_t; + + +/* ------------------------ Interface Functions --------------------------- */ +static esp_err_t cali_raw_to_voltage(void *arg, int raw, int *voltage); +static esp_err_t check_valid(const adc_cali_line_fitting_config_t *config); + +/* ------------------------- Public API ------------------------------------- */ +esp_err_t adc_cali_create_scheme_line_fitting(const adc_cali_line_fitting_config_t *config, adc_cali_handle_t *ret_handle) +{ + esp_err_t ret = ESP_OK; + ESP_RETURN_ON_FALSE(config && ret_handle, ESP_ERR_INVALID_ARG, TAG, "invalid arg: null pointer"); + ret = check_valid(config); + if (ret != ESP_OK) { + return ret; + } + + //current version only accepts encoding version: `ESP_EFUSE_ADC_CALIB_VER`. + uint8_t adc_cali_version = esp_efuse_rtc_calib_get_ver(); + ESP_RETURN_ON_FALSE(adc_cali_version == ESP_EFUSE_ADC_CALIB_VER, ESP_ERR_NOT_SUPPORTED, TAG, "Calibration required eFuse bits not burnt"); + + adc_cali_scheme_t *scheme = (adc_cali_scheme_t *)heap_caps_calloc(1, sizeof(adc_cali_scheme_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); + ESP_RETURN_ON_FALSE(scheme, ESP_ERR_NO_MEM, TAG, "no mem for adc calibration scheme"); + + cali_chars_line_fitting_t *chars = (cali_chars_line_fitting_t *)heap_caps_calloc(1, sizeof(cali_chars_line_fitting_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); + ESP_GOTO_ON_FALSE(chars, ESP_ERR_NO_MEM, err, TAG, "no memory for the calibration characteristics"); + + scheme->raw_to_voltage = cali_raw_to_voltage; + scheme->ctx = chars; + + chars->unit_id = config->unit_id; + chars->atten = config->atten; + + uint32_t voltage_mv = 0; + uint32_t digi_val = 0; + esp_efuse_rtc_calib_get_cal_voltage(adc_cali_version, chars->unit_id, chars->atten, &digi_val, &voltage_mv); + assert(ret == ESP_OK); + chars->coeff_a = coeff_a_scaling * voltage_mv / digi_val; + chars->coeff_b = 0; + ESP_LOGV(TAG, "Calib V1, Cal Voltage = %"PRId32", Digi out = %"PRId32", Coef_a = %"PRId32"\n", voltage_mv, digi_val, chars->coeff_a); + + *ret_handle = scheme; + + return ESP_OK; + +err: + if (scheme) { + free(scheme); + } + return ret; +} + +esp_err_t adc_cali_delete_scheme_line_fitting(adc_cali_handle_t handle) +{ + ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer"); + + free(handle->ctx); + handle->ctx = NULL; + + free(handle); + handle = NULL; + + return ESP_OK; +} + + +/* ------------------------ Interface Functions --------------------------- */ +static esp_err_t cali_raw_to_voltage(void *arg, int raw, int *voltage) +{ + //pointers are checked in the upper layer + + cali_chars_line_fitting_t *ctx = arg; + *voltage = raw * ctx->coeff_a / coeff_a_scaling + ctx->coeff_b; + + return ESP_OK; +} + +static esp_err_t check_valid(const adc_cali_line_fitting_config_t *config) +{ + ESP_RETURN_ON_FALSE(config->unit_id < SOC_ADC_PERIPH_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid ADC unit"); + ESP_RETURN_ON_FALSE((config->atten == ADC_ATTEN_DB_0 || config->atten == ADC_ATTEN_DB_11), ESP_ERR_NOT_SUPPORTED, TAG, "only ADC_ATTEN_DB_0 and ADC_ATTEN_DB_11 are supported"); + + bool available_oneshot_bitwidth = (config->bitwidth >= SOC_ADC_RTC_MIN_BITWIDTH && config->bitwidth <= SOC_ADC_RTC_MAX_BITWIDTH); + bool available_dma_bitwidth = (config->bitwidth >= SOC_ADC_DIGI_MIN_BITWIDTH && config->bitwidth <= SOC_ADC_DIGI_MAX_BITWIDTH); + bool default_bitwidth_mark = (config->bitwidth == ADC_BITWIDTH_DEFAULT); + bool available_bitwidth = (available_oneshot_bitwidth || available_dma_bitwidth || default_bitwidth_mark); + ESP_RETURN_ON_FALSE(available_bitwidth, ESP_ERR_INVALID_ARG, TAG, "invalid bitwidth"); + + return ESP_OK; +} diff --git a/components/esp_adc/esp32c2/include/adc_cali_schemes.h b/components/esp_adc/esp32c2/include/adc_cali_schemes.h index a691b4d4d16..dc6fa544ef5 100644 --- a/components/esp_adc/esp32c2/include/adc_cali_schemes.h +++ b/components/esp_adc/esp32c2/include/adc_cali_schemes.h @@ -12,4 +12,4 @@ * @brief Supported calibration schemes */ -//No scheme supported +#define ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED 1 diff --git a/components/hal/adc_hal_common.c b/components/hal/adc_hal_common.c index e5e0d29acaf..8aeb1e379c5 100644 --- a/components/hal/adc_hal_common.c +++ b/components/hal/adc_hal_common.c @@ -92,7 +92,9 @@ void adc_hal_calibration_init(adc_unit_t adc_n) adc_ll_calibration_init(adc_n); } -static uint32_t s_previous_init_code[SOC_ADC_PERIPH_NUM] = {-1, -1}; +static uint32_t s_previous_init_code[SOC_ADC_PERIPH_NUM] = { + [0 ... (SOC_ADC_PERIPH_NUM - 1)] = -1, +}; void adc_hal_set_calibration_param(adc_unit_t adc_n, uint32_t param) { @@ -145,10 +147,12 @@ static uint32_t read_cal_channel(adc_unit_t adc_n) uint32_t adc_hal_self_calibration(adc_unit_t adc_n, adc_atten_t atten, bool internal_gnd) { +#if SOC_ADC_ARBITER_SUPPORTED if (adc_n == ADC_UNIT_2) { adc_arbiter_t config = ADC_ARBITER_CONFIG_DEFAULT(); adc_hal_arbiter_config(&config); } +#endif // #if SOC_ADC_ARBITER_SUPPORTED cal_setup(adc_n, atten); diff --git a/components/hal/esp32c2/include/hal/adc_ll.h b/components/hal/esp32c2/include/hal/adc_ll.h index 5a18f6ec1e0..e9d51a288e2 100644 --- a/components/hal/esp32c2/include/hal/adc_ll.h +++ b/components/hal/esp32c2/include/hal/adc_ll.h @@ -133,7 +133,6 @@ static inline void adc_ll_digi_output_invert(adc_unit_t adc_n, bool inv_en) */ static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) { - abort(); //TODO IDF-3908 HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_apb_adc_clkm_conf, saradc_reg_clkm_div_num, div_num); APB_SARADC.saradc_apb_adc_clkm_conf.saradc_reg_clkm_div_b = div_b; APB_SARADC.saradc_apb_adc_clkm_conf.saradc_reg_clkm_div_a = div_a; @@ -316,12 +315,8 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c __attribute__((always_inline)) static inline void adc_ll_calibration_init(adc_unit_t adc_n) { - abort(); //TODO IDF-3908 - // if (adc_n == ADC_UNIT_1) { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 1); - // } else { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_DREF_ADDR, 1); - // } + (void)adc_n; + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_DREF_ADDR, 1); } /** @@ -330,27 +325,18 @@ static inline void adc_ll_calibration_init(adc_unit_t adc_n) * @note Different ADC units and different attenuation options use different calibration data (initial data). * * @param adc_n ADC index number. - * @param channel adc channel number. * @param internal_gnd true: Disconnect from the IO port and use the internal GND as the calibration voltage. * false: Use IO external voltage as calibration voltage. */ -static inline void adc_ll_calibration_prepare(adc_unit_t adc_n, adc_channel_t channel, bool internal_gnd) +static inline void adc_ll_calibration_prepare(adc_unit_t adc_n, bool internal_gnd) { - abort(); //TODO IDF-3908 - // /* Enable/disable internal connect GND (for calibration). */ - // if (adc_n == ADC_UNIT_1) { - // if (internal_gnd) { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 1); - // } else { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0); - // } - // } else { - // if (internal_gnd) { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 1); - // } else { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 0); - // } - // } + (void)adc_n; + /* Enable/disable internal connect GND (for calibration). */ + if (internal_gnd) { + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 1); + } else { + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0); + } } /** @@ -360,12 +346,8 @@ static inline void adc_ll_calibration_prepare(adc_unit_t adc_n, adc_channel_t ch */ static inline void adc_ll_calibration_finish(adc_unit_t adc_n) { - abort(); //TODO IDF-3908 - // if (adc_n == ADC_UNIT_1) { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0); - // } else { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_ENCAL_GND_ADDR, 0); - // } + (void)adc_n; + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_ENCAL_GND_ADDR, 0); } /** @@ -378,16 +360,11 @@ static inline void adc_ll_calibration_finish(adc_unit_t adc_n) __attribute__((always_inline)) static inline void adc_ll_set_calibration_param(adc_unit_t adc_n, uint32_t param) { - abort(); //TODO IDF-3908 - // uint8_t msb = param >> 8; - // uint8_t lsb = param & 0xFF; - // if (adc_n == ADC_UNIT_1) { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb); - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb); - // } else { - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, msb); - // REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, lsb); - // } + (void)adc_n; + uint8_t msb = param >> 8; + uint8_t lsb = param & 0xFF; + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb); + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb); } /*--------------------------------------------------------------- diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index 9278e156385..693a9d73051 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -147,6 +147,10 @@ config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 bool default y +config SOC_ADC_CALIBRATION_V1_SUPPORTED + bool + default y + config SOC_BROWNOUT_RESET_SUPPORTED bool default y diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 9d8cf560f03..f89e1c52674 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -73,6 +73,9 @@ #define SOC_ADC_RTC_MAX_BITWIDTH (12) #define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1) +/*!< Calibration */ +#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ + /*-------------------------- BROWNOUT CAPS -----------------------------------*/ #define SOC_BROWNOUT_RESET_SUPPORTED 1 From f29eda26e6ffa93413842271211b6b966ca6dd26 Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:18:33 +0800 Subject: [PATCH 05/12] esp_adc: replace hardcoded calibration version to a macro On esp32c3 and esp32s3, we support calibration version 1. This commit replace it with ESP_EFUSE_ADC_CALIB_VER to avoid hardcode. --- components/efuse/esp32c3/esp_efuse_rtc_calib.c | 17 ++++++++++++----- components/efuse/esp32s3/esp_efuse_rtc_calib.c | 13 +++++++------ components/esp_adc/adc_cali_curve_fitting.c | 6 +++--- 3 files changed, 22 insertions(+), 14 deletions(-) diff --git a/components/efuse/esp32c3/esp_efuse_rtc_calib.c b/components/efuse/esp32c3/esp_efuse_rtc_calib.c index ccf4c7d422f..5977b432912 100644 --- a/components/efuse/esp32c3/esp_efuse_rtc_calib.c +++ b/components/efuse/esp32c3/esp_efuse_rtc_calib.c @@ -7,17 +7,24 @@ #include #include "esp_efuse.h" #include "esp_efuse_table.h" +#include "esp_efuse_rtc_calib.h" int esp_efuse_rtc_calib_get_ver(void) { - uint32_t result = 0; - esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MAJOR, &result, ESP_EFUSE_BLK_VERSION_MAJOR[0]->bit_count); // IDF-5366 - return result; + uint32_t blk_ver_major = 0; + esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MAJOR, &blk_ver_major, ESP_EFUSE_BLK_VERSION_MAJOR[0]->bit_count); // IDF-5366 + + uint32_t cali_version = (blk_ver_major == 1) ? ESP_EFUSE_ADC_CALIB_VER : 0; + if (!cali_version) { + ESP_LOGW("eFuse", "calibration efuse version does not match, set default version to 0"); + } + + return cali_version; } uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten) { - assert(version == 1); + assert(version == ESP_EFUSE_ADC_CALIB_VER); (void) adc_unit; const esp_efuse_desc_t** init_code_efuse; assert(atten < 4); @@ -44,7 +51,7 @@ esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, in (void)adc_unit; //On esp32c3, V1 we don't have calibration data for ADC2, using the efuse data of ADC1 const esp_efuse_desc_t** cal_vol_efuse; uint32_t calib_vol_expected_mv; - if (version != 1) { + if (version != ESP_EFUSE_ADC_CALIB_VER) { return ESP_ERR_INVALID_ARG; } if (atten >= 4) { diff --git a/components/efuse/esp32s3/esp_efuse_rtc_calib.c b/components/efuse/esp32s3/esp_efuse_rtc_calib.c index 25f1d786a6e..800a2abeaf1 100644 --- a/components/efuse/esp32s3/esp_efuse_rtc_calib.c +++ b/components/efuse/esp32s3/esp_efuse_rtc_calib.c @@ -9,6 +9,7 @@ #include "esp_log.h" #include "esp_efuse.h" #include "esp_efuse_table.h" +#include "esp_efuse_rtc_calib.h" #include "hal/adc_types.h" int esp_efuse_rtc_calib_get_ver(void) @@ -16,17 +17,17 @@ int esp_efuse_rtc_calib_get_ver(void) uint32_t blk_ver_major = 0; ESP_ERROR_CHECK(esp_efuse_read_field_blob(ESP_EFUSE_BLK_VERSION_MAJOR, &blk_ver_major, ESP_EFUSE_BLK_VERSION_MAJOR[0]->bit_count)); // IDF-5366 - uint32_t cali_version_v1 = (blk_ver_major == 1) ? 1 : 0; - if (!cali_version_v1) { - ESP_LOGW("eFuse", "calibration efuse version does not match, set default version: %d", 0); + uint32_t cali_version = (blk_ver_major == 1) ? ESP_EFUSE_ADC_CALIB_VER : 0; + if (!cali_version) { + ESP_LOGW("eFuse", "calibration efuse version does not match, set default version to 0"); } - return cali_version_v1; + return cali_version; } uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten) { - assert(version == 1); + assert(version == ESP_EFUSE_ADC_CALIB_VER); assert(atten < 4); assert(adc_unit <= ADC_UNIT_2); @@ -61,7 +62,7 @@ uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int a esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, int atten, uint32_t *out_digi, uint32_t *out_vol_mv) { - assert(version == 1); + assert(version == ESP_EFUSE_ADC_CALIB_VER); assert(atten < 4); assert(adc_unit <= ADC_UNIT_2); diff --git a/components/esp_adc/adc_cali_curve_fitting.c b/components/esp_adc/adc_cali_curve_fitting.c index 1d575c14649..6360d610bce 100644 --- a/components/esp_adc/adc_cali_curve_fitting.c +++ b/components/esp_adc/adc_cali_curve_fitting.c @@ -84,9 +84,9 @@ esp_err_t adc_cali_create_scheme_curve_fitting(const adc_cali_curve_fitting_conf if (ret != ESP_OK) { return ret; } - // current version only accepts encoding ver 1. + // current version only accepts encoding version: `ESP_EFUSE_ADC_CALIB_VER`. uint8_t adc_encoding_version = esp_efuse_rtc_calib_get_ver(); - ESP_RETURN_ON_FALSE(adc_encoding_version == 1, ESP_ERR_NOT_SUPPORTED, TAG, "Calibration required eFuse bits not burnt"); + ESP_RETURN_ON_FALSE(adc_encoding_version == ESP_EFUSE_ADC_CALIB_VER, ESP_ERR_NOT_SUPPORTED, TAG, "Calibration required eFuse bits not burnt"); adc_cali_scheme_t *scheme = (adc_cali_scheme_t *)heap_caps_calloc(1, sizeof(adc_cali_scheme_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); ESP_RETURN_ON_FALSE(scheme, ESP_ERR_NO_MEM, TAG, "no mem for adc calibration scheme"); @@ -151,7 +151,7 @@ static esp_err_t cali_raw_to_voltage(void *arg, int raw, int *voltage) //To get the reference point (Dout, Vin) static void get_first_step_reference_point(int version_num, adc_unit_t unit_id, adc_atten_t atten, adc_calib_info_t *calib_info) { - assert(version_num == 1); + assert(version_num == ESP_EFUSE_ADC_CALIB_VER); esp_err_t ret; calib_info->version_num = version_num; From 508935c457c080129834cb0f6fe196208a6417b2 Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:20:52 +0800 Subject: [PATCH 06/12] esp_adc: refacotr tests for all supported attenuations --- .../esp_adc/test_apps/adc/main/test_adc.c | 18 +++--- .../test_apps/adc/main/test_adc_performance.c | 43 ++++++------- .../test_apps/adc/main/test_common_adc.c | 10 +++ .../test_apps/adc/main/test_common_adc.h | 62 ++++++++++++------- 4 files changed, 77 insertions(+), 56 deletions(-) diff --git a/components/esp_adc/test_apps/adc/main/test_adc.c b/components/esp_adc/test_apps/adc/main/test_adc.c index 04a4e610df8..e49715fa8f6 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_adc.c @@ -129,7 +129,6 @@ TEST_CASE("ADC oneshot high/low test", "[adc_oneshot]") static void s_adc_oneshot_with_sleep(adc_unit_t unit_id, adc_channel_t channel) { - adc_atten_t atten[SOC_ADC_ATTEN_NUM] = {ADC_ATTEN_DB_0, ADC_ATTEN_DB_2_5, ADC_ATTEN_DB_6, ADC_ATTEN_DB_11}; //-------------ADC Init---------------// adc_oneshot_unit_handle_t adc_handle; adc_oneshot_unit_init_cfg_t init_config = { @@ -145,20 +144,20 @@ static void s_adc_oneshot_with_sleep(adc_unit_t unit_id, adc_channel_t channel) //-------------ADC Calibration Init---------------// bool do_calibration = false; - adc_cali_handle_t cali_handle[SOC_ADC_ATTEN_NUM] = {}; - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { - do_calibration = test_adc_calibration_init(unit_id, i, SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]); + adc_cali_handle_t cali_handle[TEST_ATTEN_NUMS] = {}; + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { + do_calibration = test_adc_calibration_init(unit_id, g_test_atten[i], SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]); } if (!do_calibration) { ESP_LOGW(TAG, "No efuse bits burnt, only test the regi2c analog register values"); } - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { //-------------ADC Channel Config---------------// - config.atten = atten[i]; + config.atten = g_test_atten[i]; TEST_ESP_OK(adc_oneshot_config_channel(adc_handle, channel, &config)); - printf("Test with atten: %d\n", atten[i]); + printf("Test with atten: %d\n", g_test_atten[i]); //---------------------------------Before Sleep-----------------------------------// printf("Before Light Sleep\n"); @@ -231,7 +230,7 @@ static void s_adc_oneshot_with_sleep(adc_unit_t unit_id, adc_channel_t channel) } TEST_ESP_OK(adc_oneshot_del_unit(adc_handle)); - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { if (cali_handle[i]) { test_adc_calibration_deinit(cali_handle[i]); } @@ -252,8 +251,11 @@ TEST_CASE("test ADC1 Single Read with Light Sleep", "[adc][manul][ignore]") s_adc_oneshot_with_sleep(ADC_UNIT_1, ADC1_SLEEP_TEST_CHAN); } +#if (SOC_ADC_PERIPH_NUM >= 2) TEST_CASE("test ADC2 Single Read with Light Sleep", "[adc][manul][ignore]") { s_adc_oneshot_with_sleep(ADC_UNIT_2, ADC2_SLEEP_TEST_CHAN); } +#endif //#if (SOC_ADC_PERIPH_NUM >= 2) + #endif //#if SOC_ADC_CALIBRATION_V1_SUPPORTED diff --git a/components/esp_adc/test_apps/adc/main/test_adc_performance.c b/components/esp_adc/test_apps/adc/main/test_adc_performance.c index 8b4b1cebf5e..1eccc0c8b83 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_performance.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_performance.c @@ -125,7 +125,6 @@ static void s_print_summary(bool figure) TEST_CASE("ADC1 oneshot raw average / std_deviation", "[adc_oneshot][ignore][manual]") { - adc_atten_t atten[SOC_ADC_ATTEN_NUM] = {ADC_ATTEN_DB_0, ADC_ATTEN_DB_2_5, ADC_ATTEN_DB_6, ADC_ATTEN_DB_11}; adc_channel_t channel = TEST_STD_ADC1_CHANNEL0; int raw = 0; bool print_figure = false; @@ -145,20 +144,20 @@ TEST_CASE("ADC1 oneshot raw average / std_deviation", "[adc_oneshot][ignore][man //-------------ADC Calibration Init---------------// bool do_calibration = false; - adc_cali_handle_t cali_handle[SOC_ADC_ATTEN_NUM] = {}; - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { - do_calibration = test_adc_calibration_init(ADC_UNIT_1, i, ADC_BITWIDTH_DEFAULT, &cali_handle[i]); + adc_cali_handle_t cali_handle[TEST_ATTEN_NUMS] = {}; + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { + do_calibration = test_adc_calibration_init(ADC_UNIT_1, g_test_atten[i], ADC_BITWIDTH_DEFAULT, &cali_handle[i]); } if (!do_calibration) { ESP_LOGW(TAG, "calibration fail, jump calibration\n"); } - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { //-------------ADC1 Channel Config---------------// - config.atten = atten[i]; + config.atten = g_test_atten[i]; TEST_ESP_OK(adc_oneshot_config_channel(adc1_handle, channel, &config)); - ESP_LOGI("TEST_ADC", "Test with atten: %d", atten[i]); + ESP_LOGI("TEST_ADC", "Test with atten: %d", g_test_atten[i]); while (1) { @@ -181,7 +180,7 @@ TEST_CASE("ADC1 oneshot raw average / std_deviation", "[adc_oneshot][ignore][man } TEST_ESP_OK(adc_oneshot_del_unit(adc1_handle)); - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { if (cali_handle[i]) { test_adc_calibration_deinit(cali_handle[i]); } @@ -192,15 +191,7 @@ TEST_CASE("ADC1 oneshot raw average / std_deviation", "[adc_oneshot][ignore][man /*--------------------------------------------------------------- ADC Calibration Speed ---------------------------------------------------------------*/ -#ifdef CONFIG_IDF_TARGET_ESP32 -#define CPU_FREQ_MHZ CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ -#elif CONFIG_IDF_TARGET_ESP32S2 -#define CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ -#elif CONFIG_IDF_TARGET_ESP32S3 -#define CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ -#elif CONFIG_IDF_TARGET_ESP32C3 -#define CPU_FREQ_MHZ CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ -#endif +#define CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ #define RECORD_TIME_PREPARE() uint32_t __t1, __t2 #define RECORD_TIME_START() do {__t1 = esp_cpu_get_cycle_count();}while(0) @@ -236,9 +227,9 @@ static void s_adc_cali_speed(adc_unit_t unit_id, adc_channel_t channel) { //-------------ADC Calibration Init---------------// bool do_calibration = false; - adc_cali_handle_t cali_handle[SOC_ADC_ATTEN_NUM] = {}; - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { - do_calibration = test_adc_calibration_init(unit_id, i, SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]); + adc_cali_handle_t cali_handle[TEST_ATTEN_NUMS] = {}; + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { + do_calibration = test_adc_calibration_init(unit_id, g_test_atten[i], SOC_ADC_RTC_MAX_BITWIDTH, &cali_handle[i]); } if (!do_calibration) { @@ -246,7 +237,6 @@ static void s_adc_cali_speed(adc_unit_t unit_id, adc_channel_t channel) } else { ESP_LOGI(TAG, "CPU FREQ is %dMHz", CPU_FREQ_MHZ); - adc_atten_t atten[SOC_ADC_ATTEN_NUM] = {ADC_ATTEN_DB_0, ADC_ATTEN_DB_2_5, ADC_ATTEN_DB_6, ADC_ATTEN_DB_11}; uint32_t adc_time_record[4][TIMES_PER_ATTEN] = {}; int adc_raw = 0; @@ -264,12 +254,12 @@ static void s_adc_cali_speed(adc_unit_t unit_id, adc_channel_t channel) }; //atten0 ~ atten3 - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { //-------------ADC Channel Config---------------// - config.atten = atten[i]; + config.atten = g_test_atten[i]; TEST_ESP_OK(adc_oneshot_config_channel(adc_handle, channel, &config)); - ESP_LOGI("TEST_ADC", "Test with atten: %d", atten[i]); + ESP_LOGI("TEST_ADC", "Test with atten: %d", g_test_atten[i]); for (int j = 0; j < TIMES_PER_ATTEN; j++) { TEST_ESP_OK(adc_oneshot_read(adc_handle, channel, &adc_raw)); @@ -279,7 +269,7 @@ static void s_adc_cali_speed(adc_unit_t unit_id, adc_channel_t channel) } TEST_ESP_OK(adc_oneshot_del_unit(adc_handle)); - for (int i = 0; i < SOC_ADC_ATTEN_NUM; i++) { + for (int i = 0; i < TEST_ATTEN_NUMS; i++) { if (cali_handle[i]) { test_adc_calibration_deinit(cali_handle[i]); } @@ -292,8 +282,11 @@ TEST_CASE("ADC1 Calibration Speed", "[adc][ignore][manual]") s_adc_cali_speed(ADC_UNIT_1, ADC1_CALI_SPEED_TEST_CHAN0); } +#if (SOC_ADC_PERIPH_NUM >= 2) TEST_CASE("ADC2 Calibration Speed", "[adc][ignore][manual]") { s_adc_cali_speed(ADC_UNIT_2, ADC2_CALI_SPEED_TEST_CHAN0); } +#endif //#if (SOC_ADC_PERIPH_NUM >= 2) + #endif //#if CONFIG_IDF_TARGET_ESP32 || SOC_ADC_CALIBRATION_V1_SUPPORTED diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.c b/components/esp_adc/test_apps/adc/main/test_common_adc.c index 984ac9516ae..aff057286ee 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.c +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.c @@ -14,6 +14,16 @@ __attribute__((unused)) static const char *TAG = "TEST_ADC"; +/*--------------------------------------------------------------- + ADC Attenuation +---------------------------------------------------------------*/ +#if CONFIG_IDF_TARGET_ESP32C2 +adc_atten_t g_test_atten[TEST_ATTEN_NUMS] = {ADC_ATTEN_DB_0, ADC_ATTEN_DB_11}; +#else +adc_atten_t g_test_atten[TEST_ATTEN_NUMS] = {ADC_ATTEN_DB_0, ADC_ATTEN_DB_2_5, ADC_ATTEN_DB_6, ADC_ATTEN_DB_11}; +#endif + + /*--------------------------------------------------------------- ADC Calibration ---------------------------------------------------------------*/ diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.h b/components/esp_adc/test_apps/adc/main/test_common_adc.h index 99b80a0eb15..c72f528386b 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.h +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.h @@ -26,29 +26,7 @@ extern "C" { #endif /*--------------------------------------------------------------- - ADC Calibration ----------------------------------------------------------------*/ -/** - * @brief Initialise ADC Calibration - * - * @param[out] out_handle ADC calibration handle - * - * @return - * - True Calibration success - * - False Calibration fail - */ -bool test_adc_calibration_init(adc_unit_t unit, adc_atten_t atten, adc_bitwidth_t bitwidth, adc_cali_handle_t *out_handle); - -/** - * @brief De-initialise ADC Calibration - * - * @param[in] handle ADC calibration handle - */ -void test_adc_calibration_deinit(adc_cali_handle_t handle); - - -/*--------------------------------------------------------------- - ADC GPIO + ADC Level ---------------------------------------------------------------*/ /** * We use weak pulldown, `ADC_TEST_LOW_THRESH` may vary. @@ -94,6 +72,44 @@ void test_adc_calibration_deinit(adc_cali_handle_t handle); #define ADC_TEST_HIGH_THRESH 0 #endif + +/*--------------------------------------------------------------- + ADC Attenuation +---------------------------------------------------------------*/ +#if CONFIG_IDF_TARGET_ESP32C2 +#define TEST_ATTEN_NUMS 2 +extern adc_atten_t g_test_atten[TEST_ATTEN_NUMS]; +#else +#define TEST_ATTEN_NUMS 4 +extern adc_atten_t g_test_atten[TEST_ATTEN_NUMS]; +#endif + + +/*--------------------------------------------------------------- + ADC Calibration +---------------------------------------------------------------*/ +/** + * @brief Initialise ADC Calibration + * + * @param[out] out_handle ADC calibration handle + * + * @return + * - True Calibration success + * - False Calibration fail + */ +bool test_adc_calibration_init(adc_unit_t unit, adc_atten_t atten, adc_bitwidth_t bitwidth, adc_cali_handle_t *out_handle); + +/** + * @brief De-initialise ADC Calibration + * + * @param[in] handle ADC calibration handle + */ +void test_adc_calibration_deinit(adc_cali_handle_t handle); + + +/*--------------------------------------------------------------- + ADC GPIO +---------------------------------------------------------------*/ /** * @brief Set ADC IO level * From f905f6ab7cd69f0f56baa2d78747a86b17700eae Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:21:24 +0800 Subject: [PATCH 07/12] esp_adc: add esp32c2 adc high/low test threshold and expected val --- .../test_apps/legacy_adc_driver/main/test_legacy_adc.c | 8 ++++---- components/esp_adc/test_apps/adc/main/test_common_adc.h | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c index d877a1d6619..0039001bcf7 100644 --- a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c +++ b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c @@ -47,11 +47,11 @@ #define ADC_TEST_HIGH_THRESH 0 #elif CONFIG_IDF_TARGET_ESP32C2 -#define ADC_TEST_LOW_VAL 2147 -#define ADC_TEST_LOW_THRESH 100 +#define ADC_TEST_LOW_VAL 0 +#define ADC_TEST_LOW_THRESH 15 -#define ADC_TEST_HIGH_VAL 4095 -#define ADC_TEST_HIGH_THRESH 0 +#define ADC_TEST_HIGH_VAL 3400 +#define ADC_TEST_HIGH_THRESH 200 #endif diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.h b/components/esp_adc/test_apps/adc/main/test_common_adc.h index c72f528386b..1deb93c68b0 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.h +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.h @@ -65,11 +65,11 @@ extern "C" { #define ADC_TEST_HIGH_THRESH 0 #elif CONFIG_IDF_TARGET_ESP32C2 -#define ADC_TEST_LOW_VAL 2147 -#define ADC_TEST_LOW_THRESH 100 +#define ADC_TEST_LOW_VAL 0 +#define ADC_TEST_LOW_THRESH 15 -#define ADC_TEST_HIGH_VAL 4095 -#define ADC_TEST_HIGH_THRESH 0 +#define ADC_TEST_HIGH_VAL 3400 +#define ADC_TEST_HIGH_THRESH 200 #endif From 8d976eafbd857a804198b50e0b60b85056b95d3e Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:22:04 +0800 Subject: [PATCH 08/12] doc: make adc wifi hardware limitation visible on esp32 --- docs/en/api-reference/peripherals/adc_continuous.rst | 4 ++-- docs/en/api-reference/peripherals/adc_oneshot.rst | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/en/api-reference/peripherals/adc_continuous.rst b/docs/en/api-reference/peripherals/adc_continuous.rst index f6f313b8210..125237d43e7 100644 --- a/docs/en/api-reference/peripherals/adc_continuous.rst +++ b/docs/en/api-reference/peripherals/adc_continuous.rst @@ -205,11 +205,11 @@ To do further calbration to convert the ADC raw result to voltage in mV, please Hardware Limitations ^^^^^^^^^^^^^^^^^^^^ -- A specific ADC unit can only work under one operating mode at any one time, either Continuous Mode or Oneshot Mode. :cpp:func:`adc_continuous_start` has provided the protection. +- A specific ADC unit can only work under one operating mode at any one time, either continuous mode or oneshot mode. :cpp:func:`adc_continuous_start` has provided the protection. - Random Number Generator uses ADC as an input source. When ADC continuous mode driver works, the random number generated from RNG will be less random. -.. only:: esp32s2 or esp32c3 or esp32s3 +.. only:: esp32 or esp32s2 or esp32c3 or esp32s3 - ADC2 is also used by the Wi-Fi. :cpp:func:`adc_continuous_start` has provided the protection between Wi-Fi driver and ADC continuous mode driver. diff --git a/docs/en/api-reference/peripherals/adc_oneshot.rst b/docs/en/api-reference/peripherals/adc_oneshot.rst index f8cd4c5336e..098a9894fed 100644 --- a/docs/en/api-reference/peripherals/adc_oneshot.rst +++ b/docs/en/api-reference/peripherals/adc_oneshot.rst @@ -152,11 +152,11 @@ Hardware Limitations .. only:: SOC_ADC_DMA_SUPPORTED - - A specific ADC unit can only work under one operating mode at any one time, either Continuous Mode or Oneshot Mode. :cpp:func:`adc_oneshot_read` has provided the protection. + - A specific ADC unit can only work under one operating mode at any one time, either continuous mode or oneshot mode. :cpp:func:`adc_oneshot_read` has provided the protection. -.. only:: esp32s2 or esp32c3 or esp32s3 +.. only:: esp32 or esp32s2 or esp32c3 or esp32s3 - - ADC2 is also used by the Wi-Fi. :cpp:func:`adc_oneshot_read` has provided the protection between Wi-Fi driver and ADC continuous mode driver. + - ADC2 is also used by the Wi-Fi. :cpp:func:`adc_oneshot_read` has provided the protection between Wi-Fi driver and ADC oneshot mode driver. .. only:: esp32 From 05e232ca9834357051ac9df81540bd29ca44dec1 Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 8 Sep 2022 19:23:09 +0800 Subject: [PATCH 09/12] esp_adc: defined an example macro for attenuation --- .../peripherals/adc/oneshot_read/main/oneshot_read_main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/examples/peripherals/adc/oneshot_read/main/oneshot_read_main.c b/examples/peripherals/adc/oneshot_read/main/oneshot_read_main.c index c71c50259bd..2ff69f4f5bd 100644 --- a/examples/peripherals/adc/oneshot_read/main/oneshot_read_main.c +++ b/examples/peripherals/adc/oneshot_read/main/oneshot_read_main.c @@ -37,6 +37,8 @@ const static char *TAG = "EXAMPLE"; #endif #endif +#define EXAMPLE_ADC_ATTEN ADC_ATTEN_DB_11 + static int adc_raw[2][10]; static int voltage[2][10]; static bool example_adc_calibration_init(adc_unit_t unit, adc_atten_t atten, adc_cali_handle_t *out_handle); @@ -55,14 +57,14 @@ void app_main(void) //-------------ADC1 Config---------------// adc_oneshot_chan_cfg_t config = { .bitwidth = ADC_BITWIDTH_DEFAULT, - .atten = ADC_ATTEN_DB_11, + .atten = EXAMPLE_ADC_ATTEN, }; ESP_ERROR_CHECK(adc_oneshot_config_channel(adc1_handle, EXAMPLE_ADC1_CHAN0, &config)); ESP_ERROR_CHECK(adc_oneshot_config_channel(adc1_handle, EXAMPLE_ADC1_CHAN1, &config)); //-------------ADC1 Calibration Init---------------// adc_cali_handle_t adc1_cali_handle = NULL; - bool do_calibration1 = example_adc_calibration_init(ADC_UNIT_1, ADC_ATTEN_DB_11, &adc1_cali_handle); + bool do_calibration1 = example_adc_calibration_init(ADC_UNIT_1, EXAMPLE_ADC_ATTEN, &adc1_cali_handle); #if (SOC_ADC_PERIPH_NUM >= 2) @@ -76,7 +78,7 @@ void app_main(void) //-------------ADC2 Calibration Init---------------// adc_cali_handle_t adc2_cali_handle = NULL; - bool do_calibration2 = example_adc_calibration_init(ADC_UNIT_2, ADC_ATTEN_DB_11, &adc2_cali_handle); + bool do_calibration2 = example_adc_calibration_init(ADC_UNIT_2, EXAMPLE_ADC_ATTEN, &adc2_cali_handle); //-------------ADC2 Config---------------// ESP_ERROR_CHECK(adc_oneshot_config_channel(adc2_handle, EXAMPLE_ADC2_CHAN0, &config)); From 0a428617b6ba9633a5cd4fa3ba0eff1efa0beb61 Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 10 Oct 2022 11:51:42 +0800 Subject: [PATCH 10/12] doc: add esp32c2 calibration notes --- docs/en/api-reference/peripherals/adc_calibration.rst | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/docs/en/api-reference/peripherals/adc_calibration.rst b/docs/en/api-reference/peripherals/adc_calibration.rst index 92b6bb47294..ecafc8f90e8 100644 --- a/docs/en/api-reference/peripherals/adc_calibration.rst +++ b/docs/en/api-reference/peripherals/adc_calibration.rst @@ -33,7 +33,7 @@ The ADC calibration driver provides ADC calibration scheme(s). From calibration For those users who use their custom ADC calibration schemes, you could either modify this function :cpp:func:`adc_cali_check_scheme`, or just skip this step and call your custom creation function. -.. only:: esp32 or esp32s2 +.. only:: esp32 or esp32s2 or esp32c2 ADC Calibration Line Fitting Scheme ``````````````````````````````````` @@ -120,7 +120,7 @@ For those users who use their custom ADC calibration schemes, you could either m ESP_ERROR_CHECK(adc_cali_delete_scheme_curve_fitting(handle)); -.. only:: esp32c2 or esp32h2 +.. only:: esp32h2 There is no supported calibration scheme yet. @@ -134,6 +134,11 @@ Result Conversion After setting up the calibration characteristics, you can call :cpp:func:`adc_cali_raw_to_voltage` to convert the ADC raw result into calibrated result. The calibrated result is in the unit of mV. This function may fail due to invalid argument. Especailly, if this function returns :c:macro:`ESP_ERR_INVALID_STATE`, this means the calibration scheme isn't created. You need to create a calibration scheme handle, use :cpp:func:`adc_cali_check_scheme` to know the supported calibration scheme. On the other hand, you could also provide a custom calibration scheme and create the handle. +.. only:: esp32c2 + + .. note:: + + ADC calibration is only supported under :c:macro:`ADC_ATTEN_DB_0` and :c:macro:`ADC_ATTEN_DB_11`. Under :c:macro:`ADC_ATTEN_DB_0`, input voltage higher than 950 mV is not supported. Under :c:macro:`ADC_ATTEN_DB_11`, input voltage higher than 2800 mV is not supported. Get Voltage ~~~~~~~~~~~ From 9cb1006b2bd02e08cb829f994f0488ded114eb41 Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 13 Oct 2022 21:00:22 +0800 Subject: [PATCH 11/12] esp_adc: make c2 atten0 calibration experimental --- components/esp_adc/esp32c2/adc_cali_line_fitting.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/components/esp_adc/esp32c2/adc_cali_line_fitting.c b/components/esp_adc/esp32c2/adc_cali_line_fitting.c index f7f172fe648..dde0ebe40f6 100644 --- a/components/esp_adc/esp32c2/adc_cali_line_fitting.c +++ b/components/esp_adc/esp32c2/adc_cali_line_fitting.c @@ -122,6 +122,9 @@ static esp_err_t check_valid(const adc_cali_line_fitting_config_t *config) { ESP_RETURN_ON_FALSE(config->unit_id < SOC_ADC_PERIPH_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid ADC unit"); ESP_RETURN_ON_FALSE((config->atten == ADC_ATTEN_DB_0 || config->atten == ADC_ATTEN_DB_11), ESP_ERR_NOT_SUPPORTED, TAG, "only ADC_ATTEN_DB_0 and ADC_ATTEN_DB_11 are supported"); + if (config->atten == ADC_ATTEN_DB_0) { + ESP_LOGW(TAG, "Experimental: ADC Atten 0 calibration can now only used for inputs lower than 950mV. Calibration Scheme may get updated, DON'T USE FOR MASS PRODUCTION!"); + } bool available_oneshot_bitwidth = (config->bitwidth >= SOC_ADC_RTC_MIN_BITWIDTH && config->bitwidth <= SOC_ADC_RTC_MAX_BITWIDTH); bool available_dma_bitwidth = (config->bitwidth >= SOC_ADC_DIGI_MIN_BITWIDTH && config->bitwidth <= SOC_ADC_DIGI_MAX_BITWIDTH); From d592d983ceb0143d403e87846eb9b1e9f8d9c96a Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 17 Oct 2022 11:09:56 +0800 Subject: [PATCH 12/12] esp_adc: added esp32c2 adc runners --- .../legacy_adc_driver/pytest_legacy_adc.py | 17 ++++++++++++++++- .../sdkconfig.ci.esp32c2_xtal26m_release | 8 ++++++++ components/esp_adc/test_apps/adc/pytest_adc.py | 18 +++++++++++++++++- .../adc/sdkconfig.ci.esp32c2_xtal26m_iram_safe | 13 +++++++++++++ .../adc/sdkconfig.ci.esp32c2_xtal26m_release | 6 ++++++ 5 files changed, 60 insertions(+), 2 deletions(-) create mode 100644 components/driver/test_apps/legacy_adc_driver/sdkconfig.ci.esp32c2_xtal26m_release create mode 100644 components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_iram_safe create mode 100644 components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_release diff --git a/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py b/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py index 881f8e0f6bd..667555b36d6 100644 --- a/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py +++ b/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py @@ -9,7 +9,6 @@ @pytest.mark.esp32s2 @pytest.mark.esp32s3 @pytest.mark.esp32c3 -@pytest.mark.esp32c2 @pytest.mark.adc @pytest.mark.parametrize( 'config', @@ -22,3 +21,19 @@ def test_legacy_adc(dut: Dut) -> None: dut.expect_exact('Press ENTER to see the list of tests') dut.write('*') dut.expect_unity_test_output(timeout=240) + + +# All ESP32C2 ADC runners are 26m xtal +@pytest.mark.esp32c2 +@pytest.mark.adc +@pytest.mark.parametrize( + 'config, baud', + [ + ('esp32c2_xtal26m_release', '74880'), + ], + indirect=True, +) +def test_legacy_adc_esp32c2_xtal_26mhz(dut: Dut) -> None: + dut.expect_exact('Press ENTER to see the list of tests') + dut.write('*') + dut.expect_unity_test_output(timeout=240) diff --git a/components/driver/test_apps/legacy_adc_driver/sdkconfig.ci.esp32c2_xtal26m_release b/components/driver/test_apps/legacy_adc_driver/sdkconfig.ci.esp32c2_xtal26m_release new file mode 100644 index 00000000000..493256fa2fe --- /dev/null +++ b/components/driver/test_apps/legacy_adc_driver/sdkconfig.ci.esp32c2_xtal26m_release @@ -0,0 +1,8 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_XTAL_FREQ_26=y + +CONFIG_PM_ENABLE=y +CONFIG_FREERTOS_USE_TICKLESS_IDLE=y +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y diff --git a/components/esp_adc/test_apps/adc/pytest_adc.py b/components/esp_adc/test_apps/adc/pytest_adc.py index bf7d2fb0939..abc701f9e7a 100644 --- a/components/esp_adc/test_apps/adc/pytest_adc.py +++ b/components/esp_adc/test_apps/adc/pytest_adc.py @@ -9,7 +9,6 @@ @pytest.mark.esp32s2 @pytest.mark.esp32s3 @pytest.mark.esp32c3 -@pytest.mark.esp32c2 @pytest.mark.adc @pytest.mark.parametrize('config', [ 'iram_safe', @@ -19,3 +18,20 @@ def test_adc(dut: Dut) -> None: dut.expect_exact('Press ENTER to see the list of tests') dut.write('*') dut.expect_unity_test_output(timeout=120) + + +# All ESP32C2 ADC runners are 26m xtal +@pytest.mark.esp32c2 +@pytest.mark.adc +@pytest.mark.parametrize( + 'config, baud', + [ + ('esp32c2_xtal26m_iram_safe', '74880'), + ('esp32c2_xtal26m_release', '74880'), + ], + indirect=True, +) +def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None: + dut.expect_exact('Press ENTER to see the list of tests') + dut.write('*') + dut.expect_unity_test_output(timeout=120) diff --git a/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_iram_safe b/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_iram_safe new file mode 100644 index 00000000000..f04805811dc --- /dev/null +++ b/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_iram_safe @@ -0,0 +1,13 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_XTAL_FREQ_26=y + +CONFIG_COMPILER_DUMP_RTL_FILES=y +CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM=y +CONFIG_GPTIMER_ISR_IRAM_SAFE=y +CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM=y +CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE=y +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +# silent the error check, as the error string are stored in rodata, causing RTL check failure +CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y +CONFIG_HAL_ASSERTION_SILENT=y diff --git a/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_release b/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_release new file mode 100644 index 00000000000..42038ac69e2 --- /dev/null +++ b/components/esp_adc/test_apps/adc/sdkconfig.ci.esp32c2_xtal26m_release @@ -0,0 +1,6 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_XTAL_FREQ_26=y + +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y