diff --git a/components/soc/esp32c3/include/soc/reg_base.h b/components/soc/esp32c3/include/soc/reg_base.h index de782888c5d..4ec808f0ab9 100644 --- a/components/soc/esp32c3/include/soc/reg_base.h +++ b/components/soc/esp32c3/include/soc/reg_base.h @@ -41,7 +41,7 @@ #define DR_REG_SYSCON_BASE 0x60026000 #define DR_REG_APB_CTRL_BASE 0x60026000 /* Old name for SYSCON, to be removed */ #define DR_REG_TWAI_BASE 0x6002B000 -#define DR_REG_I2S0_BASE 0x6002D000 +#define DR_REG_I2S_BASE 0x6002D000 #define DR_REG_APB_SARADC_BASE 0x60040000 #define DR_REG_USB_SERIAL_JTAG_BASE 0x60043000 #define DR_REG_XTS_AES_BASE 0x600CC000 diff --git a/components/soc/esp32c3/include/soc/soc.h b/components/soc/esp32c3/include/soc/soc.h index 0f686cac4af..bbe07ec4e4d 100644 --- a/components/soc/esp32c3/include/soc/soc.h +++ b/components/soc/esp32c3/include/soc/soc.h @@ -20,7 +20,7 @@ #define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x10000) #define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000) #define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0) -#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000) +#define REG_I2S_BASE(i) (DR_REG_I2S_BASE) // only one I2S on C3 #define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000) #define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE - (i) * 0x1000) #define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI diff --git a/components/soc/esp32h2/include/soc/soc.h b/components/soc/esp32h2/include/soc/soc.h index b11f14218f6..b45923bef82 100644 --- a/components/soc/esp32h2/include/soc/soc.h +++ b/components/soc/esp32h2/include/soc/soc.h @@ -20,7 +20,7 @@ #define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x1000) #define REG_UART_AHB_BASE(i) (0x60000000 + (i) * 0x10000) #define UART_FIFO_AHB_REG(i) (REG_UART_AHB_BASE(i) + 0x0) -#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1E000) +#define REG_I2S_BASE(i) (DR_REG_I2S_BASE) // only one I2S on H2 #define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i)*0x1000) #define REG_SPI_MEM_BASE(i) (DR_REG_SPI0_BASE + (i) * 0x1000) #define REG_SPI_BASE(i) (((i)==2) ? (DR_REG_SPI2_BASE) : (0)) // only one GPSPI diff --git a/components/soc/esp32p4/include/soc/soc.h b/components/soc/esp32p4/include/soc/soc.h index eb56713d6fd..8af7bdc2570 100644 --- a/components/soc/esp32p4/include/soc/soc.h +++ b/components/soc/esp32p4/include/soc/soc.h @@ -19,7 +19,7 @@ #define REG_UHCI_BASE(i) (DR_REG_UHCI0_BASE) // only one UHCI on C6 #define REG_UART_BASE(i) (DR_REG_UART_BASE + (i) * 0x1000) // UART0 and UART1 #define UART_FIFO_AHB_REG(i) (REG_UART_BASE(i) + 0x0) -#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1000) // only one I2S on C6 +#define REG_I2S_BASE(i) (DR_REG_I2S_BASE + (i) * 0x1000) #define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + (i) * 0x1000) // TIMERG0 and TIMERG1 #define REG_SPI_MEM_BASE(i) (DR_REG_FLASH_SPI0_BASE + (i) * 0x1000) // SPIMEM0 and SPIMEM1 #define REG_SPI_BASE(i) (((i)>=2) ? (DR_REG_SPI2_BASE + (i-2) * 0x1000) : (0)) // GPSPI2 and GPSPI3