From aac5297f8aa4731bc76b1a904dd20b29e900343f Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Tue, 8 Nov 2022 18:59:44 +0800 Subject: [PATCH] I2C: put some interrupt used functions into IRAM --- components/hal/esp32/include/hal/i2c_ll.h | 18 ++++++++++++++++++ components/hal/esp32c3/include/hal/i2c_ll.h | 18 ++++++++++++++++++ components/hal/esp32s2/include/hal/i2c_ll.h | 18 ++++++++++++++++++ components/hal/esp32s3/include/hal/i2c_ll.h | 19 +++++++++++++++++++ components/hal/i2c_hal.c | 5 ----- components/hal/i2c_hal_iram.c | 5 +++++ 6 files changed, 78 insertions(+), 5 deletions(-) diff --git a/components/hal/esp32/include/hal/i2c_ll.h b/components/hal/esp32/include/hal/i2c_ll.h index 980f517cf9e..33a25a9cfd8 100644 --- a/components/hal/esp32/include/hal/i2c_ll.h +++ b/components/hal/esp32/include/hal/i2c_ll.h @@ -235,6 +235,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -290,6 +291,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -454,6 +456,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -466,6 +469,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -490,6 +494,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -549,6 +554,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -566,6 +572,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -614,6 +621,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -627,6 +635,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -640,6 +649,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -652,6 +662,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -664,6 +675,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -676,6 +688,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -712,6 +725,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -736,6 +750,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -801,6 +816,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -827,6 +843,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -882,6 +899,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32 do not support diff --git a/components/hal/esp32c3/include/hal/i2c_ll.h b/components/hal/esp32c3/include/hal/i2c_ll.h index fb87ed5d80f..5b27481e2f2 100644 --- a/components/hal/esp32c3/include/hal/i2c_ll.h +++ b/components/hal/esp32c3/include/hal/i2c_ll.h @@ -131,6 +131,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -256,6 +257,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -311,6 +313,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -475,6 +478,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rx_fifo_cnt; @@ -487,6 +491,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt; @@ -511,6 +516,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -570,6 +576,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -586,6 +593,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -634,6 +642,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -647,6 +656,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -660,6 +670,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -672,6 +683,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -684,6 +696,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -696,6 +709,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -732,6 +746,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -756,6 +771,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ + __attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -833,6 +849,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -859,6 +876,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/esp32s2/include/hal/i2c_ll.h b/components/hal/esp32s2/include/hal/i2c_ll.h index 534962c1c0e..a2352cb1e75 100644 --- a/components/hal/esp32s2/include/hal/i2c_ll.h +++ b/components/hal/esp32s2/include/hal/i2c_ll.h @@ -222,6 +222,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -278,6 +279,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -442,6 +444,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -454,6 +457,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -478,6 +482,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -537,6 +542,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -554,6 +560,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -603,6 +610,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -616,6 +624,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -629,6 +638,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -641,6 +651,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -653,6 +664,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -665,6 +677,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -701,6 +714,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -725,6 +739,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -793,6 +808,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -819,6 +835,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -892,6 +909,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32S2 do not support diff --git a/components/hal/esp32s3/include/hal/i2c_ll.h b/components/hal/esp32s3/include/hal/i2c_ll.h index 5617d346c4e..bbf9d797ce4 100644 --- a/components/hal/esp32s3/include/hal/i2c_ll.h +++ b/components/hal/esp32s3/include/hal/i2c_ll.h @@ -124,6 +124,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -267,6 +268,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -322,6 +324,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -486,6 +489,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -498,6 +502,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -522,6 +527,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -597,6 +603,7 @@ static inline void i2c_ll_get_scl_clk_timing(i2c_dev_t *hw, int *high_period, in * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -613,6 +620,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -661,6 +669,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -674,6 +683,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -687,6 +697,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -699,6 +710,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -711,6 +723,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -723,6 +736,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -759,6 +773,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -783,6 +798,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -851,6 +867,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -877,6 +894,8 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ + +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/i2c_hal.c b/components/hal/i2c_hal.c index db2dd1a7e11..aec4e604cfd 100644 --- a/components/hal/i2c_hal.c +++ b/components/hal/i2c_hal.c @@ -64,11 +64,6 @@ void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask) i2c_ll_disable_intr_mask(hal->dev, mask); } -void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) -{ - *mask = i2c_ll_get_intsts_mask(hal->dev); -} - void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en) { i2c_ll_set_fifo_mode(hal->dev, fifo_mode_en); diff --git a/components/hal/i2c_hal_iram.c b/components/hal/i2c_hal_iram.c index 080d19c9192..557a58c79ba 100644 --- a/components/hal/i2c_hal_iram.c +++ b/components/hal/i2c_hal_iram.c @@ -67,3 +67,8 @@ void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len) { *len = i2c_ll_get_txfifo_len(hal->dev); } + +void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) +{ + *mask = i2c_ll_get_intsts_mask(hal->dev); +}