From ee17949e3973972634ca4649c1655829538b178b Mon Sep 17 00:00:00 2001 From: jingli Date: Fri, 8 Jul 2022 17:38:31 +0800 Subject: [PATCH 1/5] examples/system/light_sleep: fix baudrate for uart wakeup source --- examples/system/light_sleep/main/uart_wakeup.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/examples/system/light_sleep/main/uart_wakeup.c b/examples/system/light_sleep/main/uart_wakeup.c index b7bd328e1b9..31f41f912c0 100644 --- a/examples/system/light_sleep/main/uart_wakeup.c +++ b/examples/system/light_sleep/main/uart_wakeup.c @@ -10,6 +10,7 @@ #include "soc/uart_pins.h" #include "driver/uart.h" #include "driver/gpio.h" +#include "sdkconfig.h" #define EXAMPLE_UART_NUM 0 /* Notice that ESP32 has to use the iomux input to configure uart as wakeup source @@ -96,7 +97,7 @@ static void uart_wakeup_task(void *arg) static esp_err_t uart_initialization(void) { uart_config_t uart_cfg = { - .baud_rate = 115200, + .baud_rate = CONFIG_ESP_CONSOLE_UART_BAUDRATE, .data_bits = UART_DATA_8_BITS, .parity = UART_PARITY_DISABLE, .stop_bits = UART_STOP_BITS_1, From a61abcc22ec6eb39e58765be90e23a389de03760 Mon Sep 17 00:00:00 2001 From: jingli Date: Mon, 11 Jul 2022 16:49:58 +0800 Subject: [PATCH 2/5] examples/system/light_sleep: fix uart garbled output --- examples/system/light_sleep/main/uart_wakeup.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/examples/system/light_sleep/main/uart_wakeup.c b/examples/system/light_sleep/main/uart_wakeup.c index 31f41f912c0..fc882ad2c2b 100644 --- a/examples/system/light_sleep/main/uart_wakeup.c +++ b/examples/system/light_sleep/main/uart_wakeup.c @@ -107,6 +107,10 @@ static esp_err_t uart_initialization(void) //Install UART driver, and get the queue. ESP_RETURN_ON_ERROR(uart_driver_install(EXAMPLE_UART_NUM, EXAMPLE_UART_BUF_SIZE, EXAMPLE_UART_BUF_SIZE, 20, &uart_evt_que, 0), TAG, "Install uart failed"); + if (EXAMPLE_UART_NUM == CONFIG_ESP_CONSOLE_UART_NUM) { + /* temp fix for uart garbled output, can be removed when IDF-5683 done */ + ESP_RETURN_ON_ERROR(uart_wait_tx_idle_polling(EXAMPLE_UART_NUM), TAG, "Wait uart tx done failed"); + } ESP_RETURN_ON_ERROR(uart_param_config(EXAMPLE_UART_NUM, &uart_cfg), TAG, "Configure uart param failed"); ESP_RETURN_ON_ERROR(uart_set_pin(EXAMPLE_UART_NUM, EXAMPLE_UART_TX_IO_NUM, EXAMPLE_UART_RX_IO_NUM, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE), TAG, "Configure uart gpio pins failed"); From ee3423834eb38a7bd494a7688eb80eb240b03072 Mon Sep 17 00:00:00 2001 From: jingli Date: Wed, 13 Jul 2022 10:54:41 +0800 Subject: [PATCH 3/5] kconfig: refactor xtal freq kconfig to common configuration item --- .../src/bootloader_clock_init.c | 7 --- components/bt/controller/esp32c2/bt.c | 4 +- .../bt/include/esp32c2/include/esp_bt.h | 2 +- .../bt/include/esp32c2/include/esp_bt_cfg.h | 4 +- .../gptimer/sdkconfig.ci.esp32c2_xtal26m | 2 +- components/esp_hw_support/Kconfig | 43 ++++++++++++++++++- .../include/esp_private/esp_clk.h | 2 +- .../port/esp32/Kconfig.hw_support | 30 ------------- .../esp_hw_support/port/esp32/rtc_clk_init.c | 2 +- .../port/esp32c2/Kconfig.hw_support | 21 --------- .../esp_hw_support/port/esp32c2/rtc_clk.c | 4 +- .../esp_hw_support/port/esp32c2/systimer.c | 6 +-- .../esp_hw_support/sdkconfig.rename.esp32 | 5 +++ components/esp_system/Kconfig | 2 +- components/esp_system/port/soc/esp32c2/clk.c | 4 +- .../soc/esp32/include/soc/Kconfig.soc_caps.in | 12 ++++++ components/soc/esp32/include/soc/rtc.h | 2 +- components/soc/esp32/include/soc/soc_caps.h | 5 +++ .../esp32c2/include/soc/Kconfig.soc_caps.in | 8 ++++ components/soc/esp32c2/include/soc/rtc.h | 2 +- components/soc/esp32c2/include/soc/soc_caps.h | 4 ++ .../esp32c3/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32c3/include/soc/rtc.h | 2 +- components/soc/esp32c3/include/soc/soc_caps.h | 3 ++ .../esp32h2/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32h2/include/soc/rtc.h | 2 +- components/soc/esp32h2/include/soc/soc_caps.h | 2 + .../esp32s2/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32s2/include/soc/rtc.h | 2 +- components/soc/esp32s2/include/soc/soc_caps.h | 2 + .../esp32s3/include/soc/Kconfig.soc_caps.in | 4 ++ components/soc/esp32s3/include/soc/rtc.h | 2 +- components/soc/esp32s3/include/soc/soc_caps.h | 3 ++ .../ble/ble_ancs/sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../ble/ble_ibeacon/sdkconfig.defaults.esp32 | 8 ++-- .../ble_spp_client/sdkconfig.defaults.esp32 | 8 ++-- .../ble_spp_server/sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../ble/gatt_client/sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../ble/gatt_server/sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../sdkconfig.defaults.esp32 | 8 ++-- .../gattc_gatts_coex/sdkconfig.defauts.esp32 | 8 ++-- .../bluetooth/blufi/sdkconfig.defaults.esp32 | 8 ++-- tools/ldgen/samples/sdkconfig | 8 ++-- .../sdkconfig.ci.esp32c2_26mhz_xtal | 2 +- tools/unit-test-app/configs/default_c2_26mhz | 2 +- tools/unit-test-app/sdkconfig.defaults.esp32 | 2 +- .../unit-test-app/tools/ConfigDependency.yml | 4 +- 54 files changed, 197 insertions(+), 154 deletions(-) delete mode 100644 components/esp_hw_support/port/esp32c2/Kconfig.hw_support diff --git a/components/bootloader_support/src/bootloader_clock_init.c b/components/bootloader_support/src/bootloader_clock_init.c index 3a12b73eb89..35b1e089529 100644 --- a/components/bootloader_support/src/bootloader_clock_init.c +++ b/components/bootloader_support/src/bootloader_clock_init.c @@ -42,13 +42,6 @@ __attribute__((weak)) void bootloader_clock_configure(void) if (esp_rom_get_reset_reason(0) != RESET_REASON_CPU0_SW || rtc_clk_apb_freq_get() < APB_CLK_FREQ) { rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT(); -#if CONFIG_IDF_TARGET_ESP32 - clk_cfg.xtal_freq = CONFIG_ESP32_XTAL_FREQ; -#endif -#if CONFIG_IDF_TARGET_ESP32C2 - clk_cfg.xtal_freq = CONFIG_ESP32C2_XTAL_FREQ; -#endif - /* For other chips, there is no XTAL_FREQ choice */ clk_cfg.cpu_freq_mhz = cpu_freq_mhz; clk_cfg.slow_clk_src = rtc_clk_slow_src_get(); if (clk_cfg.slow_clk_src == SOC_RTC_SLOW_CLK_SRC_INVALID) { diff --git a/components/bt/controller/esp32c2/bt.c b/components/bt/controller/esp32c2/bt.c index 8eb4212a25f..dbad0cc881a 100644 --- a/components/bt/controller/esp32c2/bt.c +++ b/components/bt/controller/esp32c2/bt.c @@ -576,13 +576,13 @@ void ble_rtc_clk_init(void) SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_8M_S); SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, 1, 0, MODEM_CLKRST_LP_TIMER_SEL_RTC_SLOW_S); -#ifdef CONFIG_ESP32C2_XTAL_FREQ_26 +#ifdef CONFIG_XTAL_FREQ_26 // LP_TIMER_CLK_DIV_NUM -> 130 SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 129, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S); #else // LP_TIMER_CLK_DIV_NUM -> 250 SET_PERI_REG_BITS(MODEM_CLKRST_MODEM_LP_TIMER_CONF_REG, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM, 249, MODEM_CLKRST_LP_TIMER_CLK_DIV_NUM_S); -#endif // CONFIG_ESP32C2_XTAL_FREQ_26 +#endif // CONFIG_XTAL_FREQ_26 // MODEM_CLKRST_ETM_CLK_ACTIVE -> 1 // MODEM_CLKRST_ETM_CLK_SEL -> 0 diff --git a/components/bt/include/esp32c2/include/esp_bt.h b/components/bt/include/esp32c2/include/esp_bt.h index 01b19279b13..3cac31b7030 100644 --- a/components/bt/include/esp32c2/include/esp_bt.h +++ b/components/bt/include/esp32c2/include/esp_bt.h @@ -226,7 +226,7 @@ typedef struct { .coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \ .dis_scan_backoff = NIMBLE_DISABLE_SCAN_BACKOFF, \ .ble_scan_classify_filter_enable = 0, \ - .main_xtal_freq = CONFIG_ESP32C2_XTAL_FREQ, \ + .main_xtal_freq = CONFIG_XTAL_FREQ, \ .config_magic = CONFIG_MAGIC, \ }; diff --git a/components/bt/include/esp32c2/include/esp_bt_cfg.h b/components/bt/include/esp32c2/include/esp_bt_cfg.h index 6ecad038f0c..18579db1921 100644 --- a/components/bt/include/esp32c2/include/esp_bt_cfg.h +++ b/components/bt/include/esp32c2/include/esp_bt_cfg.h @@ -192,11 +192,11 @@ extern "C" { #define BLE_LL_CONN_DEF_AUTH_PYLD_TMO_N (3000) -#ifdef CONFIG_ESP32C2_XTAL_FREQ_26 +#ifdef CONFIG_XTAL_FREQ_26 #define RTC_FREQ_N (40000) /* in Hz */ #else #define RTC_FREQ_N (32000) /* in Hz */ -#endif // CONFIG_ESP32C2_XTAL_FREQ_26 +#endif // CONFIG_XTAL_FREQ_26 #define BLE_LL_TX_PWR_DBM_N (0) diff --git a/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m b/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m index 520e2cf90a5..172f022b67e 100644 --- a/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m +++ b/components/driver/test_apps/gptimer/sdkconfig.ci.esp32c2_xtal26m @@ -1,2 +1,2 @@ CONFIG_IDF_TARGET="esp32c2" -CONFIG_ESP32C2_XTAL_FREQ_26=y +CONFIG_XTAL_FREQ_26=y diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig index 3a8483debc4..640a3cda960 100644 --- a/components/esp_hw_support/Kconfig +++ b/components/esp_hw_support/Kconfig @@ -103,7 +103,6 @@ menu "Hardware Settings" If you are seeing "flash read err, 1000" message printed to the console after deep sleep reset, try increasing this value. - endmenu menu "RTC Clock Config" @@ -168,7 +167,6 @@ menu "Hardware Settings" default 0x4000 if MMU_PAGE_SIZE_16KB default 0x8000 if MMU_PAGE_SIZE_32KB default 0x10000 if MMU_PAGE_SIZE_64KB - endmenu # Insert chip-specific HW config @@ -193,4 +191,45 @@ menu "Hardware Settings" (e.g. SPI Flash write). endmenu # GDMA Configuration + menu "Main XTAL Config" + choice XTAL_FREQ_SEL + prompt "Main XTAL frequency" + default XTAL_FREQ_40 if SOC_XTAL_SUPPORT_40M + help + This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target. + The selected value MUST reflect the frequency of the given hardware. + + Note: The XTAL_FREQ_AUTO option allows the ESP target to automatically estimating XTAL clock's + operating frequency. However, this feature is only supported on the ESP32. The ESP32 uses the + internal 8MHZ as a reference when estimating. Due to the internal oscillator's frequency being + temperature dependent, usage of the XTAL_FREQ_AUTO is not recommended in applications that operate + in high ambient temperatures or use high-temperature qualified chips and modules. + + config XTAL_FREQ_24 + depends on SOC_XTAL_SUPPORT_24M + bool "24 MHz" + config XTAL_FREQ_26 + depends on SOC_XTAL_SUPPORT_26M + bool "26 MHz" + config XTAL_FREQ_32 + depends on SOC_XTAL_SUPPORT_32M + bool "32 MHz" + config XTAL_FREQ_40 + depends on SOC_XTAL_SUPPORT_40M + bool "40 MHz" + config XTAL_FREQ_AUTO + depends on SOC_XTAL_SUPPORT_AUTO_DETECT + bool "Autodetect" + endchoice + + # rtc_xtal_freq_t enum in soc/rtc.h lists the XTAL frequencies can be supported + # SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported + config XTAL_FREQ + int + default 24 if XTAL_FREQ_24 + default 26 if XTAL_FREQ_26 + default 32 if XTAL_FREQ_32 + default 40 if XTAL_FREQ_40 + default 0 if XTAL_FREQ_AUTO + endmenu endmenu diff --git a/components/esp_hw_support/include/esp_private/esp_clk.h b/components/esp_hw_support/include/esp_private/esp_clk.h index 5a4666fdddf..8462b032eec 100644 --- a/components/esp_hw_support/include/esp_private/esp_clk.h +++ b/components/esp_hw_support/include/esp_private/esp_clk.h @@ -63,7 +63,7 @@ int esp_clk_apb_freq(void); * @brief Return frequency of the main XTAL * * Frequency of the main XTAL can be either auto-detected or set at compile - * time (see CONFIG_ESP32_XTAL_FREQ_SEL sdkconfig option). In both cases, this + * time (see CONFIG_XTAL_FREQ_SEL sdkconfig option). In both cases, this * function returns the actual value at run time. * * @return XTAL frequency, in Hz diff --git a/components/esp_hw_support/port/esp32/Kconfig.hw_support b/components/esp_hw_support/port/esp32/Kconfig.hw_support index 91711dc9413..26ff2dcbcc1 100644 --- a/components/esp_hw_support/port/esp32/Kconfig.hw_support +++ b/components/esp_hw_support/port/esp32/Kconfig.hw_support @@ -24,33 +24,3 @@ config ESP32_REV_MIN default 1 if ESP32_REV_MIN_1 default 2 if ESP32_REV_MIN_2 default 3 if ESP32_REV_MIN_3 - -choice ESP32_XTAL_FREQ_SEL - prompt "Main XTAL frequency" - default ESP32_XTAL_FREQ_40 - help - ESP32 currently supports the following XTAL frequencies: - - - 26 MHz - - 40 MHz - - Startup code can automatically estimate XTAL frequency. This feature - uses the internal 8MHz oscillator as a reference. Because the internal - oscillator frequency is temperature dependent, it is not recommended - to use automatic XTAL frequency detection in applications which need - to work at high ambient temperatures and use high-temperature - qualified chips and modules. - config ESP32_XTAL_FREQ_40 - bool "40 MHz" - config ESP32_XTAL_FREQ_26 - bool "26 MHz" - config ESP32_XTAL_FREQ_AUTO - bool "Autodetect" -endchoice - -# Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h -config ESP32_XTAL_FREQ - int - default 0 if ESP32_XTAL_FREQ_AUTO - default 40 if ESP32_XTAL_FREQ_40 - default 26 if ESP32_XTAL_FREQ_26 diff --git a/components/esp_hw_support/port/esp32/rtc_clk_init.c b/components/esp_hw_support/port/esp32/rtc_clk_init.c index a445fdf1f16..821ecda345a 100644 --- a/components/esp_hw_support/port/esp32/rtc_clk_init.c +++ b/components/esp_hw_support/port/esp32/rtc_clk_init.c @@ -95,7 +95,7 @@ void rtc_clk_init(rtc_clk_config_t cfg) rtc_xtal_freq_t est_xtal_freq = rtc_clk_xtal_freq_estimate(); if (est_xtal_freq != configured_xtal_freq) { - ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_ESP32_XTAL_FREQ setting (%dMHz). Detected %d MHz.", + ESP_HW_LOGW(TAG, "Possibly invalid CONFIG_XTAL_FREQ setting (%dMHz). Detected %d MHz.", configured_xtal_freq, est_xtal_freq); } } diff --git a/components/esp_hw_support/port/esp32c2/Kconfig.hw_support b/components/esp_hw_support/port/esp32c2/Kconfig.hw_support deleted file mode 100644 index d84edf26929..00000000000 --- a/components/esp_hw_support/port/esp32c2/Kconfig.hw_support +++ /dev/null @@ -1,21 +0,0 @@ -config ESP32C2_XTAL_FREQ - int - default 40 if ESP32C2_XTAL_FREQ_40 - default 26 if ESP32C2_XTAL_FREQ_26 - -choice ESP32C2_XTAL_FREQ_SEL - prompt "Main XTAL frequency" - default ESP32C2_XTAL_FREQ_40 - help - ESP32-C2 currently supports the following XTAL frequencies: - - - 26 MHz - - 40 MHz - - This option must be set to the correct value for the given hardware. - - config ESP32C2_XTAL_FREQ_40 # TODO: IDF-5488 - bool "40 MHz" - config ESP32C2_XTAL_FREQ_26 - bool "26 MHz" -endchoice diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c index 062c3f5481c..405da8a8022 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c @@ -298,8 +298,8 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void) { uint32_t xtal_freq_mhz = clk_ll_xtal_load_freq_mhz(); if (xtal_freq_mhz == 0) { - ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_ESP32C2_XTAL_FREQ); - return CONFIG_ESP32C2_XTAL_FREQ; + ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume %dMHz", CONFIG_XTAL_FREQ); + return CONFIG_XTAL_FREQ; } return (rtc_xtal_freq_t)xtal_freq_mhz; } diff --git a/components/esp_hw_support/port/esp32c2/systimer.c b/components/esp_hw_support/port/esp32c2/systimer.c index 293a73fa0e8..537af83bcb8 100644 --- a/components/esp_hw_support/port/esp32c2/systimer.c +++ b/components/esp_hw_support/port/esp32c2/systimer.c @@ -12,7 +12,7 @@ * So the resolution of the systimer is 40MHz/2.5 = 16MHz, or 26MHz/2.5 = 10.4MHz. */ -#if CONFIG_ESP32C2_XTAL_FREQ_40 +#if CONFIG_XTAL_FREQ_40 uint64_t systimer_ticks_to_us(uint64_t ticks) { return ticks / 16; @@ -22,7 +22,7 @@ uint64_t systimer_us_to_ticks(uint64_t us) { return us * 16; } -#elif CONFIG_ESP32C2_XTAL_FREQ_26 +#elif CONFIG_XTAL_FREQ_26 uint64_t systimer_ticks_to_us(uint64_t ticks) { return ticks * 5 / 52; @@ -34,4 +34,4 @@ uint64_t systimer_us_to_ticks(uint64_t us) } #else #error "Unsupported XTAL frequency by systimer" -#endif // CONFIG_ESP32C2_XTAL_FREQ_xx +#endif // CONFIG_XTAL_FREQ_xx diff --git a/components/esp_hw_support/sdkconfig.rename.esp32 b/components/esp_hw_support/sdkconfig.rename.esp32 index f3ce5c9eaf8..91bac13a640 100644 --- a/components/esp_hw_support/sdkconfig.rename.esp32 +++ b/components/esp_hw_support/sdkconfig.rename.esp32 @@ -22,3 +22,8 @@ CONFIG_ESP32_SPIRAM_SUPPORT CONFIG_SPIRAM CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY + +CONFIG_ESP32_XTAL_FREQ_26 CONFIG_XTAL_FREQ_26 +CONFIG_ESP32_XTAL_FREQ_40 CONFIG_XTAL_FREQ_40 +CONFIG_ESP32_XTAL_FREQ_AUTO CONFIG_XTAL_FREQ_AUTO +CONFIG_ESP32_XTAL_FREQ CONFIG_XTAL_FREQ diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index bff5a3e38cf..e3f1a51d6e4 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -331,7 +331,7 @@ menu "ESP System Settings" int prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM depends on ESP_CONSOLE_UART - default 74880 if ESP32C2_XTAL_FREQ_26 + default 74880 if (IDF_TARGET_ESP32C2 && XTAL_FREQ_26) default 115200 range 1200 4000000 if !PM_ENABLE range 1200 1000000 if PM_ENABLE diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index 0befdd63982..814e3b96a1e 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -71,7 +71,9 @@ static const char *TAG = "clk"; } rtc_init(cfg); - assert(rtc_clk_xtal_freq_get() == CONFIG_ESP32C2_XTAL_FREQ); +#ifndef CONFIG_XTAL_FREQ_AUTO + assert(rtc_clk_xtal_freq_get() == CONFIG_XTAL_FREQ); +#endif bool rc_fast_d256_is_enabled = rtc_clk_8md256_enabled(); rtc_clk_8m_enable(true, rc_fast_d256_is_enabled); diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index a9183bdd610..03480b7cd97 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -127,6 +127,18 @@ config SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL int default 5 +config SOC_XTAL_SUPPORT_26M + bool + default y + +config SOC_XTAL_SUPPORT_40M + bool + default y + +config SOC_XTAL_SUPPORT_AUTO_DETECT + bool + default y + config SOC_ADC_RTC_CTRL_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/rtc.h b/components/soc/esp32/include/soc/rtc.h index 8733679aa7d..aa2b6f7fc99 100644 --- a/components/soc/esp32/include/soc/rtc.h +++ b/components/soc/esp32/include/soc/rtc.h @@ -122,7 +122,7 @@ typedef struct rtc_clk_config_s { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_AUTO, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 80, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index 9a20710ed25..3c284abc5e2 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -96,6 +96,11 @@ #endif // SOC_CAPS_ECO_VER < 2 #define SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL (5U) +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_26M 1 +#define SOC_XTAL_SUPPORT_40M 1 +#define SOC_XTAL_SUPPORT_AUTO_DETECT 1 + /*-------------------------- ADC CAPS ----------------------------------------*/ /*!< SAR ADC Module*/ #define SOC_ADC_RTC_CTRL_SUPPORTED 1 diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index eafc6ff30eb..d32f09d2c65 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -67,6 +67,14 @@ config SOC_SYSTIMER_SUPPORTED bool default y +config SOC_XTAL_SUPPORT_26M + bool + default y + +config SOC_XTAL_SUPPORT_40M + bool + default y + config SOC_ADC_DIG_CTRL_SUPPORTED bool default y diff --git a/components/soc/esp32c2/include/soc/rtc.h b/components/soc/esp32c2/include/soc/rtc.h index 093c920594f..775c39cfbe1 100644 --- a/components/soc/esp32c2/include/soc/rtc.h +++ b/components/soc/esp32c2/include/soc/rtc.h @@ -174,7 +174,7 @@ typedef struct { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_40M, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 80, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 595798ec681..10259a7949c 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -42,6 +42,10 @@ #define SOC_SECURE_BOOT_SUPPORTED 1 #define SOC_SYSTIMER_SUPPORTED 1 +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_26M 1 +#define SOC_XTAL_SUPPORT_40M 1 + /*-------------------------- ADC CAPS -------------------------------*/ /*!< SAR ADC Module*/ #define SOC_ADC_DIG_CTRL_SUPPORTED 1 diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index 07aeec215c2..cf719099f8c 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -115,6 +115,10 @@ config SOC_MEMPROT_SUPPORTED bool default y +config SOC_XTAL_SUPPORT_40M + bool + default y + config SOC_AES_SUPPORT_DMA bool default y diff --git a/components/soc/esp32c3/include/soc/rtc.h b/components/soc/esp32c3/include/soc/rtc.h index 2ad87e60d01..a570d8bb250 100644 --- a/components/soc/esp32c3/include/soc/rtc.h +++ b/components/soc/esp32c3/include/soc/rtc.h @@ -177,7 +177,7 @@ typedef struct { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_40M, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 80, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index d5adc8333e2..b69476162f2 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -57,6 +57,9 @@ #define SOC_SECURE_BOOT_SUPPORTED 1 #define SOC_MEMPROT_SUPPORTED 1 +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_40M 1 + /*-------------------------- AES CAPS -----------------------------------------*/ #define SOC_AES_SUPPORT_DMA (1) diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 4c957ce7f48..7c38936113d 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -103,6 +103,10 @@ config SOC_SECURE_BOOT_SUPPORTED bool default y +config SOC_XTAL_SUPPORT_32M + bool + default y + config SOC_AES_SUPPORT_DMA bool default y diff --git a/components/soc/esp32h2/include/soc/rtc.h b/components/soc/esp32h2/include/soc/rtc.h index 09d704f0390..4764b3a7f20 100644 --- a/components/soc/esp32h2/include/soc/rtc.h +++ b/components/soc/esp32h2/include/soc/rtc.h @@ -182,7 +182,7 @@ typedef struct { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_32M, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 32, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index c4072802ef4..e990dbf6b16 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -59,6 +59,8 @@ #define SOC_FLASH_ENC_SUPPORTED 1 #define SOC_SECURE_BOOT_SUPPORTED 1 +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_32M 1 /*-------------------------- AES CAPS -----------------------------------------*/ #define SOC_AES_SUPPORT_DMA (1) diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index a690a4b3b62..aa1161a6c4d 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -143,6 +143,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED bool default y +config SOC_XTAL_SUPPORT_40M + bool + default y + config SOC_ADC_RTC_CTRL_SUPPORTED bool default y diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h index 6ee19ad7b5e..d87ef3951fa 100644 --- a/components/soc/esp32s2/include/soc/rtc.h +++ b/components/soc/esp32s2/include/soc/rtc.h @@ -170,7 +170,7 @@ typedef struct { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_40M, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 80, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index 8953363435e..5bdc088149f 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -75,6 +75,8 @@ #define SOC_MEMPROT_SUPPORTED 1 #define SOC_TOUCH_SENSOR_SUPPORTED 1 +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_40M 1 /*-------------------------- ADC CAPS ----------------------------------------*/ /*!< SAR ADC Module*/ diff --git a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in index 0bed42c9145..c2ca8c5d34d 100644 --- a/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s3/include/soc/Kconfig.soc_caps.in @@ -199,6 +199,10 @@ config SOC_TOUCH_SENSOR_SUPPORTED bool default y +config SOC_XTAL_SUPPORT_40M + bool + default y + config SOC_APPCPU_HAS_CLOCK_GATING_BUG bool default y diff --git a/components/soc/esp32s3/include/soc/rtc.h b/components/soc/esp32s3/include/soc/rtc.h index 09827e06817..a67396f1c8a 100644 --- a/components/soc/esp32s3/include/soc/rtc.h +++ b/components/soc/esp32s3/include/soc/rtc.h @@ -179,7 +179,7 @@ typedef struct { * Default initializer for rtc_clk_config_t */ #define RTC_CLK_CONFIG_DEFAULT() { \ - .xtal_freq = RTC_XTAL_FREQ_40M, \ + .xtal_freq = CONFIG_XTAL_FREQ, \ .cpu_freq_mhz = 80, \ .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \ .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \ diff --git a/components/soc/esp32s3/include/soc/soc_caps.h b/components/soc/esp32s3/include/soc/soc_caps.h index 9196bdab536..f777535268f 100644 --- a/components/soc/esp32s3/include/soc/soc_caps.h +++ b/components/soc/esp32s3/include/soc/soc_caps.h @@ -65,6 +65,9 @@ #define SOC_MEMPROT_SUPPORTED 1 #define SOC_TOUCH_SENSOR_SUPPORTED 1 +/*-------------------------- XTAL CAPS ---------------------------------------*/ +#define SOC_XTAL_SUPPORT_40M 1 + /*-------------------------- SOC CAPS ----------------------------------------*/ #define SOC_APPCPU_HAS_CLOCK_GATING_BUG (1) diff --git a/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32 index 80e6ca1b8a1..dde2cb1cb54 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_ancs/sdkconfig.defaults.esp32 @@ -1118,10 +1118,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32 index 13439a5e965..d2f206c38b0 100644 --- a/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_compatibility_test/sdkconfig.defaults.esp32 @@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32 index d0662c2a1b6..4a3671f6197 100644 --- a/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_hid_device_demo/sdkconfig.defaults.esp32 @@ -1122,10 +1122,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32 index bd03a478113..cf8a25348ba 100644 --- a/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_ibeacon/sdkconfig.defaults.esp32 @@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32 index d73d80a2414..68b338e8af9 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_spp_client/sdkconfig.defaults.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32 index bd03a478113..cf8a25348ba 100644 --- a/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_spp_server/sdkconfig.defaults.esp32 @@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32 index d73d80a2414..68b338e8af9 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_client/sdkconfig.defaults.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32 index bd03a478113..cf8a25348ba 100644 --- a/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/ble_throughput/throughput_server/sdkconfig.defaults.esp32 @@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32 index d73d80a2414..68b338e8af9 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gatt_client/sdkconfig.defaults.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32 index 842f088817e..c88e0ca9dc4 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gatt_security_client/sdkconfig.defaults.esp32 @@ -1117,10 +1117,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32 index 753a4182c30..83fca6411d2 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gatt_security_server/sdkconfig.defaults.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32 index bd03a478113..cf8a25348ba 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gatt_server/sdkconfig.defaults.esp32 @@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32 index bd03a478113..cf8a25348ba 100644 --- a/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gatt_server_service_table/sdkconfig.defaults.esp32 @@ -1119,10 +1119,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32 b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32 index d73d80a2414..68b338e8af9 100644 --- a/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/bluedroid/ble/gattc_multi_connect/sdkconfig.defaults.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32 b/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32 index d5dee954b9c..bb3720bd3a8 100644 --- a/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32 +++ b/examples/bluetooth/bluedroid/coex/gattc_gatts_coex/sdkconfig.defauts.esp32 @@ -1121,10 +1121,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/examples/bluetooth/blufi/sdkconfig.defaults.esp32 b/examples/bluetooth/blufi/sdkconfig.defaults.esp32 index 7ed1884f194..b3d689927dc 100644 --- a/examples/bluetooth/blufi/sdkconfig.defaults.esp32 +++ b/examples/bluetooth/blufi/sdkconfig.defaults.esp32 @@ -1107,10 +1107,10 @@ CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_26 is not set +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set diff --git a/tools/ldgen/samples/sdkconfig b/tools/ldgen/samples/sdkconfig index 7a325d83c3c..07bc1260ab8 100644 --- a/tools/ldgen/samples/sdkconfig +++ b/tools/ldgen/samples/sdkconfig @@ -184,10 +184,10 @@ CONFIG_RTC_CLK_SRC_EXT_CRYS= CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_RTC_XTAL_BOOTSTRAP_CYCLES=100 CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -CONFIG_ESP32_XTAL_FREQ_26= -CONFIG_ESP32_XTAL_FREQ_AUTO= -CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_XTAL_FREQ_40=y +CONFIG_XTAL_FREQ_26= +CONFIG_XTAL_FREQ_AUTO= +CONFIG_XTAL_FREQ=40 CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE= CONFIG_ESP_TIMER_PROFILING= CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS= diff --git a/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal b/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal index 520e2cf90a5..172f022b67e 100644 --- a/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal +++ b/tools/test_apps/system/build_test/sdkconfig.ci.esp32c2_26mhz_xtal @@ -1,2 +1,2 @@ CONFIG_IDF_TARGET="esp32c2" -CONFIG_ESP32C2_XTAL_FREQ_26=y +CONFIG_XTAL_FREQ_26=y diff --git a/tools/unit-test-app/configs/default_c2_26mhz b/tools/unit-test-app/configs/default_c2_26mhz index 25a0be166f2..80cec8360ec 100644 --- a/tools/unit-test-app/configs/default_c2_26mhz +++ b/tools/unit-test-app/configs/default_c2_26mhz @@ -1,5 +1,5 @@ # This config is split between targets since different component needs to be included CONFIG_IDF_TARGET="esp32c2" -CONFIG_ESP32C2_XTAL_FREQ_26=y +CONFIG_XTAL_FREQ_26=y TEST_COMPONENTS=esp_timer diff --git a/tools/unit-test-app/sdkconfig.defaults.esp32 b/tools/unit-test-app/sdkconfig.defaults.esp32 index dc316cb254a..59093635f08 100644 --- a/tools/unit-test-app/sdkconfig.defaults.esp32 +++ b/tools/unit-test-app/sdkconfig.defaults.esp32 @@ -1,3 +1,3 @@ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y -CONFIG_ESP32_XTAL_FREQ_AUTO=y +CONFIG_XTAL_FREQ_AUTO=y CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y diff --git a/tools/unit-test-app/tools/ConfigDependency.yml b/tools/unit-test-app/tools/ConfigDependency.yml index 5de55f2b8d8..24f89e6ffe4 100644 --- a/tools/unit-test-app/tools/ConfigDependency.yml +++ b/tools/unit-test-app/tools/ConfigDependency.yml @@ -7,5 +7,5 @@ "ESP32C3_IDF": "CONFIG_IDF_TARGET_ESP32C3=y" "quad_psram": '{CONFIG_SPIRAM_MODE_QUAD=y} and {CONFIG_IDF_TARGET_ESP32S3=y}' "octal_psram": '{CONFIG_SPIRAM_MODE_OCT=y} and {CONFIG_IDF_TARGET_ESP32S3=y}' -"xtal_26mhz": '{CONFIG_ESP32C2_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}' -"xtal_40mhz": '{CONFIG_ESP32C2_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}' +"xtal_26mhz": '{CONFIG_XTAL_FREQ_26=y} and {CONFIG_IDF_TARGET_ESP32C2=y}' +"xtal_40mhz": '{CONFIG_XTAL_FREQ_40=y} and {CONFIG_IDF_TARGET_ESP32C2=y}' From fcbaac4d427d99509414eebbacce41ef174d1d91 Mon Sep 17 00:00:00 2001 From: jingli Date: Wed, 13 Jul 2022 11:02:26 +0800 Subject: [PATCH 4/5] examples/wifi/power_save: fix project kconfig file --- examples/wifi/power_save/main/Kconfig.projbuild | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/examples/wifi/power_save/main/Kconfig.projbuild b/examples/wifi/power_save/main/Kconfig.projbuild index 322363fcdfd..b4edfd3cbcc 100644 --- a/examples/wifi/power_save/main/Kconfig.projbuild +++ b/examples/wifi/power_save/main/Kconfig.projbuild @@ -67,7 +67,6 @@ menu "Example Configuration" default 160 if EXAMPLE_MAX_CPU_FREQ_160 default 240 if EXAMPLE_MAX_CPU_FREQ_240 - choice EXAMPLE_MIN_CPU_FREQ prompt "Minimum CPU frequency" default EXAMPLE_MIN_CPU_FREQ_10M @@ -78,19 +77,19 @@ menu "Example Configuration" config EXAMPLE_MIN_CPU_FREQ_40M bool "40 MHz (use with 40MHz XTAL)" - depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO + depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO config EXAMPLE_MIN_CPU_FREQ_20M bool "20 MHz (use with 40MHz XTAL)" - depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO + depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO config EXAMPLE_MIN_CPU_FREQ_10M bool "10 MHz (use with 40MHz XTAL)" - depends on !IDF_TARGET_ESP32 || ESP32_XTAL_FREQ_40 || ESP32_XTAL_FREQ_AUTO + depends on XTAL_FREQ_40 || XTAL_FREQ_AUTO config EXAMPLE_MIN_CPU_FREQ_26M bool "26 MHz (use with 26MHz XTAL)" - depends on ESP32_XTAL_FREQ_26 || ESP32_XTAL_FREQ_AUTO + depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO config EXAMPLE_MIN_CPU_FREQ_13M bool "13 MHz (use with 26MHz XTAL)" - depends on ESP32_XTAL_FREQ_26 || ESP32_XTAL_FREQ_AUTO + depends on XTAL_FREQ_26 || XTAL_FREQ_AUTO endchoice config EXAMPLE_MIN_CPU_FREQ_MHZ From 209cb1f8ee65fd3e9d32716212af6375d8fa0522 Mon Sep 17 00:00:00 2001 From: jingli Date: Wed, 13 Jul 2022 11:24:04 +0800 Subject: [PATCH 5/5] docs: fix xtal kconfig related description --- docs/en/get-started/start-project.rst | 17 +++++++++++++---- docs/zh_CN/get-started/start-project.rst | 17 +++++++++++++---- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/docs/en/get-started/start-project.rst b/docs/en/get-started/start-project.rst index e710167a116..822d04d27a0 100644 --- a/docs/en/get-started/start-project.rst +++ b/docs/en/get-started/start-project.rst @@ -328,7 +328,7 @@ After startup and diagnostic logs scroll up, you should see "Hello world!" print To exit IDF monitor use the shortcut ``Ctrl+]``. -.. only:: esp32 +.. only:: esp32 or esp32c2 If IDF monitor fails shortly after the upload, or, if instead of the messages above, you see random garbage similar to what is given below, your board is likely using a 26 MHz crystal. Most development board designs use 40 MHz, so ESP-IDF uses this frequency as a default value. @@ -340,9 +340,18 @@ To exit IDF monitor use the shortcut ``Ctrl+]``. If you have such a problem, do the following: 1. Exit the monitor. - 2. Go back to `menuconfig`. - 3. Go to Component config --> ESP32-specific --> Main XTAL frequency, then change :ref:`CONFIG_ESP32_XTAL_FREQ_SEL` to 26 MHz. - 4. After that, `build and flash` the application again. + 2. Go back to ``menuconfig``. + 3. Go to ``Component config`` --> ``Hardware Settings`` --> ``Main XTAL Config`` --> ``Main XTAL frequency``, then change :ref:`CONFIG_XTAL_FREQ_SEL` to 26 MHz. + 4. After that, ``build and flash`` the application again. + + In the current version of ESP-IDF, main XTAL frequencies supported by {IDF_TARGET_NAME} are as follows: + + .. list:: + + :SOC_XTAL_SUPPORT_24M: - 24 MHz + :SOC_XTAL_SUPPORT_26M: - 26 MHz + :SOC_XTAL_SUPPORT_32M: - 32 MHz + :SOC_XTAL_SUPPORT_40M: - 40 MHz .. note:: diff --git a/docs/zh_CN/get-started/start-project.rst b/docs/zh_CN/get-started/start-project.rst index 3cd2d346614..23e47985a3e 100644 --- a/docs/zh_CN/get-started/start-project.rst +++ b/docs/zh_CN/get-started/start-project.rst @@ -328,7 +328,7 @@ 您可使用快捷键 ``Ctrl+]``，退出 IDF 监视器。 -.. only:: esp32 +.. only:: esp32 or esp32c2 如果 IDF 监视器在烧录后很快发生错误，或打印信息全是乱码（如下），很有可能是因为您的开发板采用了 26 MHz 晶振，而 ESP-IDF 默认支持大多数开发板使用的 40 MHz 晶振。 @@ -340,9 +340,18 @@ 此时，您可以： 1. 退出监视器。 - 2. 返回 `menuconfig`。 - 3. 进入 ``Component config`` --> ``ESP32-specific`` --> ``Main XTAL frequency`` 进行配置，将 :ref:`CONFIG_ESP32_XTAL_FREQ_SEL` 设置为 26 MHz。 - 4. 重新 `编译和烧录` 应用程序。 + 2. 返回 ``menuconfig``。 + 3. 进入 ``Component config`` --> ``Hardware Settings`` --> ``Main XTAL Config`` --> ``Main XTAL frequency`` 进行配置，将 :ref:`CONFIG_XTAL_FREQ_SEL` 设置为 26 MHz。 + 4. 重新 ``编译和烧录`` 应用程序。 + + 在当前的 ESP-IDF 版本中，{IDF_TARGET_NAME} 支持的主晶振频率如下： + + .. list:: + + :SOC_XTAL_SUPPORT_24M: - 24 MHz + :SOC_XTAL_SUPPORT_26M: - 26 MHz + :SOC_XTAL_SUPPORT_32M: - 32 MHz + :SOC_XTAL_SUPPORT_40M: - 40 MHz .. note::